[llvm-branch-commits] [llvm] [AMDGPU] Expose buffer resource num_records width in TargetParser (PR #220103)

Krzysztof Drewniak via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Aug 31 17:59:11 PDT 2026


https://github.com/krzysz00 updated https://github.com/llvm/llvm-project/pull/220103

>From 7232378e1a4dd539e368895392add84d728cdbed Mon Sep 17 00:00:00 2001
From: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: Mon, 31 Aug 2026 19:32:14 +0000
Subject: [PATCH] [AMDGPU] Expose buffer resource num_records width in
 TargetParser

This also fixes the conflict in gfx12.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---
 llvm/include/llvm/TargetParser/AMDGPUTargetParser.h |  6 ++++++
 llvm/lib/Target/AMDGPU/AMDGPU.td                    |  2 +-
 llvm/lib/TargetParser/AMDGPUTargetParser.cpp        | 13 +++++++++++++
 .../test/TableGen/AMDGPUTargetDefSubArchSpelling.td |  6 +++---
 .../utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp |  3 ++-
 5 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
index c0c8980387f3b..342d0c4c22019 100644
--- a/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+++ b/llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
@@ -229,6 +229,12 @@ constexpr unsigned getNumWorkGroupSIMDs(bool FullSIMDMode) {
 /// \returns Minimum number of waves per execution unit.
 constexpr unsigned getMinWavesPerEU() { return 1; }
 
+/// \returns Number of bits in the num_records field is a buffer resource,
+/// or nullopt if the target is too generic to have a fixed value for that.
+LLVM_ABI std::optional<unsigned> getBufferResourceNumRecordsWidth(GPUKind AK);
+LLVM_ABI std::optional<unsigned>
+getBufferResourceNumRecordsWidth(Triple::SubArchType SubArch);
+
 /// \returns Maximum number of waves per execution unit without any kind of
 /// limitation.
 LLVM_ABI unsigned getMaxWavesPerEU(GPUKind AK);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.td b/llvm/lib/Target/AMDGPU/AMDGPU.td
index dff41c7794a3d..65fb323a0b10e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.td
@@ -1789,7 +1789,6 @@ def FeatureGFX12 : GCNSubtargetFeatureGeneration<"GFX12",
    FeatureMinimum3Maximum3F32, FeatureMinimum3Maximum3F16,
    FeatureAgentScopeFineGrainedRemoteMemoryAtomics, FeatureFlatOffsetBits24,
    FeatureFlatSignedOffset, FeatureInstCacheLineSize128,
-   Feature32BitNumRecordsBufferResource,
    FeatureMaxWavesPerEU16
   ]
 >;
@@ -2289,6 +2288,7 @@ def FeatureISAVersion11_7_Generic: FeatureSet<
 
 def FeatureISAVersion12 : FeatureSet<
   [FeatureGFX12,
+   Feature32BitNumRecordsBufferResource,
    FeatureSupportsWave64, FeatureSupportsWGP,
    FeatureBackOffBarrier,
    FeatureAddressableLocalMemorySize65536,
diff --git a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
index 18e7d6d9c5e00..5642e8073d75d 100644
--- a/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+++ b/llvm/lib/TargetParser/AMDGPUTargetParser.cpp
@@ -44,6 +44,7 @@ struct GPUInfo {
   StringTable::Offset BaseName; // The canonical device name for a variant.
   uint8_t MaxWavesPerEU;
   uint32_t MaxHWAddressableLocalMemorySize;
+  uint8_t BufferResourceNumRecordsWidth;
 };
 
 // Per-GPU data for the R600 GPUKinds.
@@ -477,6 +478,18 @@ AMDGPU::getMaxHWAddressableLocalMemorySize(Triple::SubArchType SubArch) {
   return getMaxHWAddressableLocalMemorySize(getGPUKindFromSubArch(SubArch));
 }
 
+std::optional<unsigned> AMDGPU::getBufferResourceNumRecordsWidth(GPUKind AK) {
+  const GPUInfo *Info = getAMDGPUInfo(AK);
+  if (!Info)
+    return std::nullopt;
+  return Info->BufferResourceNumRecordsWidth;
+}
+
+std::optional<unsigned>
+AMDGPU::getBufferResourceNumRecordsWidth(Triple::SubArchType SubArch) {
+  return getBufferResourceNumRecordsWidth(getGPUKindFromSubArch(SubArch));
+}
+
 unsigned AMDGPU::getMaxWavesPerEU(GPUKind AK) {
   const GPUInfo *Info = getAMDGPUInfo(AK);
   return Info ? Info->MaxWavesPerEU : 10;
diff --git a/llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td b/llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
index dcbd52c072840..6ea996648b97e 100644
--- a/llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
+++ b/llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
@@ -46,9 +46,9 @@ def GFX88F : ProcessorModel<"gfx88f", NoSchedModel, []>,
 
 // The GPU table: the base GPU has no base name (offset 0); the variant uses
 // AMDGPUSubArch888A and records "gfx888" as its base name.
-// CHECK: {[[#]], Triple::AMDGPUSubArch888, {{.*}}, {8, 8, 8}, [[FAM:[0-9]+]], 0, [[#]], [[#]]},
-// CHECK: {[[#]], Triple::AMDGPUSubArch888A, {{.*}}, {8, 8, 8}, [[FAM]], [[#]], [[#]], [[#]]},
-// CHECK: {[[#]], Triple::AMDGPUSubArch88F, {{.*}}, {8, 8, 15}, [[#]], 0, [[#]], [[#]]},
+// CHECK: {[[#]], Triple::AMDGPUSubArch888, {{.*}}, {8, 8, 8}, [[FAM:[0-9]+]], 0, [[#]], [[#]], [[#]]},
+// CHECK: {[[#]], Triple::AMDGPUSubArch888A, {{.*}}, {8, 8, 8}, [[FAM]], [[#]], [[#]], [[#]], [[#]]},
+// CHECK: {[[#]], Triple::AMDGPUSubArch88F, {{.*}}, {8, 8, 15}, [[#]], 0, [[#]], [[#]], [[#]]},
 
 // The subarch-name table maps the variant's own subarch to its triple name.
 // CHECK: {Triple::AMDGPUSubArch888A, [[#]], [[#]]},
diff --git a/llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp b/llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
index 781b68ee6abf7..6f4e7a7d66e9e 100644
--- a/llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+++ b/llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
@@ -621,7 +621,8 @@ emitAMDGPUTable(raw_ostream &OS, const RecordKeeper &RK,
     emitBaseName(BaseNameOS, R);
     OS << Names.GetOrAddStringOffset(BaseName) << ", "
        << getFeatureValue(R, "MaxWavesPerEU", 10) << ", "
-       << getFeatureValue(R, "AddressableLocalMemorySize", 32768) << "},\n";
+       << getFeatureValue(R, "AddressableLocalMemorySize", 32768) << ", "
+       << getFeatureValue(R, "BufferResourceNumRecordsWidth", 32) << "},\n";
   }
   OS << "};\n"
         "#endif // GET_AMDGPU_GPU_TABLE\n\n";



More information about the llvm-branch-commits mailing list