[llvm-branch-commits] [llvm] d38b72e - [SPARC][IAS] Adjust bounds check in %rX name parsing (#218301)

[Douglas Yung via llvm-branch-commits]

Author: Koakuma
Date: 2026-08-24T12:27:23Z
New Revision: d38b72ec51c3c528f8e1b3f65bed655eb062c845

URL: https://github.com/llvm/llvm-project/commit/d38b72ec51c3c528f8e1b3f65bed655eb062c845
DIFF: https://github.com/llvm/llvm-project/commit/d38b72ec51c3c528f8e1b3f65bed655eb062c845.diff

LOG: [SPARC][IAS] Adjust bounds check in %rX name parsing (#218301)

Fix an off-by-one error that results in %r31 being incorrectly rejected.

This was reported by the folks at OpenBSD.

(cherry picked from commit e013a0f906630d014e04824681b32daa45812c7c)

Added: 
    

Modified: 
    llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
    llvm/test/MC/Sparc/sparc-alu-instructions.s

Removed: 
    


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diff  --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index f6b8e0af67150..bab05f5e0ada8 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -1591,7 +1591,7 @@ MCRegister SparcAsmParser::matchRegisterName(const AsmToken &Tok,
   // %r0 - %r31
   int64_t RegNo = 0;
   if (Name.starts_with_insensitive("r") &&
-      !Name.substr(1, 2).getAsInteger(10, RegNo) && RegNo < 31) {
+      !Name.substr(1, 2).getAsInteger(10, RegNo) && RegNo <= 31) {
     RegKind = SparcOperand::rk_IntReg;
     return IntRegs[RegNo];
   }

diff  --git a/llvm/test/MC/Sparc/sparc-alu-instructions.s b/llvm/test/MC/Sparc/sparc-alu-instructions.s
index 98a3dc22b7799..903eb52034f61 100644
--- a/llvm/test/MC/Sparc/sparc-alu-instructions.s
+++ b/llvm/test/MC/Sparc/sparc-alu-instructions.s
@@ -9,6 +9,8 @@
         add %r8, %r9, %l0
         ! CHECK: add %o0, 10,  %l0    ! encoding: [0xa0,0x02,0x20,0x0a]
         add %o0, 10, %l0
+        ! CHECK: add %g0, %o7, %i7    ! encoding: [0xbe,0x00,0x00,0x0f]
+        add %r0, %r15, %r31
 
         ! CHECK: addcc %g1, %g2, %g3  ! encoding: [0x86,0x80,0x40,0x02]
         addcc %g1, %g2, %g3