[llvm-branch-commits] [llvm] [AArch64][SDAG] Enable +sme2p2/+sve2p2 lowering for compressstore (PR #217609)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 639d5b079..a0fb5365c 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2303,7 +2303,8 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     }
   }
 
-  if ((Subtarget->isSVEAvailable() && Subtarget->hasSVE2p2()) || (Subtarget->isSVEorStreamingSVEAvailable() && Subtarget->hasSME2p2())) {
+  if ((Subtarget->isSVEAvailable() && Subtarget->hasSVE2p2()) ||
+      (Subtarget->isSVEorStreamingSVEAvailable() && Subtarget->hasSME2p2())) {
     // With +sve2p2/+sme2p2 the full range of vector types are supported.
     for (auto VT : {MVT::nxv16i8, MVT::nxv8i16, MVT::nxv8f16, MVT::nxv8bf16})
       setOperationAction(ISD::MSTORE, VT, Custom);

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https://github.com/llvm/llvm-project/pull/217609