[llvm-branch-commits] [llvm] [GISel][NewPM] Port RegBankSelect (PR #217756)

[Aiden Grossman via llvm-branch-commits]

https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/217756

>From 6d9b42c657cced1cbd7a1fc4b43b21ed16de54e4 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Thu, 20 Aug 2026 20:46:21 +0000
Subject: [PATCH] formatting

Created using spr 1.3.7
---
 llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index 2d326ff3f2ca2..9405a6dbf0938 100644
--- a/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -240,8 +240,7 @@ class RegBankSelectImpl {
     /// Does the insertion point is at the beginning or end of MBB.
     bool Beginning;
 
-    void materialize() override { /*Nothing to do to materialize*/
-    }
+    void materialize() override { /*Nothing to do to materialize*/ }
 
     MachineBasicBlock::iterator getPointImpl() override {
       return Beginning ? MBB.begin() : MBB.end();