[llvm-branch-commits] [RISCV] Cost i64 accumulator for Zvdot4a8i partial reductions (PR #216992)
Craig Topper via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Aug 18 09:11:34 PDT 2026
================
@@ -353,17 +353,38 @@ InstructionCost RISCVTTIImpl::getPartialReductionCost(
// zve32x is broken for partial_reduce_umla, but let's make sure we
// don't generate them.
+ // vdot4a* reduces four i8 products into an i32 result; an i64 accumulator is
+ // additionally supported by widening the i32 partial sums to i64 (see
+ // lowerPARTIAL_REDUCE_MLA). VF is the number of i8 input elements, so the
+ // reduction factor is AccumBits / 8 (4 for i32, 8 for i64).
if (!ST->hasStdExtZvdot4a8i() || ST->getELen() < 64 ||
Opcode != Instruction::Add || !BinOp || *BinOp != Instruction::Mul ||
InputTypeA != InputTypeB || !InputTypeA->isIntegerTy(8) ||
- !AccumType->isIntegerTy(32) || !VF.isKnownMultipleOf(4))
+ (!AccumType->isIntegerTy(32) && !AccumType->isIntegerTy(64)))
return InstructionCost::getInvalid();
- Type *Tp = VectorType::get(AccumType, VF.divideCoefficientBy(4));
- std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
+ unsigned Ratio = AccumType->getScalarSizeInBits() / 8;
+ if (!VF.isKnownMultipleOf(Ratio))
+ return InstructionCost::getInvalid();
+
+ // Cost of the vdot4a* itself, which operates on the i32 intermediate type
+ // holding VF/4 elements.
+ Type *DotTp = VectorType::get(Type::getInt32Ty(AccumType->getContext()),
+ VF.divideCoefficientBy(4));
+ std::pair<InstructionCost, MVT> DotLT = getTypeLegalizationCost(DotTp);
// Note: Asuming all vdot4a* variants are equal cost
- return LT.first *
- getRISCVInstructionCost(RISCV::VDOT4A_VV, LT.second, CostKind);
+ InstructionCost Cost =
+ DotLT.first *
+ getRISCVInstructionCost(RISCV::VDOT4A_VV, DotLT.second, CostKind);
+
+ // Account for the widening extend + accumulate needed for an i64 result.
----------------
topperc wrote:
Don't we need to query the cost of an ADD?
https://github.com/llvm/llvm-project/pull/216992
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