[llvm-branch-commits] [llvm] [LoopVectorize] Support vectorization of compressing patterns (PR #214491)

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Andarwinux wrote:

> > Looks like this isn't working for i8 and i16 loops?
> 
> They work, though for AArch64 specifically we've not wired up the lowering for `compressstore` for those types yet (as they require +sve2p2), so the cost is currently invalid. I can add a target-agnostic test to demonstrate i8/i16 though.

https://github.com/llvm/llvm-project/pull/215219

Could i8/i16 tests be added now?

https://github.com/llvm/llvm-project/pull/214491