[llvm-branch-commits] [RISCV] Cost i64 accumulator for Zvdot4a8i partial reductions (PR #216992)

[Pengcheng Wang via llvm-branch-commits]

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/216992

Now that `lowerPARTIAL_REDUCE_MLA` can lower an i64 accumulator with
i8 inputs using the dot-product instructions, teach the cost model
to price it so the vectorizer will form it.

- `getPartialReductionCost` accepts an i64 accumulator (reduction
  factor 8), costing the `vdot4a*` plus the extra i32->i64 widen
  and accumulate.

The i64 case requires a wide enough VF (LMUL) to reach the scale-8 factor,
matching how AArch64 only forms it under SVE.

Assisted-by: TRAE CLI (Opus 4.8)