[llvm-branch-commits] [llvm] PowerPC: Fix combineRLWINM crash on an undef folding operand (PR #216696)

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Mon Aug 17 04:13:38 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-powerpc

Author: Matt Arsenault (arsenm)

<details>
<summary>Changes</summary>

Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply@<!-- -->anthropic.com>

---
Full diff: https://github.com/llvm/llvm-project/pull/216696.diff


2 Files Affected:

- (modified) llvm/lib/Target/PowerPC/PPCInstrInfo.cpp (+2) 
- (modified) llvm/test/CodeGen/PowerPC/fold-rlwinm.mir (+12) 


``````````diff
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
index d10e8b1c974f4..97a1d92e8bb1e 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -3892,6 +3892,8 @@ bool PPCInstrInfo::combineRLWINM(MachineInstr &MI,
   if (!FoldingReg.isVirtual())
     return false;
   MachineInstr *SrcMI = MRI->getVRegDef(FoldingReg);
+  if (!SrcMI)
+    return false;
   if (SrcMI->getOpcode() != PPC::RLWINM &&
       SrcMI->getOpcode() != PPC::RLWINM_rec &&
       SrcMI->getOpcode() != PPC::RLWINM8 &&
diff --git a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
index 729895efb11bb..759bccd24cc61 100644
--- a/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
+++ b/llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
@@ -201,3 +201,15 @@ body: |
     %3:gprc = ANDI_rec %2:gprc, 4, implicit-def $cr0
     BLR8 implicit $lr8, implicit $rm
 ...
+---
+name: testFoldRLWINMUndef
+tracksRegLiveness: true
+body: |
+  bb.0.entry:
+    ; An undef folding operand has no def; combineRLWINM must not crash.
+    ; CHECK-LABEL: name: testFoldRLWINMUndef
+    ; CHECK: RLWINM undef %{{[0-9]+}}:gprc, 1, 0, 30
+    %1:gprc = RLWINM undef %0:gprc, 1, 0, 30
+    $r3 = COPY %1
+    BLR implicit $lr, implicit $rm, implicit $r3
+...

``````````

</details>


https://github.com/llvm/llvm-project/pull/216696


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