[llvm-branch-commits] [llvm] release/23.x: [WebAssembly][FastISel] Fix sext i1 to i64 with +sign-ext (#213734) (#214007) (PR #214985)

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Sat Aug 8 09:21:52 PDT 2026


llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-webassembly

Author: llvmbot

<details>
<summary>Changes</summary>

Backport ada3f57b9f2d2b26a354af2572d4fec4ace01185

Requested by: @<!-- -->alexrp

---
Full diff: https://github.com/llvm/llvm-project/pull/214985.diff


2 Files Affected:

- (modified) llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp (+14-16) 
- (modified) llvm/test/CodeGen/WebAssembly/signext-inreg.ll (+23-2) 


``````````diff
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
index 95f4367f76cdf..0b608261932e3 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
@@ -583,26 +583,23 @@ unsigned WebAssemblyFastISel::signExtend(unsigned Reg, const Value *V,
     Register Result = createResultReg(&WebAssembly::I64RegClass);
 
     if (Subtarget->hasSignExt()) {
-      if (From != MVT::i32) {
+      switch (From) {
+      case MVT::i8:
+      case MVT::i16: {
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
                 TII.get(WebAssembly::I64_EXTEND_U_I32), Result)
             .addReg(Reg);
 
         Reg = Result;
         Result = createResultReg(&WebAssembly::I64RegClass);
-      }
 
-      switch (From) {
-      case MVT::i8:
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-                TII.get(WebAssembly::I64_EXTEND8_S_I64), Result)
-            .addReg(Reg);
-        return Result;
-      case MVT::i16:
-        BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-                TII.get(WebAssembly::I64_EXTEND16_S_I64), Result)
+                TII.get(From == MVT::i8 ? WebAssembly::I64_EXTEND8_S_I64
+                                        : WebAssembly::I64_EXTEND16_S_I64),
+                Result)
             .addReg(Reg);
         return Result;
+      }
       case MVT::i32:
         BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
                 TII.get(WebAssembly::I64_EXTEND_S_I32), Result)
@@ -611,14 +608,15 @@ unsigned WebAssemblyFastISel::signExtend(unsigned Reg, const Value *V,
       default:
         break;
       }
-    } else {
-      Reg = signExtendToI32(Reg, V, From);
-
-      BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
-              TII.get(WebAssembly::I64_EXTEND_S_I32), Result)
-          .addReg(Reg);
     }
 
+    Reg = signExtendToI32(Reg, V, From);
+    if (Reg == 0)
+      return 0;
+
+    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
+            TII.get(WebAssembly::I64_EXTEND_S_I32), Result)
+        .addReg(Reg);
     return Result;
   }
 
diff --git a/llvm/test/CodeGen/WebAssembly/signext-inreg.ll b/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
index c56ee860082c8..7b4a00cfc9f05 100644
--- a/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-inreg.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mattr=+sign-ext -fast-isel=0 -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -mattr=+sign-ext -fast-isel=0 -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes=CHECK,SLOW
 ; RUN: llc < %s -mattr=-sign-ext -asm-verbose=false -fast-isel=0 -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=NOSIGNEXT
-; RUN: llc < %s -mattr=+sign-ext -fast-isel=1 -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -mattr=+sign-ext -fast-isel=1 -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefixes=CHECK,FAST
 ; RUN: llc < %s -mattr=-sign-ext -asm-verbose=false -fast-isel=1 -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s --check-prefix=NOSIGNEXT
 target triple = "wasm32-unknown-unknown"
 
@@ -63,3 +63,24 @@ define i64 @i64_extend32_s(i32 %x) {
   %a = sext i32 %x to i64
   ret i64 %a
 }
+
+; CHECK-LABEL: i64_extend1_s:
+; CHECK-NEXT: .functype i64_extend1_s (i32) -> (i64){{$}}
+; SLOW-NEXT: i64.const $push[[NUM3:[0-9]+]]=, 0{{$}}
+; SLOW-NEXT: i64.extend_i32_u $push[[NUM0:[0-9]+]]=, $0{{$}}
+; SLOW-NEXT: i64.const $push[[NUM1:[0-9]+]]=, 1{{$}}
+; SLOW-NEXT: i64.and $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM1]]{{$}}
+; SLOW-NEXT: i64.sub $push[[NUM4:[0-9]+]]=, $pop[[NUM3]], $pop[[NUM2]]{{$}}
+; SLOW-NEXT: return $pop[[NUM4]]{{$}}
+; FAST-NEXT: i32.const $push[[NUM1:[0-9]+]]=, 31{{$}}
+; FAST-NEXT: i32.shl $push[[NUM0:[0-9]+]]=, $0, $pop[[NUM1]]{{$}}
+; FAST-NEXT: i32.const $push[[NUM4:[0-9]+]]=, 31{{$}}
+; FAST-NEXT: i32.shr_s $push[[NUM2:[0-9]+]]=, $pop[[NUM0]], $pop[[NUM4]]{{$}}
+; FAST-NEXT: i64.extend_i32_s $push[[NUM3:[0-9]+]]=, $pop[[NUM2]]{{$}}
+; FAST-NEXT: return $pop[[NUM3]]{{$}}
+
+; NOSIGNEXT-LABEL: i64_extend1_s
+define i64 @i64_extend1_s(i1 %x) {
+  %a = sext i1 %x to i64
+  ret i64 %a
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/214985


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