[llvm-branch-commits] [llvm] [2/7][PISA] Add PISA IR intrinsics and address-space utilities (PR #214096)

Renato Golin via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Thu Aug 6 06:11:59 PDT 2026


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@@ -0,0 +1,72 @@
+//===-- PISAIntrinsicUtils.h ----------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_IR_PISAINTRINSICUTILS_H
+#define LLVM_IR_PISAINTRINSICUTILS_H
+#include "llvm/ADT/StringRef.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/IR/Intrinsics.h"
+#include "llvm/IR/IntrinsicsPISA.h"
+#include "llvm/Support/Compiler.h"
+#include "llvm/Support/raw_ostream.h"
+
+namespace llvm {
+namespace pisa {
+
+// The enum values must match the Clang preprocessor definitions in
+// lib/Frontend/InitPreprocessor.cpp.
+namespace MemoryScope {
+enum : unsigned {
+  none = 255,
+  system = 0,    // __MEMORY_SCOPE_SYSTEM
+  gpu = 1,       // __MEMORY_SCOPE_DEVICE
+  workgroup = 2, // __MEMORY_SCOPE_WRKGRP
+  subgroup = 3,  // __MEMORY_SCOPE_WVFRNT
+  total_scopes
+};
+} // namespace MemoryScope
+
+namespace IRedOp {
+enum : unsigned {
+  SUM = 0,
+  SMIN = 1,
+  SMAX = 2,
+  UMIN = 3,
+  UMAX = 4,
+  AND = 5,
----------------
rengolin wrote:

perhaps these enums could come from tablegen?

https://github.com/llvm/llvm-project/pull/214096


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