[llvm-branch-commits] [llvm] [AMDGPU] Allocate and reserve registers for address space 13 objects (PR #214248)
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Wed Aug 5 08:14:58 PDT 2026
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git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp llvm/lib/Target/AMDGPU/AMDGPU.h llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp llvm/lib/Target/AMDGPU/AMDGPUMachineInstrs.h llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIISelLowering.h llvm/lib/Target/AMDGPU/SIInstrInfo.cpp --diff_from_common_commit
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diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp
index 750988d23..b4e14795e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp
@@ -130,9 +130,10 @@ bool AMDGPUPrivateObjectVGPRsImpl::run(MachineFunction &MF) {
auto ObjRegsIt = AllocaObjectRegs.find(Alloca);
if (ObjRegsIt == AllocaObjectRegs.end())
- ObjRegsIt = AllocaObjectRegs
- .try_emplace(Alloca, computeObjectRegs(*Alloca), MMO)
- .first;
+ ObjRegsIt =
+ AllocaObjectRegs
+ .try_emplace(Alloca, computeObjectRegs(*Alloca), MMO)
+ .first;
// The object comes into existence at the start and dies at the end.
for (MCPhysReg Reg : ObjRegsIt->second.first)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
index 841c93e9c..dc64a3318 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
@@ -563,8 +563,8 @@ void AMDGPUPromoteAllocaImpl::allocateVgprs(AllocaAnalysis &AA) {
// metadata need not carry them.
if (MDNode *MD = AA.Alloca->getMetadata("amdgpu.allocated.vgprs")) {
const auto &Allocated = *cast<AMDGPU::AllocatedVGPRsMetadata>(MD);
- AllocVGPROffset = std::max(
- AllocVGPROffset, Allocated.getAddress() + alignTo(AllocaSize, 4));
+ AllocVGPROffset = std::max(AllocVGPROffset,
+ Allocated.getAddress() + alignTo(AllocaSize, 4));
return;
}
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 33036d1d0..5376fc8aa 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -12336,8 +12336,7 @@ SDValue SITargetLowering::LowerINTRINSIC_VOID(SDValue Op,
unsigned Opcode = IntrinsicID == Intrinsic::amdgcn_vgpr_lifetime_start
? AMDGPU::VGPR_LIFETIME_START
: AMDGPU::VGPR_LIFETIME_END;
- MachineSDNode *Marker =
- DAG.getMachineNode(Opcode, DL, MVT::Other, Chain);
+ MachineSDNode *Marker = DAG.getMachineNode(Opcode, DL, MVT::Other, Chain);
DAG.setNodeMemRefs(Marker, {cast<MemSDNode>(Op)->getMemOperand()});
return SDValue(Marker, 0);
}
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https://github.com/llvm/llvm-project/pull/214248
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