[llvm-branch-commits] [llvm] [AMDGPU] Limit register pressure of pipelined loops (PR #212539)

[Manuel Carrasco via llvm-branch-commits]

mgcarrasco wrote:

> Thanks for the input. The existing test is reduced from a real Triton regression and naturally exercises the VGPR-pressure path. I will add gfx908 coverage for the separate VGPR/AGPR register-file path ([L3348](https://github.com/llvm/llvm-project/blob/c9e55b2b5abce00309c637a6d38beefbaf6c2b78/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp#L3348)). Reaching the SGPR rejection path ([L3332](https://github.com/llvm/llvm-project/blob/c9e55b2b5abce00309c637a6d38beefbaf6c2b78/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp#L3332)) appears to require a large artificial loop with unusually high live SGPR pressure, hard to create one by hand. Did fuzz-fill produce a candidate input for that path, or only identify it as uncovered?

Thanks a lot for the feedback! This is very useful. I've just checked and we couldn't find a candidate input for line L3332, although this doesn't mean that the line is unreachable (or reachable).

https://github.com/llvm/llvm-project/pull/212539