[llvm-branch-commits] [llvm] [LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (PR #192921)

[via llvm-branch-commits]

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@@ -5439,6 +5441,139 @@ static SDValue combineAndNotIntoVANDN(SDNode *N, const SDLoc &DL,
   return DAG.getNode(LoongArchISD::VANDN, DL, VT, X, Y);
 }
 
+static bool isConstantSplatVector(SDValue N, APInt &SplatValue,
+                                  unsigned MinSizeInBits) {
+  if (N->getOpcode() == ISD::BITCAST)
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wangleiat wrote:

Consider using `peekThroughBitcasts(N)` instead of manually stripping one BITCAST.

https://github.com/llvm/llvm-project/pull/192921