[llvm-branch-commits] [llvm] c8e984d - [X86] Fix VPMOVPattern folding for extended registers (#191760)

[Cullen Rhodes via llvm-branch-commits]

Author: Qihan Cai
Date: 2026-04-17T10:01:02Z
New Revision: c8e984d27b27370f983f4074059bea854d40b91f

URL: https://github.com/llvm/llvm-project/commit/c8e984d27b27370f983f4074059bea854d40b91f
DIFF: https://github.com/llvm/llvm-project/commit/c8e984d27b27370f983f4074059bea854d40b91f.diff

LOG: [X86] Fix VPMOVPattern folding for extended registers (#191760)

Fixes a problem that tryCompressVPMOVPattern incorrectly folds
instruction using extended registers into VEX. Introduced relevant tests
in MIR.

AI Statement: I used AI to write the tests.
Fixes #191304

(cherry picked from commit dd034aef4a4631860180a81ff17129f50cc41dbb)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86CompressEVEX.cpp
    llvm/test/CodeGen/X86/evex-to-vex-compress.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index 4e39eb3e9707a..c1faf7d1aa1eb 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -237,6 +237,9 @@ static bool tryCompressVPMOVPattern(MachineInstr &MI, MachineBasicBlock &MBB,
       Opc != X86::VPMOVB2MZ128kr && Opc != X86::VPMOVB2MZ256kr)
     return false;
 
+  if (usesExtendedRegister(MI))
+    return false;
+
   Register MaskReg = MI.getOperand(0).getReg();
   Register SrcVecReg = MI.getOperand(1).getReg();
 

diff  --git a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
index 142f07ae6e2b2..b33a1d571c818 100644
--- a/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
+++ b/llvm/test/CodeGen/X86/evex-to-vex-compress.mir
@@ -904,6 +904,10 @@ body: |
   ; CHECK: $eax = VPMOVMSKBYrr                 $ymm0
   $k0 = VPMOVB2MZ256kr                         $ymm0
   $eax = KMOVDrk                               $k0
+  ; CHECK: $k3 = VPMOVB2MZ256kr                $ymm23
+  ; CHECK: $edx = KMOVDrk                      $k3
+  $k3 = VPMOVB2MZ256kr                         $ymm23
+  $edx = KMOVDrk                               $k3
   ; CHECK: $k0 = VPMOVD2MZ256kr                $ymm0
   ; CHECK: $eax = KMOVBrk                      $k0
   ; CHECK: $ebx = KMOVBrk                      $k0
@@ -1789,6 +1793,10 @@ body: |
   ; CHECK: $eax = VPMOVMSKBrr                  $xmm0
   $k0 = VPMOVB2MZ128kr                         $xmm0
   $eax = KMOVWrk                               $k0
+  ; CHECK: $k3 = VPMOVB2MZ128kr                $xmm23
+  ; CHECK: $edx = KMOVWrk                      $k3
+  $k3 = VPMOVB2MZ128kr                         $xmm23
+  $edx = KMOVWrk                               $k3
   ; CHECK: $k0 = VPMOVD2MZ128kr                $xmm0
   ; CHECK: $eax = KMOVBrk                      $k0
   ; CHECK: $ebx = KMOVBrk                      $k0