[llvm-branch-commits] [lldb] [lldb][RISCV][test] Add RVV API tests (PR #184309)

[Sam Elliott via llvm-branch-commits]

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@@ -1438,6 +1438,11 @@ def isRISCV(self):
         """Returns true if the architecture is RISCV64 or RISCV32."""
         return self.getArchitecture() in ["riscv64", "riscv32"]
 
+    def isRISCVRVV(self):
+        riscv_std_extensions_pattern = r"rv([0-9a-z]+)(_|\b)"
+        riscv_std_extensions = re.search(riscv_std_extensions_pattern, self.getCPUInfo()).group(1)
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lenary wrote:

I'm not sure this would match a conventional ISA string correctly, especially if it is a canonical string rather than abbreviated (though, I'm not actually sure what `getCPUInfo()` will return here).



https://github.com/llvm/llvm-project/pull/184309