[llvm-branch-commits] [llvm] [LoongArch] Select V{ADD, SUB}I for operations with negative splat immediates (PR #191966)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Apr 16 02:39:01 PDT 2026
================
@@ -425,6 +425,27 @@ bool LoongArchDAGToDAGISel::selectVSplatImm(SDValue N, SDValue &SplatVal) {
return false;
}
+template <unsigned ImmBitSize>
+bool LoongArchDAGToDAGISel::selectVSplatImmNeg(SDValue N,
+ SDValue &SplatVal) const {
+ APInt ImmValue;
+ EVT EltTy = N->getValueType(0).getVectorElementType();
+
+ if (N->getOpcode() == ISD::BITCAST)
+ N = N->getOperand(0);
+
+ if (selectVSplat(N.getNode(), ImmValue, EltTy.getSizeInBits()) &&
+ ImmValue.getBitWidth() == EltTy.getSizeInBits()) {
+ if ((-ImmValue).isIntN(ImmBitSize)) {
+ SplatVal = CurDAG->getTargetConstant(-ImmValue.getSExtValue(), SDLoc(N),
----------------
wangleiat wrote:
LGTM. ImmBitSize is unlikely to be 64, but using (-ImmValue) would make this more robust. This is not blocking.
https://github.com/llvm/llvm-project/pull/191966
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