[llvm-branch-commits] [llvm] [DAGCombiner][GlobalISel] Extend allMulUsesCanBeContracted with FNEG pattern (PR #188115)

[Adel Ejjeh via llvm-branch-commits]

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@@ -6328,6 +6329,17 @@ bool CombinerHelper::allMulUsesCanBeContracted(const MachineInstr &MI) const {
     if (Opcode == TargetOpcode::G_FADD || Opcode == TargetOpcode::G_FSUB)
       continue;
 
+    // G_FNEG use - contractable if all users of the fneg are G_FSUB.
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adelejjeh wrote:

Can you clarify more? The goal here is to make sure that the FNEG user of the MUL is always going to lead to the MUL being contracted. I looked at all the patterns where we contract a MUL through an FNEG, and we only do that when the FNEG's user is an FSUB. If any of the FNEG's users is not an FSUB that use will not get contracted, so the MUL will be required to stay as a standalone MUL, which means we would block the contraction of the FSUB user as well based on the guards that this PR chain is adding.
Let me clarify with an example:
If we had this IR
fmul %0, %a, %b
fneg %1, %0
fsub %2, %1, %c
store %addr, %1

Currently the compiler will generate:
fmul %0, %a, %b
fneg %a_neg, %a
fneg %c_neg, %c
fma %2, %a_neg, %b, %c_neg
store %addr, %1

With the patch, we will detect that the fneg is used by a non-contractible operation (the store) and therefore will block the contraction of the fmul into the fsub, so no fma will get generated. The mul can also be any other operation, a return even.

If this intent is not clear from the stack's PR description, please let me know how you would suggest I improve it (and in which part of the stack I should include it; my guess would be the second PR (first non-NFC) that introduced the check for FADD).

https://github.com/llvm/llvm-project/pull/188115