[llvm-branch-commits] [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)

[Sameer Sahasrabuddhe via llvm-branch-commits]

https://github.com/ssahasra created https://github.com/llvm/llvm-project/pull/191390

The two new intrinsica llvm.amdgcn.global.load.b128 and llvm.amdgcn.global.store.b128 have availability and visibility semantics as described in #191246. Each of them takes a scope operand that is then translated to target-specific cache policy bits. This allows the user to control how the side-effects of these loads and stores are made visible to other threads.

This is patch was extracted from #172090.

Co-authored-by: macurtis-amd <macurtis at amd.com>
Assisted-by: Claude Opus 4.6

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