[llvm-branch-commits] [llvm] [AMDGPU] DPP wave reduction for long types - 2 (PR #189225)

[via llvm-branch-commits]

github-actions[bot] wrote:

<!--PREMERGE ADVISOR COMMENT: Windows-->
# :window: Windows x64 Test Results

* 3111 tests passed
* 30 tests skipped

All executed tests passed, but another part of the build **failed**. Click on a failure below to see the details.

<details>
<summary>[code=1] lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/SIISelLowering.cpp.obj</summary>

```
FAILED: [code=1] lib/Target/AMDGPU/CMakeFiles/LLVMAMDGPUCodeGen.dir/SIISelLowering.cpp.obj
sccache C:\clang\clang-msvc\bin\clang-cl.exe  /nologo -TP -DUNICODE -D_CRT_NONSTDC_NO_DEPRECATE -D_CRT_NONSTDC_NO_WARNINGS -D_CRT_SECURE_NO_DEPRECATE -D_CRT_SECURE_NO_WARNINGS -D_GLIBCXX_ASSERTIONS -D_HAS_EXCEPTIONS=0 -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D_SCL_SECURE_NO_DEPRECATE -D_SCL_SECURE_NO_WARNINGS -D_UNICODE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -IC:\_work\llvm-project\llvm-project\build\lib\Target\AMDGPU -IC:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU -IC:\_work\llvm-project\llvm-project\build\include -IC:\_work\llvm-project\llvm-project\llvm\include /DWIN32 /D_WINDOWS   /Zc:inline /Zc:__cplusplus /Oi /Brepro /bigobj /permissive- -Werror=unguarded-availability-new /W4  -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported /Gw /O2 /Ob2  -std:c++17 -MD -UNDEBUG /EHs-c- /GR- /showIncludes /Folib\Target\AMDGPU\CMakeFiles\LLVMAMDGPUCodeGen.dir\SIISelLowering.cpp.obj /Fdlib\Target\AMDGPU\CMakeFiles\LLVMAMDGPUCodeGen.dir\LLVMAMDGPUCodeGen.pdb -c -- C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6370,35): error: no matching function for call to 'ExtractSubRegs'
6370 |           auto [Src0Lo, Src0Hi] = ExtractSubRegs(MI, Src0Operand, SrcRegClass);
|                                   ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6371,35): error: no matching function for call to 'ExtractSubRegs'
6371 |           auto [Src1Lo, Src1Hi] = ExtractSubRegs(MI, Src1Operand, SrcRegClass);
|                                   ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6404,13): error: no matching function for call to 'ExtractSubRegs'
6404 |             ExtractSubRegs(MI, IdentityCopyInstr->getOperand(0), SrcRegClass);
|             ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6406,13): error: no matching function for call to 'ExtractSubRegs'
6406 |             ExtractSubRegs(MI, MI.getOperand(1), SrcRegClass);
|             ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6466,31): error: no matching function for call to 'ExtractSubRegs'
6466 |           auto [Op1L, Op1H] = ExtractSubRegs(MI, DPPRowShr8Op, SrcRegClass);
|                               ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6545,17): error: no matching function for call to 'ExtractSubRegs'
6545 |                 ExtractSubRegs(MI, RowBcast15Op, SrcRegClass);
|                 ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(6593,29): error: no matching function for call to 'ExtractSubRegs'
6593 |         auto [Op1L, Op1H] = ExtractSubRegs(MI, FinalDPPResultOperand, SrcRC);
|                             ^~~~~~~~~~~~~~
C:\_work\llvm-project\llvm-project\llvm\lib\Target\AMDGPU\SIISelLowering.cpp(5761,1): note: candidate function not viable: requires 5 arguments, but 3 were provided
5761 | ExtractSubRegs(MachineInstr &MI, MachineOperand &Op,
| ^              ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5762 |                const TargetRegisterClass *SrcRC, const GCNSubtarget &ST,
|                ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
5763 |                MachineRegisterInfo &MRI) {
|                ~~~~~~~~~~~~~~~~~~~~~~~~
7 errors generated.
```
</details>

If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.

https://github.com/llvm/llvm-project/pull/189225