[llvm-branch-commits] [llvm] [AMDGPU] Add MemoryPipeline scheduling to Coexec sched (PR #188658)

[Jeffrey Byrnes via llvm-branch-commits]

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@@ -842,12 +902,6 @@ bool AMDGPUCoExecSchedStrategy::tryCandidateCoexec(SchedCandidate &Cand,
     return TryCand.Reason != NoCand;
 
   if (SameBoundary) {
-    // Avoid serializing long latency dependence chains.
-    // For acyclic path limited loops, latency was already checked above.
-    if (!RegionPolicy.DisableLatencyHeuristic && TryCand.Policy.ReduceLatency &&
-        !Rem.IsAcyclicLatencyLimited && tryLatency(TryCand, Cand, *Zone))
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jrbyrnes wrote:


We don't use it downstream, but it should probably be removed separately if it all. I can make an argument that it could be a useful late tiebreaker

https://github.com/llvm/llvm-project/pull/188658