[llvm-branch-commits] [llvm] [AMDGPU] Add MemoryPipeline scheduling to Coexec sched (PR #188658)

[Quentin Colombet via llvm-branch-commits]

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@@ -439,6 +428,43 @@ bool CandidateHeuristics::tryEffectiveStall(
   };
 
   unsigned CurrCycle = Zone.getCurrCycle();
+
+  auto getFenceStalls = [this, &CurrCycle](SUnit *SU) -> unsigned {
+    InstructionFlavor Flavor = classifyFlavor(
+        *SU->getInstr(), *static_cast<const SIInstrInfo *>(DAG->TII));
+
+    if (Flavor != InstructionFlavor::Fence)
+      return 0;
+
+    HardwareUnitInfo *FenceHWUI = getHWUIFromFlavor(Flavor);
+    HardwareUnitInfo *DSHWUI = getHWUIFromFlavor(InstructionFlavor::DS);
+
+    SUnit *LastDS = DSHWUI->getLastScheduledSU();
+    if (!LastDS)
+      return 0;
+
+    SUnit *LastFence = FenceHWUI->getLastScheduledSU();
+    unsigned LastFenceCycle = LastFence ? LastFence->TopReadyCycle : 0;
+    unsigned LastDSCycle = LastDS->TopReadyCycle;
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qcolombet wrote:

Should we do something different based on `isTop()`?

https://github.com/llvm/llvm-project/pull/188658