[llvm-branch-commits] [clang] [llvm] Move {load, store}(llvm.protected.field.ptr) lowering to InstCombine. (PR #186548)

[Peter Collingbourne via llvm-branch-commits]

https://github.com/pcc updated https://github.com/llvm/llvm-project/pull/186548

>From 8775dacb1f4aafaf63d7d15131035160e024c02a Mon Sep 17 00:00:00 2001
From: Peter Collingbourne <pcc at google.com>
Date: Mon, 16 Mar 2026 10:30:32 -0700
Subject: [PATCH 1/2] Fix test

Created using spr 1.3.6-beta.1
---
 clang/test/CodeGenCXX/pfp-load-store.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/clang/test/CodeGenCXX/pfp-load-store.cpp b/clang/test/CodeGenCXX/pfp-load-store.cpp
index bc947cdd0cf67..dfff744344992 100644
--- a/clang/test/CodeGenCXX/pfp-load-store.cpp
+++ b/clang/test/CodeGenCXX/pfp-load-store.cpp
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -triple aarch64-linux -fexperimental-pointer-field-protection-abi -fexperimental-pointer-field-protection-tagged -emit-llvm -O1 -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple aarch64-linux -fexperimental-pointer-field-protection-abi -fexperimental-pointer-field-protection-tagged -emit-llvm -o - %s | FileCheck %s
 
 int val;
 

>From 58ffc93e1b01cf137268f222881b5a662289e310 Mon Sep 17 00:00:00 2001
From: Peter Collingbourne <pcc at google.com>
Date: Mon, 16 Mar 2026 13:36:46 -0700
Subject: [PATCH 2/2] Address review comments

Created using spr 1.3.6-beta.1
---
 .../Transforms/InstCombine/InstCombinePHI.cpp |  6 +--
 .../PhaseOrdering/phi-protected-field-ptr.ll  | 42 +++++++++++++++++++
 2 files changed, 44 insertions(+), 4 deletions(-)
 create mode 100644 llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll

diff --git a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
index ce3de22c94b79..026f05164bf5e 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
@@ -700,8 +700,7 @@ static bool isSafeAndProfitableToSinkLoad(LoadInst *L) {
 Instruction *InstCombinerImpl::foldPHIArgLoadIntoPHI(PHINode &PN) {
   LoadInst *FirstLI = cast<LoadInst>(PN.getIncomingValue(0));
 
-  // Can't forward swifterror through a phi.
-  if (FirstLI->getOperand(0)->isSwiftError())
+  if (!canReplaceOperandWithVariable(FirstLI, 0))
     return nullptr;
 
   // FIXME: This is overconservative; this transform is allowed in some cases
@@ -740,8 +739,7 @@ Instruction *InstCombinerImpl::foldPHIArgLoadIntoPHI(PHINode &PN) {
         LI->getPointerAddressSpace() != LoadAddrSpace)
       return nullptr;
 
-    // Can't forward swifterror through a phi.
-    if (LI->getOperand(0)->isSwiftError())
+    if (!canReplaceOperandWithVariable(LI, 0))
       return nullptr;
 
     // We can't sink the load if the loaded value could be modified between
diff --git a/llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll b/llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
new file mode 100644
index 0000000000000..fbbae399f0ec2
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
@@ -0,0 +1,42 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -O2 -S < %s | FileCheck %s
+
+; Test that no optimization run at -O2 before InstCombine moves the loads into
+; the exit block, as this causes unnecessary address escapes with pointer field
+; protection.
+
+define ptr @phi_prot_ptr(i1 %sel, ptr %p1, ptr %p2) {
+; CHECK-LABEL: define ptr @phi_prot_ptr(
+; CHECK-SAME: i1 [[SEL:%.*]], ptr readonly captures(none) [[P1:%.*]], ptr readonly captures(none) [[P2:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:    br i1 [[SEL]], label %[[T:.*]], label %[[F:.*]]
+; CHECK:       [[T]]:
+; CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[P1]], align 8
+; CHECK-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
+; CHECK-NEXT:    [[TMP3:%.*]] = tail call i64 @llvm.ptrauth.auth(i64 [[TMP2]], i32 2, i64 1)
+; CHECK-NEXT:    br label %[[EXIT:.*]]
+; CHECK:       [[F]]:
+; CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[P2]], align 8
+; CHECK-NEXT:    [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; CHECK-NEXT:    [[TMP6:%.*]] = tail call i64 @llvm.ptrauth.auth(i64 [[TMP5]], i32 2, i64 2)
+; CHECK-NEXT:    br label %[[EXIT]]
+; CHECK:       [[EXIT]]:
+; CHECK-NEXT:    [[RETVAL_IN:%.*]] = phi i64 [ [[TMP3]], %[[T]] ], [ [[TMP6]], %[[F]] ]
+; CHECK-NEXT:    [[RETVAL:%.*]] = inttoptr i64 [[RETVAL_IN]] to ptr
+; CHECK-NEXT:    ret ptr [[RETVAL]]
+;
+  br i1 %sel, label %t, label %f
+
+t:
+  %protp1 = call ptr @llvm.protected.field.ptr.p0(ptr %p1, i64 1, i1 true)
+  %load1 = load ptr, ptr %protp1
+  br label %exit
+
+f:
+  %protp2 = call ptr @llvm.protected.field.ptr.p0(ptr %p2, i64 2, i1 true)
+  %load2 = load ptr, ptr %protp2
+  br label %exit
+
+exit:
+  %retval = phi ptr [ %load1, %t ], [ %load2, %f ]
+  ret ptr %retval
+}