[llvm-branch-commits] [llvm] [LoongArch] Introduce instruction patterns for vector sign/zero extensions (PR #160810)

[via llvm-branch-commits]

tangaac wrote:

For LSX zext, I believe previous behavior is the best practice.
For LSX sext,  vector element sext as twice element size, the best practice is like below:
``` llvm
%B = sext <4 x i16> %A to <4 x i32>
vslti.h v2, v1, 0
vilvl.h v1, v2, v1 

%B = sext <4 x i32> %A to <4 x i64>
vslti.w v3, v1, 0
vilvh.w v2, v3, v1
vilvl.w v1, v3, v1
```


https://github.com/llvm/llvm-project/pull/160810