[llvm-branch-commits] [llvm] bbbe538 - Revert "[llvm-exegesis] Exclude loads/stores from aliasing instruction set (#…"
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llvm-branch-commits at lists.llvm.org
Wed Sep 3 12:00:36 PDT 2025
Author: Sjoerd Meijer
Date: 2025-09-03T20:00:34+01:00
New Revision: bbbe5384f1f231d7e206a37d43f30dc3b4975f96
URL: https://github.com/llvm/llvm-project/commit/bbbe5384f1f231d7e206a37d43f30dc3b4975f96
DIFF: https://github.com/llvm/llvm-project/commit/bbbe5384f1f231d7e206a37d43f30dc3b4975f96.diff
LOG: Revert "[llvm-exegesis] Exclude loads/stores from aliasing instruction set (#…"
This reverts commit 899ee375e99c04ef2c4a67dc70b266c929ad43f4.
Added:
Modified:
llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
Removed:
llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
################################################################################
diff --git a/llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s b/llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
deleted file mode 100644
index 65e1203bb275d..0000000000000
--- a/llvm/test/tools/llvm-exegesis/AArch64/no-aliasing-ld-str.s
+++ /dev/null
@@ -1,8 +0,0 @@
-REQUIRES: aarch64-registered-target
-
-RUN: llvm-exegesis -mtriple=aarch64 -mcpu=neoverse-v2 -mode=latency --dump-object-to-disk=%d --opcode-name=FMOVWSr --benchmark-phase=assemble-measured-code 2>&1
-RUN: llvm-objdump -d %d > %t.s
-RUN: FileCheck %s < %t.s
-
-CHECK-NOT: ld{{[1-4]}}
-CHECK-NOT: st{{[1-4]}}
diff --git a/llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp b/llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
index d2d9b31df5197..66c770d9ca86b 100644
--- a/llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
+++ b/llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
@@ -206,8 +206,6 @@ const Operand &Instruction::getPrimaryOperand(const Variable &Var) const {
}
bool Instruction::hasMemoryOperands() const {
- if (Description.mayLoad() || Description.mayStore())
- return true;
return any_of(Operands, [](const Operand &Op) {
return Op.isReg() && Op.isExplicit() && Op.isMemory();
});
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