[llvm-branch-commits] [llvm] [AArch64] Remove post-decoding instruction mutations (PR #156364)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
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``````````diff
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
index 52cd68173..fb4930ea1 100644
--- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
@@ -130,11 +130,13 @@ DecodeMatrixTileListRegisterClass(MCInst &Inst, unsigned RegMask,
   return Success;
 }
 
-static void DecodeMPRRegisterClass(MCInst &Inst, const MCDisassembler *Decoder) {
+static void DecodeMPRRegisterClass(MCInst &Inst,
+                                   const MCDisassembler *Decoder) {
   Inst.addOperand(MCOperand::createReg(AArch64::ZA));
 }
 
-static void DecodeZTRRegisterClass(MCInst &Inst, const MCDisassembler *Decoder) {
+static void DecodeZTRRegisterClass(MCInst &Inst,
+                                   const MCDisassembler *Decoder) {
   Inst.addOperand(MCOperand::createReg(AArch64::ZT0));
 }
 
@@ -149,7 +151,7 @@ static const MCPhysReg MatrixZATileDecoderTable[5][16] = {
      AArch64::ZAQ10, AArch64::ZAQ11, AArch64::ZAQ12, AArch64::ZAQ13,
      AArch64::ZAQ14, AArch64::ZAQ15}};
 
-template<unsigned NumBitsForTile>
+template <unsigned NumBitsForTile>
 static void DecodeMatrixTile(MCInst &Inst, const MCDisassembler *Decoder) {
   static_assert(NumBitsForTile == 0);
   Inst.addOperand(MCOperand::createReg(AArch64::ZAB0));

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https://github.com/llvm/llvm-project/pull/156364