[llvm-branch-commits] [clang] [llvm] [AArch64][llvm] Armv9.7-A: Add support for GICv5 (FEAT_GCIE) (PR #163159)

[via llvm-branch-commits]

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@@ -4035,6 +4037,28 @@ bool AArch64AsmParser::parseSysAlias(StringRef Name, SMLoc NameLoc,
     }
     ExpectRegister = MLBI->NeedsReg;
     createSysAlias(MLBI->Encoding, Operands, S);
+  } else if (Mnemonic == "gic") {
+    const AArch64GIC::GIC *GIC = AArch64GIC::lookupGICByName(Op);
+    if (!GIC)
+      return TokError("invalid operand for GIC instruction");
+    else if (!GIC->haveFeatures(getSTI().getFeatureBits())) {
+      std::string Str("GIC " + std::string(GIC->Name) + " requires: ");
+      setRequiredFeatureString(GIC->getRequiredFeatures(), Str);
+      return TokError(Str);
+    }
+    ExpectRegister = GIC->NeedsReg;
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CarolineConcatto wrote:

If we remove this extra information from tablegen we could assume this is true

https://github.com/llvm/llvm-project/pull/163159