[llvm-branch-commits] [llvm] [MIR2Vec] Handle Operands (PR #163281)

Mircea Trofin via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Oct 15 07:17:47 PDT 2025


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@@ -74,31 +76,114 @@ class MIRVocabulary {
   friend class llvm::MIR2VecVocabLegacyAnalysis;
   using VocabMap = std::map<std::string, ir2vec::Embedding>;
 
-private:
-  // Define vocabulary layout - adapted for MIR
+  // MIRVocabulary Layout:
+  // +-------------------+-----------------------------------------------------+
+  // | Entity Type       | Description                                         |
+  // +-------------------+-----------------------------------------------------+
+  // | 1. Opcodes        | Target specific opcodes derived from TII, grouped   |
+  // |                   | by instruction semantics.                           |
+  // | 2. Common Operands| All common operand types, except register operands, |
+  // |                   | defined by MachineOperand::MachineOperandType enum. |
+  // | 3. Physical       | Register classes defined by the target, specialized |
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mtrofin wrote:

add "classes " for 3 and 4 in the left column. I know the right column says "classes", but this would make it immediately more clear.

https://github.com/llvm/llvm-project/pull/163281


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