[llvm-branch-commits] [llvm] [MIR2Vec] Add embedder for machine instructions (PR #162161)

[S. VenkataKeerthy via llvm-branch-commits]

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@@ -190,6 +197,28 @@ void MIRVocabulary::buildCanonicalOpcodeMapping() {
                     << " unique base opcodes\n");
 }
 
+MIRVocabulary MIRVocabulary::createDummyVocabForTest(const TargetInstrInfo &TII,
+                                                     unsigned Dim) {
+  assert(Dim > 0 && "Dimension must be greater than zero");
+
+  float DummyVal = 0.1f;
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svkeerthy wrote:

No, I missed incrementing it in the loop. Added it now. (Tests in MIR2Vec are not looking for magic numbers like IR2Vec so it wasn't caught in tests.)

https://github.com/llvm/llvm-project/pull/162161