[llvm-branch-commits] [llvm] [MIR2Vec] Add embedder for machine instructions (PR #162161)
Mircea Trofin via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Oct 6 17:47:40 PDT 2025
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@@ -190,6 +197,28 @@ void MIRVocabulary::buildCanonicalOpcodeMapping() {
<< " unique base opcodes\n");
}
+MIRVocabulary MIRVocabulary::createDummyVocabForTest(const TargetInstrInfo &TII,
+ unsigned Dim) {
+ assert(Dim > 0 && "Dimension must be greater than zero");
+
+ float DummyVal = 0.1f;
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mtrofin wrote:
this guy could be const static, right?
https://github.com/llvm/llvm-project/pull/162161
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