[llvm-branch-commits] [llvm] [AMDGPU] Implement CFI for non-kernel functions (PR #164723)
Scott Linder via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Nov 24 10:11:59 PST 2025
https://github.com/slinder1 updated https://github.com/llvm/llvm-project/pull/164723
>From 50e5c53357d87cb2efb5c20a0b0414576695222a Mon Sep 17 00:00:00 2001
From: Emma Pilkington <Emma.Pilkington at amd.com>
Date: Wed, 25 Jun 2025 10:04:58 -0400
Subject: [PATCH 1/3] [AMDGPU] Implement CFI for non-kernel functions
This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
---
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 304 +-
llvm/lib/Target/AMDGPU/SIFrameLowering.h | 30 +-
.../GlobalISel/call-outgoing-stack-args.ll | 8 +-
.../GlobalISel/dynamic-alloca-uniform.ll | 6 +-
.../CodeGen/AMDGPU/GlobalISel/localizer.ll | 2 +-
.../AMDGPU/GlobalISel/non-entry-alloca.ll | 4 +-
.../AMDGPU/accvgpr-spill-scc-clobber.mir | 5568 +++++++++++++++++
.../CodeGen/AMDGPU/agpr-copy-reuse-writes.mir | 24 +
llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir | 48 +
.../CodeGen/AMDGPU/amdgcn-call-whole-wave.ll | 286 +-
.../test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll | 28 +-
.../AMDGPU/av_spill_cross_bb_usage.mir | 465 ++
.../CodeGen/AMDGPU/bug-undef-spilled-agpr.mir | 6 +
.../CodeGen/AMDGPU/call-argument-types.ll | 32 +-
.../callee-special-input-vgprs-packed.ll | 14 +-
.../AMDGPU/callee-special-input-vgprs.ll | 12 +-
.../AMDGPU/csr-sgpr-spill-live-ins.mir | 6 +
llvm/test/CodeGen/AMDGPU/debug-frame.ll | 1672 ++++-
.../AMDGPU/dwarf-multi-register-use-crash.ll | 468 ++
.../dynamic-vgpr-reserve-stack-for-cwsr.ll | 4 +-
.../eliminate-frame-index-s-add-i32.mir | 384 +-
.../eliminate-frame-index-s-mov-b32.mir | 2196 +++++++
.../eliminate-frame-index-scalar-bit-ops.mir | 76 +-
...minate-frame-index-v-add-co-u32-wave32.mir | 76 +-
.../eliminate-frame-index-v-add-co-u32.mir | 582 +-
.../eliminate-frame-index-v-add-u32.mir | 229 +-
llvm/test/CodeGen/AMDGPU/frame-index.mir | 376 +-
.../CodeGen/AMDGPU/function-args-inreg.ll | 19 +-
.../AMDGPU/gfx-callable-argument-types.ll | 1166 ++--
.../gfx-callable-preserved-registers.ll | 68 +-
.../CodeGen/AMDGPU/insert-waitcnts-crash.ll | 220 +-
...egrewriter-live-out-undef-subregisters.mir | 209 +
.../local-stack-alloc-block-sp-reference.ll | 10 +-
llvm/test/CodeGen/AMDGPU/nested-calls.ll | 4 +-
.../AMDGPU/no-source-locations-in-prologue.ll | 212 +
llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 8 +-
.../AMDGPU/pei-amdgpu-cs-chain-preserve.mir | 687 ++
.../CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir | 568 ++
.../CodeGen/AMDGPU/pei-build-av-spill.mir | 3096 ++++++++-
.../AMDGPU/pei-build-spill-partial-agpr.mir | 116 +
llvm/test/CodeGen/AMDGPU/pei-build-spill.mir | 2280 ++++++-
.../AMDGPU/pei-scavenge-sgpr-carry-out.mir | 127 +
.../CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir | 66 +
.../test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir | 33 +
.../AMDGPU/pei-scavenge-vgpr-spill.mir | 210 +
.../AMDGPU/pei-vgpr-block-spill-csr.mir | 622 +-
.../AMDGPU/preserve-only-inactive-lane.mir | 3 +
.../AMDGPU/preserve-wwm-copy-dst-reg.ll | 6 +-
.../AMDGPU/prologue-epilogue-markers.ll | 2 +
llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll | 12 +
.../CodeGen/AMDGPU/same-slot-agpr-sgpr.mir | 16 +
.../AMDGPU/sgpr-spill-overlap-wwm-reserve.mir | 51 +
.../AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir | 395 ++
.../AMDGPU/sgpr-spill-vmem-large-frame.mir | 3 +
.../si-optimize-vgpr-live-range-dbg-instr.ll | 9 +
llvm/test/CodeGen/AMDGPU/sibling-call.ll | 6 +-
.../AMDGPU/spill-agpr-partially-undef.mir | 14 +-
llvm/test/CodeGen/AMDGPU/spill-agpr.mir | 538 ++
.../AMDGPU/spill-reg-tuple-super-reg-use.mir | 24 +
.../AMDGPU/spill-sgpr-used-for-exec-copy.mir | 14 +
.../CodeGen/AMDGPU/spill-to-agpr-partial.mir | 56 +
llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir | 9 +
llvm/test/CodeGen/AMDGPU/spillv16.mir | 3 +
.../CodeGen/AMDGPU/split-arg-dbg-value.ll | 18 +
llvm/test/CodeGen/AMDGPU/stack-realign.ll | 24 +-
.../AMDGPU/strictfp_f16_abi_promote.ll | 4 +-
.../CodeGen/AMDGPU/swdev504645-global-fold.ll | 2 +-
.../AMDGPU/tail-call-inreg-arguments.error.ll | 2 +-
...d-op-for-wwm-scratch-reg-spill-restore.mir | 21 +
.../AMDGPU/track-spilled-vgpr-liveness.mir | 9 +
.../AMDGPU/tuple-allocation-failure.ll | 2 +-
...unfold-masked-merge-scalar-variablemask.ll | 6 +-
.../CodeGen/AMDGPU/use_restore_frame_reg.mir | 66 +
...tor-spill-restore-to-other-vector-type.mir | 64 +
.../CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir | 2136 +++++++
llvm/test/CodeGen/AMDGPU/vgpr-spill.mir | 22 +-
.../CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 30 +-
llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +-
.../AMDGPU/whole-wave-functions-pei.mir | 63 +
llvm/test/DebugInfo/AMDGPU/cfi.ll | 3 +
llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll | 12 +
...dgpu_generated_funcs.ll.generated.expected | 27 +
...pu_generated_funcs.ll.nogenerated.expected | 27 +
83 files changed, 25212 insertions(+), 1122 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index b3e03d6d6e356..5921f8bdc9c32 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -17,6 +17,7 @@
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
+#include "llvm/Support/LEB128.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
@@ -29,6 +30,10 @@ static cl::opt<bool> EnableSpillVGPRToAGPR(
cl::ReallyHidden,
cl::init(true));
+static constexpr unsigned SGPRBitSize = 32;
+static constexpr unsigned SGPRByteSize = SGPRBitSize / 8;
+static constexpr unsigned VGPRLaneBitSize = 32;
+
// Find a register matching \p RC from \p LiveUnits which is unused and
// available throughout the function. On failure, returns AMDGPU::NoRegister.
// TODO: Rewrite the loop here to iterate over MCRegUnits instead of
@@ -45,6 +50,72 @@ static MCRegister findUnusedRegister(MachineRegisterInfo &MRI,
return MCRegister();
}
+static void encodeDwarfRegisterLocation(int DwarfReg, raw_ostream &OS) {
+ assert(DwarfReg >= 0);
+ if (DwarfReg < 32) {
+ OS << uint8_t(dwarf::DW_OP_reg0 + DwarfReg);
+ } else {
+ OS << uint8_t(dwarf::DW_OP_regx);
+ encodeULEB128(DwarfReg, OS);
+ }
+}
+
+static MCCFIInstruction
+createScaledCFAInPrivateWave(const GCNSubtarget &ST,
+ MCRegister DwarfStackPtrReg) {
+ assert(ST.enableFlatScratch());
+
+ // When flat scratch is enabled, the stack pointer is an address in the
+ // private_lane DWARF address space (i.e. swizzled), but in order to
+ // accurately and efficiently describe things like masked spills of vector
+ // registers we want to define the CFA to be an address in the private_wave
+ // DWARF address space (i.e. unswizzled). To achieve this we scale the stack
+ // pointer by the wavefront size, implemented as (SP << wave_size_log2).
+ const unsigned WavefrontSizeLog2 = ST.getWavefrontSizeLog2();
+ assert(WavefrontSizeLog2 < 32);
+
+ SmallString<20> Block;
+ raw_svector_ostream OSBlock(Block);
+ encodeDwarfRegisterLocation(DwarfStackPtrReg, OSBlock);
+ OSBlock << uint8_t(dwarf::DW_OP_deref_size) << uint8_t(SGPRByteSize)
+ << uint8_t(dwarf::DW_OP_lit0 + WavefrontSizeLog2)
+ << uint8_t(dwarf::DW_OP_shl)
+ << uint8_t(dwarf::DW_OP_lit0 +
+ dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave)
+ << uint8_t(dwarf::DW_OP_LLVM_user)
+ << uint8_t(dwarf::DW_OP_LLVM_form_aspace_address);
+
+ SmallString<20> CFIInst;
+ raw_svector_ostream OSCFIInst(CFIInst);
+ OSCFIInst << uint8_t(dwarf::DW_CFA_def_cfa_expression);
+ encodeULEB128(Block.size(), OSCFIInst);
+ OSCFIInst << Block;
+
+ return MCCFIInstruction::createEscape(nullptr, OSCFIInst.str());
+}
+
+void SIFrameLowering::emitDefCFA(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ DebugLoc const &DL, Register StackPtrReg,
+ bool AspaceAlreadyDefined,
+ MachineInstr::MIFlag Flags) const {
+ MachineFunction &MF = *MBB.getParent();
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+ const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo();
+
+ MCRegister DwarfStackPtrReg = MCRI->getDwarfRegNum(StackPtrReg, false);
+ MCCFIInstruction CFIInst =
+ ST.enableFlatScratch()
+ ? createScaledCFAInPrivateWave(ST, DwarfStackPtrReg)
+ : (AspaceAlreadyDefined
+ ? MCCFIInstruction::createLLVMDefAspaceCfa(
+ nullptr, DwarfStackPtrReg, 0,
+ dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave, SMLoc())
+ : MCCFIInstruction::createDefCfaRegister(nullptr,
+ DwarfStackPtrReg));
+ buildCFI(MBB, MBBI, DL, CFIInst, Flags);
+}
+
// Find a scratch register that we can use in the prologue. We avoid using
// callee-save registers since they may appear to be free when this is called
// from canUseAsPrologue (during shrink wrapping), but then no longer be free
@@ -233,6 +304,8 @@ class PrologEpilogSGPRSpillBuilder {
SIMachineFunctionInfo *FuncInfo;
const SIInstrInfo *TII;
const SIRegisterInfo &TRI;
+ const MCRegisterInfo *MCRI;
+ const SIFrameLowering *TFI;
Register SuperReg;
const PrologEpilogSGPRSaveRestoreInfo SI;
LiveRegUnits &LiveUnits;
@@ -241,9 +314,16 @@ class PrologEpilogSGPRSpillBuilder {
ArrayRef<int16_t> SplitParts;
unsigned NumSubRegs;
unsigned EltSize = 4;
+ bool IsFramePtrPrologSpill;
+ bool NeedsFrameMoves;
+
+ bool isExec(Register Reg) const {
+ return Reg == AMDGPU::EXEC_LO || Reg == AMDGPU::EXEC;
+ }
void saveToMemory(const int FI) const {
MachineRegisterInfo &MRI = MF.getRegInfo();
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
assert(!MFI.isDeadObjectIndex(FI));
initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MI, /*IsProlog*/ true);
@@ -262,6 +342,20 @@ class PrologEpilogSGPRSpillBuilder {
buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MI, DL, TmpVGPR,
FI, FrameReg, DwordOff);
+ if (NeedsFrameMoves) {
+ if (isExec(SuperReg) && (I == NumSubRegs - 1))
+ SubReg = AMDGPU::EXEC;
+ else if (IsFramePtrPrologSpill)
+ SubReg = FuncInfo->getFrameOffsetReg();
+
+ // FIXME: CFI for EXEC needs a fix by accurately computing the spill
+ // offset for both the low and high components.
+ if (SubReg != AMDGPU::EXEC_LO)
+ TFI->buildCFI(MBB, MI, DL,
+ MCCFIInstruction::createOffset(
+ nullptr, MCRI->getDwarfRegNum(SubReg, false),
+ MFI.getObjectOffset(FI) * ST.getWavefrontSize()));
+ }
DwordOff += 4;
}
}
@@ -283,6 +377,19 @@ class PrologEpilogSGPRSpillBuilder {
.addReg(SubReg)
.addImm(Spill[I].Lane)
.addReg(Spill[I].VGPR, RegState::Undef);
+ if (NeedsFrameMoves) {
+ if (isExec(SuperReg)) {
+ if (I == NumSubRegs - 1)
+ TFI->buildCFIForSGPRToVGPRSpill(MBB, MI, DL, AMDGPU::EXEC, Spill);
+ } else if (IsFramePtrPrologSpill) {
+ TFI->buildCFIForSGPRToVGPRSpill(MBB, MI, DL,
+ FuncInfo->getFrameOffsetReg(),
+ Spill[I].VGPR, Spill[I].Lane);
+ } else {
+ TFI->buildCFIForSGPRToVGPRSpill(MBB, MI, DL, SubReg, Spill[I].VGPR,
+ Spill[I].Lane);
+ }
+ }
}
}
@@ -290,10 +397,35 @@ class PrologEpilogSGPRSpillBuilder {
BuildMI(MBB, MI, DL, TII->get(AMDGPU::COPY), DstReg)
.addReg(SuperReg)
.setMIFlag(MachineInstr::FrameSetup);
+ if (NeedsFrameMoves) {
+ const TargetRegisterClass *RC = TRI.getPhysRegBaseClass(DstReg);
+ ArrayRef<int16_t> DstSplitParts = TRI.getRegSplitParts(RC, EltSize);
+ unsigned DstNumSubRegs = DstSplitParts.empty() ? 1 : DstSplitParts.size();
+ assert(NumSubRegs == DstNumSubRegs);
+ for (unsigned I = 0; I < NumSubRegs; ++I) {
+ Register SrcSubReg =
+ NumSubRegs == 1 ? SuperReg
+ : Register(TRI.getSubReg(SuperReg, SplitParts[I]));
+ Register DstSubReg =
+ NumSubRegs == 1 ? DstReg
+ : Register(TRI.getSubReg(DstReg, DstSplitParts[I]));
+ if (isExec(SuperReg)) {
+ if (I == NumSubRegs - 1)
+ TFI->buildCFIForRegToSGPRPairSpill(MBB, MI, DL, AMDGPU::EXEC,
+ DstReg);
+ } else {
+ TFI->buildCFI(MBB, MI, DL,
+ MCCFIInstruction::createRegister(
+ nullptr, MCRI->getDwarfRegNum(SrcSubReg, false),
+ MCRI->getDwarfRegNum(DstSubReg, false)));
+ }
+ }
+ }
}
void restoreFromMemory(const int FI) {
MachineRegisterInfo &MRI = MF.getRegInfo();
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
initLiveUnits(LiveUnits, TRI, FuncInfo, MF, MBB, MI, /*IsProlog*/ false);
MCPhysReg TmpVGPR = findScratchNonCalleeSaveRegister(
@@ -345,12 +477,15 @@ class PrologEpilogSGPRSpillBuilder {
MachineBasicBlock::iterator MI,
const DebugLoc &DL, const SIInstrInfo *TII,
const SIRegisterInfo &TRI,
- LiveRegUnits &LiveUnits, Register FrameReg)
+ LiveRegUnits &LiveUnits, Register FrameReg,
+ bool IsFramePtrPrologSpill = false)
: MI(MI), MBB(MBB), MF(*MBB.getParent()),
ST(MF.getSubtarget<GCNSubtarget>()), MFI(MF.getFrameInfo()),
FuncInfo(MF.getInfo<SIMachineFunctionInfo>()), TII(TII), TRI(TRI),
- SuperReg(Reg), SI(SI), LiveUnits(LiveUnits), DL(DL),
- FrameReg(FrameReg) {
+ MCRI(MF.getContext().getRegisterInfo()), TFI(ST.getFrameLowering()),
+ SuperReg(Reg), SI(SI), LiveUnits(LiveUnits), DL(DL), FrameReg(FrameReg),
+ IsFramePtrPrologSpill(IsFramePtrPrologSpill),
+ NeedsFrameMoves(MF.needsFrameMoves()) {
const TargetRegisterClass *RC = TRI.getPhysRegBaseClass(SuperReg);
SplitParts = TRI.getRegSplitParts(RC, EltSize);
NumSubRegs = SplitParts.empty() ? 1 : SplitParts.size();
@@ -968,6 +1103,50 @@ bool SIFrameLowering::isSupportedStackID(TargetStackID::Value ID) const {
llvm_unreachable("Invalid TargetStackID::Value");
}
+void SIFrameLowering::emitPrologueEntryCFI(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL) const {
+ const MachineFunction &MF = *MBB.getParent();
+ const MachineRegisterInfo &MRI = MF.getRegInfo();
+ const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo();
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+ const SIRegisterInfo &TRI = ST.getInstrInfo()->getRegisterInfo();
+ Register StackPtrReg =
+ MF.getInfo<SIMachineFunctionInfo>()->getStackPtrOffsetReg();
+
+ emitDefCFA(MBB, MBBI, DL, StackPtrReg, /*AspaceAlreadyDefined=*/true,
+ MachineInstr::FrameSetup);
+
+ buildCFIForRegToSGPRPairSpill(MBB, MBBI, DL, AMDGPU::PC_REG,
+ TRI.getReturnAddressReg(MF));
+
+ BitVector IsCalleeSaved(TRI.getNumRegs());
+ const MCPhysReg *CSRegs = MRI.getCalleeSavedRegs();
+ for (unsigned I = 0; CSRegs[I]; ++I) {
+ IsCalleeSaved.set(CSRegs[I]);
+ }
+ auto ProcessReg = [&](MCPhysReg Reg) {
+ if (IsCalleeSaved.test(Reg) || !MRI.isPhysRegModified(Reg))
+ return;
+ MCRegister DwarfReg = MCRI->getDwarfRegNum(Reg, false);
+ buildCFI(MBB, MBBI, DL,
+ MCCFIInstruction::createUndefined(nullptr, DwarfReg));
+ };
+
+ // Emit CFI rules for caller saved Arch VGPRs which are clobbered
+ unsigned NumArchVGPRs = ST.has1024AddressableVGPRs() ? 1024 : 256;
+ for_each(AMDGPU::VGPR_32RegClass.getRegisters().take_front(NumArchVGPRs),
+ ProcessReg);
+
+ // Emit CFI rules for caller saved Accum VGPRs which are clobbered
+ if (ST.hasMAIInsts()) {
+ for_each(AMDGPU::AGPR_32RegClass.getRegisters(), ProcessReg);
+ }
+
+ // Emit CFI rules for caller saved SGPRs which are clobbered
+ for_each(AMDGPU::SGPR_32RegClass.getRegisters(), ProcessReg);
+}
+
// Activate only the inactive lanes when \p EnableInactiveLanes is true.
// Otherwise, activate all lanes. It returns the saved exec.
static Register buildScratchExecCopy(LiveRegUnits &LiveUnits,
@@ -1014,14 +1193,19 @@ static Register buildScratchExecCopy(LiveRegUnits &LiveUnits,
return ScratchExecCopy;
}
-void SIFrameLowering::emitCSRSpillStores(
- MachineFunction &MF, MachineBasicBlock &MBB,
- MachineBasicBlock::iterator MBBI, DebugLoc &DL, LiveRegUnits &LiveUnits,
- Register FrameReg, Register FramePtrRegScratchCopy) const {
+void SIFrameLowering::emitCSRSpillStores(MachineFunction &MF,
+ MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ DebugLoc &DL, LiveRegUnits &LiveUnits,
+ Register FrameReg,
+ Register FramePtrRegScratchCopy,
+ const bool NeedsFrameMoves) const {
SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
+ MachineFrameInfo &MFI = MF.getFrameInfo();
const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
const SIInstrInfo *TII = ST.getInstrInfo();
const SIRegisterInfo &TRI = TII->getRegisterInfo();
+ const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo();
MachineRegisterInfo &MRI = MF.getRegInfo();
const AMDGPU::LaneMaskConstants &LMC = AMDGPU::LaneMaskConstants::get(ST);
@@ -1043,6 +1227,12 @@ void SIFrameLowering::emitCSRSpillStores(
int FI = Reg.second;
buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL,
VGPR, FI, FrameReg);
+ if (NeedsFrameMoves)
+ // We spill the entire VGPR, so we can get away with just cfi_offset
+ buildCFI(MBB, MBBI, DL,
+ MCCFIInstruction::createOffset(
+ nullptr, MCRI->getDwarfRegNum(VGPR, false),
+ MFI.getObjectOffset(FI) * ST.getWavefrontSize()));
}
};
@@ -1091,13 +1281,13 @@ void SIFrameLowering::emitCSRSpillStores(
// Skip if FP is saved to a scratch SGPR, the save has already been emitted.
// Otherwise, FP has been moved to a temporary register and spill it
// instead.
- Register Reg =
- Spill.first == FramePtrReg ? FramePtrRegScratchCopy : Spill.first;
+ bool IsFramePtrPrologSpill = Spill.first == FramePtrReg ? true : false;
+ Register Reg = IsFramePtrPrologSpill ? FramePtrRegScratchCopy : Spill.first;
if (!Reg)
continue;
PrologEpilogSGPRSpillBuilder SB(Reg, Spill.second, MBB, MBBI, DL, TII, TRI,
- LiveUnits, FrameReg);
+ LiveUnits, FrameReg, IsFramePtrPrologSpill);
SB.save();
}
@@ -1265,6 +1455,11 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
uint32_t NumBytes = MFI.getStackSize();
uint32_t RoundedSize = NumBytes;
+ const bool NeedsFrameMoves = MF.needsFrameMoves();
+
+ if (NeedsFrameMoves)
+ emitPrologueEntryCFI(MBB, MBBI, DL);
+
if (TRI.hasStackRealignment(MF))
HasFP = true;
@@ -1273,7 +1468,7 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
// Emit the CSR spill stores with SP base register.
emitCSRSpillStores(MF, MBB, MBBI, DL, LiveUnits,
FuncInfo->isChainFunction() ? Register() : StackPtrReg,
- FramePtrRegScratchCopy);
+ FramePtrRegScratchCopy, NeedsFrameMoves);
} else {
// CSR spill stores will use FP as base register.
Register SGPRForFPSaveRestoreCopy =
@@ -1287,7 +1482,8 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
PrologEpilogSGPRSpillBuilder SB(
FramePtrReg,
FuncInfo->getPrologEpilogSGPRSaveRestoreInfo(FramePtrReg), MBB, MBBI,
- DL, TII, TRI, LiveUnits, FramePtrReg);
+ DL, TII, TRI, LiveUnits, FramePtrReg,
+ /*IsFramePtrPrologSpill*/ true);
SB.save();
LiveUnits.addReg(SGPRForFPSaveRestoreCopy);
} else {
@@ -1334,7 +1530,7 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
// If FP is used, emit the CSR spills with FP base register.
if (HasFP) {
emitCSRSpillStores(MF, MBB, MBBI, DL, LiveUnits, FramePtrReg,
- FramePtrRegScratchCopy);
+ FramePtrRegScratchCopy, NeedsFrameMoves);
if (FramePtrRegScratchCopy)
LiveUnits.removeReg(FramePtrRegScratchCopy);
}
@@ -1349,6 +1545,12 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
.setMIFlag(MachineInstr::FrameSetup);
}
+ if (HasFP) {
+ if (NeedsFrameMoves)
+ emitDefCFA(MBB, MBBI, DL, FramePtrReg, /*AspaceAlreadyDefined=*/false,
+ MachineInstr::FrameSetup);
+ }
+
if (HasFP && RoundedSize != 0) {
auto Add = BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::S_ADD_I32), StackPtrReg)
.addReg(StackPtrReg)
@@ -1448,6 +1650,13 @@ void SIFrameLowering::emitEpilogue(MachineFunction &MF,
FramePtrRegScratchCopy);
}
+ const bool NeedsFrameMoves = MF.needsFrameMoves();
+ if (hasFP(MF)) {
+ if (NeedsFrameMoves)
+ emitDefCFA(MBB, MBBI, DL, StackPtrReg, /*AspaceAlreadyDefined=*/false,
+ MachineInstr::FrameDestroy);
+ }
+
if (FPSaved) {
// Insert the copy to restore FP.
Register SrcReg = SGPRForFPSaveRestoreCopy ? SGPRForFPSaveRestoreCopy
@@ -2260,3 +2469,72 @@ MachineInstr *SIFrameLowering::buildCFI(MachineBasicBlock &MBB,
.addCFIIndex(MF.addFrameInst(CFIInst))
.setMIFlag(flag);
}
+
+MachineInstr *SIFrameLowering::buildCFIForSGPRToVGPRSpill(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL, const Register SGPR, const Register VGPR,
+ const int Lane) const {
+ const MachineFunction &MF = *MBB.getParent();
+ const MCRegisterInfo &MCRI = *MF.getContext().getRegisterInfo();
+
+ int DwarfSGPR = MCRI.getDwarfRegNum(SGPR, false);
+ int DwarfVGPR = MCRI.getDwarfRegNum(VGPR, false);
+ assert(DwarfSGPR != -1 && DwarfVGPR != -1);
+ assert(Lane != -1 && "Expected a lane to be present");
+
+ // Build a CFI instruction that represents a SGPR spilled to a single lane of
+ // a VGPR.
+ MCCFIInstruction::VectorRegisterWithLane VR{unsigned(DwarfVGPR),
+ unsigned(Lane), VGPRLaneBitSize};
+ auto CFIInst =
+ MCCFIInstruction::createLLVMVectorRegisters(nullptr, DwarfSGPR, {VR});
+ return buildCFI(MBB, MBBI, DL, std::move(CFIInst));
+}
+
+MachineInstr *SIFrameLowering::buildCFIForSGPRToVGPRSpill(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL, Register SGPR,
+ ArrayRef<SIRegisterInfo::SpilledReg> VGPRSpills) const {
+ const MachineFunction &MF = *MBB.getParent();
+ const MCRegisterInfo &MCRI = *MF.getContext().getRegisterInfo();
+
+ int DwarfSGPR = MCRI.getDwarfRegNum(SGPR, false);
+ assert(DwarfSGPR != -1);
+
+ // Build a CFI instruction that represents a SGPR spilled to multiple lanes of
+ // multiple VGPRs.
+
+ std::vector<MCCFIInstruction::VectorRegisterWithLane> VGPRs;
+ for (SIRegisterInfo::SpilledReg Spill : VGPRSpills) {
+ int DwarfVGPR = MCRI.getDwarfRegNum(Spill.VGPR, false);
+ assert(DwarfVGPR != -1);
+ assert(Spill.hasLane() && "Expected a lane to be present");
+ VGPRs.push_back(
+ {unsigned(DwarfVGPR), unsigned(Spill.Lane), VGPRLaneBitSize});
+ }
+
+ auto CFIInst = MCCFIInstruction::createLLVMVectorRegisters(nullptr, DwarfSGPR,
+ std::move(VGPRs));
+ return buildCFI(MBB, MBBI, DL, std::move(CFIInst));
+}
+
+MachineInstr *SIFrameLowering::buildCFIForRegToSGPRPairSpill(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL, const Register Reg, const Register SGPRPair) const {
+ const MachineFunction &MF = *MBB.getParent();
+ const MCRegisterInfo &MCRI = *MF.getContext().getRegisterInfo();
+ const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+ const SIRegisterInfo &TRI = ST.getInstrInfo()->getRegisterInfo();
+
+ int SGPR0 = TRI.getSubReg(SGPRPair, AMDGPU::sub0);
+ int SGPR1 = TRI.getSubReg(SGPRPair, AMDGPU::sub1);
+
+ int DwarfReg = MCRI.getDwarfRegNum(Reg, false);
+ int DwarfSGPR0 = MCRI.getDwarfRegNum(SGPR0, false);
+ int DwarfSGPR1 = MCRI.getDwarfRegNum(SGPR1, false);
+ assert(DwarfReg != -1 && DwarfSGPR0 != 1 && DwarfSGPR1 != 1);
+
+ auto CFIInst = MCCFIInstruction::createLLVMRegisterPair(
+ nullptr, DwarfReg, DwarfSGPR0, SGPRBitSize, DwarfSGPR1, SGPRBitSize);
+ return buildCFI(MBB, MBBI, DL, std::move(CFIInst));
+}
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
index 0b691d8f15a48..20f608f2dfc24 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
@@ -39,7 +39,8 @@ class SIFrameLowering final : public AMDGPUFrameLowering {
void emitCSRSpillStores(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc &DL,
LiveRegUnits &LiveUnits, Register FrameReg,
- Register FramePtrRegScratchCopy) const;
+ Register FramePtrRegScratchCopy,
+ const bool NeedsFrameMoves) const;
void emitCSRSpillRestores(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI, DebugLoc &DL,
LiveRegUnits &LiveUnits, Register FrameReg,
@@ -101,6 +102,15 @@ class SIFrameLowering final : public AMDGPUFrameLowering {
Register PreloadedPrivateBufferReg, Register ScratchRsrcReg,
Register ScratchWaveOffsetReg) const;
+ void emitPrologueEntryCFI(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL) const;
+
+ void emitDefCFA(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ DebugLoc const &DL, Register StackPtrReg,
+ bool AspaceAlreadyDefined,
+ MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const;
+
public:
bool requiresStackPointerReference(const MachineFunction &MF) const;
@@ -110,6 +120,24 @@ class SIFrameLowering final : public AMDGPUFrameLowering {
const DebugLoc &DL, const MCCFIInstruction &CFIInst,
MachineInstr::MIFlag flag = MachineInstr::FrameSetup) const;
+ /// Create a CFI index describing a spill of an SGPR to a single lane of
+ /// a VGPR and build a MachineInstr around it.
+ MachineInstr *buildCFIForSGPRToVGPRSpill(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL,
+ const Register SGPR,
+ const Register VGPR,
+ const int Lane) const;
+ /// Create a CFI index describing a spill of an SGPR to multiple lanes of
+ /// VGPRs and build a MachineInstr around it.
+ MachineInstr *buildCFIForSGPRToVGPRSpill(
+ MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL, Register SGPR,
+ ArrayRef<SIRegisterInfo::SpilledReg> VGPRSpills) const;
+ MachineInstr *buildCFIForRegToSGPRPairSpill(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator MBBI,
+ const DebugLoc &DL, Register Reg,
+ Register SGPRPair) const;
// Returns true if the function may need to reserve space on the stack for the
// CWSR trap handler.
bool mayReserveScratchForCWSR(const MachineFunction &MF) const;
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
index c16c8e2128c72..e3228162be22a 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
@@ -222,11 +222,11 @@ define void @func_caller_stack() {
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
+; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: s_addk_i32 s32, 0x400
; MUBUF-NEXT: v_mov_b32_e32 v0, 9
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
; MUBUF-NEXT: v_mov_b32_e32 v0, 10
-; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; MUBUF-NEXT: v_mov_b32_e32 v0, 11
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
@@ -257,8 +257,8 @@ define void @func_caller_stack() {
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
-; FLATSCR-NEXT: s_add_i32 s32, s32, 16
; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
+; FLATSCR-NEXT: s_add_i32 s32, s32, 16
; FLATSCR-NEXT: s_add_u32 s0, s32, 4
; FLATSCR-NEXT: v_mov_b32_e32 v0, 9
; FLATSCR-NEXT: scratch_store_dword off, v0, s0
@@ -300,10 +300,10 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
+; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: buffer_load_dword v1, v0, s[0:3], 0 offen
; MUBUF-NEXT: buffer_load_dword v2, v0, s[0:3], 0 offen offset:4
; MUBUF-NEXT: s_addk_i32 s32, 0x400
-; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
; MUBUF-NEXT: s_getpc_b64 s[4:5]
; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_byval at rel32@lo+4
@@ -382,9 +382,9 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
+; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: scratch_load_dwordx2 v[1:2], v0, off
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
-; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: v_writelane_b32 v40, s30, 0
; FLATSCR-NEXT: s_getpc_b64 s[0:1]
; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_byval at rel32@lo+4
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
index 8cb9a5486a2de..b17324a38ada0 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
@@ -363,7 +363,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX9-NEXT: s_addc_u32 s5, s5, gv at gotpcrel32@hi+12
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, 0
-; GFX9-NEXT: s_mov_b32 s33, s6
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-NEXT: s_add_u32 s5, s32, 0x7ff
@@ -377,6 +376,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX9-NEXT: s_add_u32 s32, s5, s4
; GFX9-NEXT: s_mov_b32 s32, s34
; GFX9-NEXT: s_mov_b32 s34, s7
+; GFX9-NEXT: s_mov_b32 s33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -394,7 +394,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX10-NEXT: s_addc_u32 s5, s5, gv at gotpcrel32@hi+12
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
-; GFX10-NEXT: s_mov_b32 s33, s6
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-NEXT: s_add_u32 s5, s32, 0x3ff
@@ -408,6 +407,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX10-NEXT: s_add_u32 s32, s5, s4
; GFX10-NEXT: s_mov_b32 s32, s34
; GFX10-NEXT: s_mov_b32 s34, s7
+; GFX10-NEXT: s_mov_b32 s33, s6
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: func_dynamic_stackalloc_sgpr_align32:
@@ -424,7 +424,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX11-NEXT: s_addc_u32 s1, s1, gv at gotpcrel32@hi+12
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
-; GFX11-NEXT: s_mov_b32 s33, s2
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x0
; GFX11-NEXT: s_add_u32 s1, s32, 0x3ff
@@ -439,6 +438,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX11-NEXT: s_add_u32 s32, s1, s0
; GFX11-NEXT: s_mov_b32 s32, s34
; GFX11-NEXT: s_mov_b32 s34, s3
+; GFX11-NEXT: s_mov_b32 s33, s2
; GFX11-NEXT: s_setpc_b64 s[30:31]
%n = load i32, ptr addrspace(4) @gv
%alloca = alloca i32, i32 %n, align 32, addrspace(5)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
index c295a662704e9..c100d653c1cd7 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
@@ -235,11 +235,11 @@ define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-NEXT: v_writelane_b32 v40, s16, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s16, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s31, 1
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
index 21f459ac033ca..9839af011ecdb 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
@@ -151,8 +151,8 @@ define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i3
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s7, s33
-; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_mov_b32 s33, s32
+; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-NEXT: s_cbranch_execz .LBB2_3
@@ -217,9 +217,9 @@ define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i
; GCN-NEXT: s_mov_b32 s7, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xfc0
; GCN-NEXT: s_mov_b32 s8, s34
-; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_and_b32 s33, s33, 0xfffff000
; GCN-NEXT: s_mov_b32 s34, s32
+; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_addk_i32 s32, 0x2000
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-NEXT: s_cbranch_execz .LBB3_2
diff --git a/llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir b/llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
index c1617574becc3..4ff3f5c13d42a 100644
--- a/llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+++ b/llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
@@ -26,6 +26,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -49,6 +369,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -520,6 +984,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -544,6 +1328,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -1044,6 +1972,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -1069,6 +2317,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -1541,6 +2933,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -1567,6 +3279,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -2067,6 +3923,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -2094,6 +4270,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -2567,6 +4887,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -2595,6 +5235,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -3095,6 +5879,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -3118,6 +6222,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr0, $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -3589,6 +6837,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -3613,6 +7181,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr0, $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -4112,6 +7824,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0_agpr1
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -4137,6 +8169,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -4609,6 +8785,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0_agpr1
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -4635,6 +9131,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -5133,6 +9773,326 @@ body: |
; GFX908-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0_agpr1
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX908-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -5160,6 +10120,150 @@ body: |
; GFX90A-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
@@ -5633,6 +10737,326 @@ body: |
; GFX908-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX908-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $agpr0_agpr1
; GFX908-FLATSCR-NEXT: {{ $}}
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX908-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX908-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX908-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX908-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -5661,6 +11085,150 @@ body: |
; GFX90A-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX90A-FLATSCR-NEXT: liveins: $agpr32, $agpr33, $agpr34, $agpr35, $agpr36, $agpr37, $agpr38, $agpr39, $agpr40, $agpr41, $agpr42, $agpr43, $agpr44, $agpr45, $agpr46, $agpr47, $agpr48, $agpr49, $agpr50, $agpr51, $agpr52, $agpr53, $agpr54, $agpr55, $agpr56, $agpr57, $agpr58, $agpr59, $agpr60, $agpr61, $agpr62, $agpr63, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-FLATSCR-NEXT: {{ $}}
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr32, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr33, implicit $exec
; GFX90A-FLATSCR-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr34, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir b/llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
index 1573903945a3e..7f26e413cf780 100644
--- a/llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
+++ b/llvm/test/CodeGen/AMDGPU/agpr-copy-reuse-writes.mir
@@ -11,6 +11,16 @@ body: |
; GFX908-LABEL: name: standard
; GFX908: liveins: $vgpr0, $vgpr1
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa <badreg>, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; GFX908-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3
; GFX908-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
@@ -42,6 +52,14 @@ body: |
; GFX908-LABEL: name: src_is_spill
; GFX908: liveins: $vgpr0, $vgpr1
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GFX908-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; GFX908-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; GFX908-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -66,6 +84,12 @@ body: |
; GFX908-LABEL: name: overlapping_agpr
; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3
; GFX908-NEXT: {{ $}}
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa <badreg>, 0, 6
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; GFX908-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX908-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr1_agpr2_agpr3_agpr4
; GFX908-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
diff --git a/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir b/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
index 47d489b7f35ca..6e5f8aceaf169 100644
--- a/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
@@ -18,6 +18,54 @@ body: |
; GFX942-LABEL: name: agpr_spill_copy
; GFX942: liveins: $agpr30, $agpr31
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GFX942-NEXT: renamable $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27 = IMPLICIT_DEF
; GFX942-NEXT: renamable $agpr28_agpr29 = IMPLICIT_DEF
; GFX942-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll b/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
index 356bf4b3cac28..eb6482401f764 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
@@ -22,9 +22,9 @@ define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr)
; DAGISEL-NEXT: s_clause 0x1
; DAGISEL-NEXT: scratch_store_b32 off, v40, s33 offset:4
; DAGISEL-NEXT: scratch_store_b32 off, v41, s33
+; DAGISEL-NEXT: v_writelane_b32 v42, s30, 0
; DAGISEL-NEXT: v_dual_mov_b32 v41, v2 :: v_dual_mov_b32 v40, v1
; DAGISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
-; DAGISEL-NEXT: v_writelane_b32 v42, s30, 0
; DAGISEL-NEXT: s_mov_b32 s1, good_callee at abs32@hi
; DAGISEL-NEXT: s_mov_b32 s0, good_callee at abs32@lo
; DAGISEL-NEXT: s_add_co_i32 s32, s32, 16
@@ -65,9 +65,9 @@ define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr)
; GISEL-NEXT: s_clause 0x1
; GISEL-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GISEL-NEXT: scratch_store_b32 off, v41, s33
+; GISEL-NEXT: v_writelane_b32 v42, s30, 0
; GISEL-NEXT: v_dual_mov_b32 v40, v1 :: v_dual_mov_b32 v41, v2
; GISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
-; GISEL-NEXT: v_writelane_b32 v42, s30, 0
; GISEL-NEXT: s_mov_b32 s0, good_callee at abs32@lo
; GISEL-NEXT: s_mov_b32 s1, good_callee at abs32@hi
; GISEL-NEXT: s_add_co_i32 s32, s32, 16
@@ -138,152 +138,291 @@ define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x,
; DAGISEL-NEXT: s_xor_saveexec_b32 s0, -1
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v0, s32
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v1, s32 offset:4
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v2, s32 offset:8
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v3, s32 offset:12
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v6, s32 offset:24
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v7, s32 offset:28
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v8, s32 offset:32
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v9, s32 offset:36
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v10, s32 offset:40
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v11, s32 offset:44
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v12, s32 offset:48
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v13, s32 offset:52
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v14, s32 offset:56
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v15, s32 offset:60
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v16, s32 offset:64
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v17, s32 offset:68
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v18, s32 offset:72
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v19, s32 offset:76
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v20, s32 offset:80
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v21, s32 offset:84
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v22, s32 offset:88
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v23, s32 offset:92
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v24, s32 offset:96
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v25, s32 offset:100
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v26, s32 offset:104
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v27, s32 offset:108
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v28, s32 offset:112
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v29, s32 offset:116
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v30, s32 offset:120
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v31, s32 offset:124
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v32, s32 offset:128
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v33, s32 offset:132
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v34, s32 offset:136
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v35, s32 offset:140
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v36, s32 offset:144
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v37, s32 offset:148
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v38, s32 offset:152
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v39, s32 offset:156
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v48, s32 offset:160
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v49, s32 offset:164
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v50, s32 offset:168
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v51, s32 offset:172
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v52, s32 offset:176
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v53, s32 offset:180
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v54, s32 offset:184
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v55, s32 offset:188
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v64, s32 offset:192
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v65, s32 offset:196
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v66, s32 offset:200
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v67, s32 offset:204
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v68, s32 offset:208
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v69, s32 offset:212
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v70, s32 offset:216
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v71, s32 offset:220
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v80, s32 offset:224
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v81, s32 offset:228
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v82, s32 offset:232
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v83, s32 offset:236
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v84, s32 offset:240
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v85, s32 offset:244
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v86, s32 offset:248
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v87, s32 offset:252
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v96, s32 offset:256
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v97, s32 offset:260
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v98, s32 offset:264
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v99, s32 offset:268
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v100, s32 offset:272
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v101, s32 offset:276
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v102, s32 offset:280
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v103, s32 offset:284
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v112, s32 offset:288
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v113, s32 offset:292
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v114, s32 offset:296
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v115, s32 offset:300
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v116, s32 offset:304
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v117, s32 offset:308
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v118, s32 offset:312
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v119, s32 offset:316
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v128, s32 offset:320
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v129, s32 offset:324
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v130, s32 offset:328
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v131, s32 offset:332
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v132, s32 offset:336
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v133, s32 offset:340
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v134, s32 offset:344
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v135, s32 offset:348
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v144, s32 offset:352
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v145, s32 offset:356
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v146, s32 offset:360
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v147, s32 offset:364
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v148, s32 offset:368
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v149, s32 offset:372
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v150, s32 offset:376
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v151, s32 offset:380
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v160, s32 offset:384
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v161, s32 offset:388
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v162, s32 offset:392
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v163, s32 offset:396
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v164, s32 offset:400
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v165, s32 offset:404
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v166, s32 offset:408
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v167, s32 offset:412
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v176, s32 offset:416
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v177, s32 offset:420
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v178, s32 offset:424
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v179, s32 offset:428
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v180, s32 offset:432
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v181, s32 offset:436
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v182, s32 offset:440
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v183, s32 offset:444
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v192, s32 offset:448
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v193, s32 offset:452
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v194, s32 offset:456
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v195, s32 offset:460
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v196, s32 offset:464
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v197, s32 offset:468
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v198, s32 offset:472
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v199, s32 offset:476
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v208, s32 offset:480
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v209, s32 offset:484
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v210, s32 offset:488
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v211, s32 offset:492
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v212, s32 offset:496
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v213, s32 offset:500
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v214, s32 offset:504
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v215, s32 offset:508
; DAGISEL-NEXT: s_clause 0xf
; DAGISEL-NEXT: scratch_store_b32 off, v224, s32 offset:512
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v225, s32 offset:516
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v226, s32 offset:520
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v227, s32 offset:524
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v228, s32 offset:528
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v229, s32 offset:532
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v230, s32 offset:536
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v231, s32 offset:540
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v240, s32 offset:544
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v241, s32 offset:548
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v242, s32 offset:552
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v243, s32 offset:556
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v244, s32 offset:560
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v245, s32 offset:564
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v246, s32 offset:568
+; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v247, s32 offset:572
; DAGISEL-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
@@ -453,152 +592,291 @@ define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x,
; GISEL-NEXT: s_xor_saveexec_b32 s0, -1
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v0, s32
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v1, s32 offset:4
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v2, s32 offset:8
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v3, s32 offset:12
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v6, s32 offset:24
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v7, s32 offset:28
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v8, s32 offset:32
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v9, s32 offset:36
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v10, s32 offset:40
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v11, s32 offset:44
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v12, s32 offset:48
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v13, s32 offset:52
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v14, s32 offset:56
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v15, s32 offset:60
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v16, s32 offset:64
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v17, s32 offset:68
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v18, s32 offset:72
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v19, s32 offset:76
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v20, s32 offset:80
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v21, s32 offset:84
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v22, s32 offset:88
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v23, s32 offset:92
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v24, s32 offset:96
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v25, s32 offset:100
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v26, s32 offset:104
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v27, s32 offset:108
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v28, s32 offset:112
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v29, s32 offset:116
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v30, s32 offset:120
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v31, s32 offset:124
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v32, s32 offset:128
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v33, s32 offset:132
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v34, s32 offset:136
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v35, s32 offset:140
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v36, s32 offset:144
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v37, s32 offset:148
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v38, s32 offset:152
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v39, s32 offset:156
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v48, s32 offset:160
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v49, s32 offset:164
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v50, s32 offset:168
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v51, s32 offset:172
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v52, s32 offset:176
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v53, s32 offset:180
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v54, s32 offset:184
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v55, s32 offset:188
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v64, s32 offset:192
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v65, s32 offset:196
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v66, s32 offset:200
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v67, s32 offset:204
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v68, s32 offset:208
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v69, s32 offset:212
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v70, s32 offset:216
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v71, s32 offset:220
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v80, s32 offset:224
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v81, s32 offset:228
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v82, s32 offset:232
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v83, s32 offset:236
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v84, s32 offset:240
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v85, s32 offset:244
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v86, s32 offset:248
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v87, s32 offset:252
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v96, s32 offset:256
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v97, s32 offset:260
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v98, s32 offset:264
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v99, s32 offset:268
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v100, s32 offset:272
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v101, s32 offset:276
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v102, s32 offset:280
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v103, s32 offset:284
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v112, s32 offset:288
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v113, s32 offset:292
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v114, s32 offset:296
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v115, s32 offset:300
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v116, s32 offset:304
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v117, s32 offset:308
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v118, s32 offset:312
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v119, s32 offset:316
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v128, s32 offset:320
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v129, s32 offset:324
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v130, s32 offset:328
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v131, s32 offset:332
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v132, s32 offset:336
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v133, s32 offset:340
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v134, s32 offset:344
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v135, s32 offset:348
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v144, s32 offset:352
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v145, s32 offset:356
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v146, s32 offset:360
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v147, s32 offset:364
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v148, s32 offset:368
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v149, s32 offset:372
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v150, s32 offset:376
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v151, s32 offset:380
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v160, s32 offset:384
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v161, s32 offset:388
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v162, s32 offset:392
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v163, s32 offset:396
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v164, s32 offset:400
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v165, s32 offset:404
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v166, s32 offset:408
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v167, s32 offset:412
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v176, s32 offset:416
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v177, s32 offset:420
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v178, s32 offset:424
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v179, s32 offset:428
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v180, s32 offset:432
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v181, s32 offset:436
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v182, s32 offset:440
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v183, s32 offset:444
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v192, s32 offset:448
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v193, s32 offset:452
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v194, s32 offset:456
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v195, s32 offset:460
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v196, s32 offset:464
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v197, s32 offset:468
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v198, s32 offset:472
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v199, s32 offset:476
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v208, s32 offset:480
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v209, s32 offset:484
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v210, s32 offset:488
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v211, s32 offset:492
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v212, s32 offset:496
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v213, s32 offset:500
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v214, s32 offset:504
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v215, s32 offset:508
; GISEL-NEXT: s_clause 0xf
; GISEL-NEXT: scratch_store_b32 off, v224, s32 offset:512
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v225, s32 offset:516
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v226, s32 offset:520
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v227, s32 offset:524
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v228, s32 offset:528
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v229, s32 offset:532
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v230, s32 offset:536
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v231, s32 offset:540
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v240, s32 offset:544
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v241, s32 offset:548
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v242, s32 offset:552
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v243, s32 offset:556
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v244, s32 offset:560
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v245, s32 offset:564
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v246, s32 offset:568
+; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v247, s32 offset:572
; GISEL-NEXT: s_mov_b32 exec_lo, -1
; GISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
@@ -779,10 +1057,10 @@ define amdgpu_gfx void @ret_void(i32 %x) {
; DAGISEL-NEXT: s_wait_alu 0xfffe
; DAGISEL-NEXT: s_mov_b32 exec_lo, s1
; DAGISEL-NEXT: v_writelane_b32 v40, s0, 2
+; DAGISEL-NEXT: v_writelane_b32 v40, s30, 0
; DAGISEL-NEXT: s_mov_b32 s1, void_callee at abs32@hi
; DAGISEL-NEXT: s_mov_b32 s0, void_callee at abs32@lo
; DAGISEL-NEXT: s_add_co_i32 s32, s32, 16
-; DAGISEL-NEXT: v_writelane_b32 v40, s30, 0
; DAGISEL-NEXT: v_writelane_b32 v40, s31, 1
; DAGISEL-NEXT: s_wait_alu 0xfffe
; DAGISEL-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -814,10 +1092,10 @@ define amdgpu_gfx void @ret_void(i32 %x) {
; GISEL-NEXT: s_wait_alu 0xfffe
; GISEL-NEXT: s_mov_b32 exec_lo, s1
; GISEL-NEXT: v_writelane_b32 v40, s0, 2
+; GISEL-NEXT: v_writelane_b32 v40, s30, 0
; GISEL-NEXT: s_mov_b32 s0, void_callee at abs32@lo
; GISEL-NEXT: s_mov_b32 s1, void_callee at abs32@hi
; GISEL-NEXT: s_add_co_i32 s32, s32, 16
-; GISEL-NEXT: v_writelane_b32 v40, s30, 0
; GISEL-NEXT: v_writelane_b32 v40, s31, 1
; GISEL-NEXT: s_wait_alu 0xfffe
; GISEL-NEXT: s_swappc_b64 s[30:31], s[0:1]
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
index 2889f37a65d97..7f6bb85827d31 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
@@ -33,19 +33,21 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr,
; GISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GISEL-GFX11-NEXT: s_mov_b32 s4, use at abs32@lo
; GISEL-GFX11-NEXT: s_mov_b32 s5, use at abs32@hi
-; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX11-NEXT: s_endpgm
;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
@@ -58,26 +60,27 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr,
; GISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
; GISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
-; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX10-NEXT: s_endpgm
;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v6, v10
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v4, v8
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; DAGISEL-GFX11-NEXT: s_mov_b32 s5, use at abs32@hi
; DAGISEL-GFX11-NEXT: s_mov_b32 s4, use at abs32@lo
-; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
+; DAGISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX11-NEXT: s_endpgm
;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
@@ -90,7 +93,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr,
; DAGISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
; DAGISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
-; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX10-NEXT: s_endpgm
call amdgpu_gfx void @use(<4 x i32> %sgpr, <4 x i32> %vgpr)
@@ -102,7 +104,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
-; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
+; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 4
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; GISEL-GFX11-NEXT: scratch_store_b32 off, v17, s24
@@ -123,6 +125,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
; GISEL-GFX11-NEXT: scratch_store_b32 off, v25, s25
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 40
+; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
; GISEL-GFX11-NEXT: v_dual_mov_b32 v34, v10 :: v_dual_mov_b32 v35, v11
; GISEL-GFX11-NEXT: v_dual_mov_b32 v36, v12 :: v_dual_mov_b32 v37, v13
; GISEL-GFX11-NEXT: v_dual_mov_b32 v38, v14 :: v_dual_mov_b32 v39, v15
@@ -162,6 +165,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v32, v8
; GISEL-GFX10-NEXT: v_mov_b32_e32 v33, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v34, v10
@@ -170,7 +174,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX10-NEXT: v_mov_b32_e32 v37, v13
; GISEL-GFX10-NEXT: v_mov_b32_e32 v38, v14
; GISEL-GFX10-NEXT: v_mov_b32_e32 v39, v15
-; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
; GISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
; GISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
@@ -230,7 +233,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
-; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
+; DAGISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 60
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v31, s24
@@ -251,6 +254,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v23, s25
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 24
+; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v34, v13 :: v_dual_mov_b32 v35, v12
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v36, v11 :: v_dual_mov_b32 v37, v10
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v38, v9 :: v_dual_mov_b32 v39, v8
@@ -290,6 +294,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v32, v15
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v33, v14
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v34, v13
@@ -298,7 +303,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v37, v10
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v38, v9
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v39, v8
-; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
; DAGISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
; DAGISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
@@ -361,10 +365,10 @@ define amdgpu_cs_chain void @alloca_and_call() {
; GISEL-GFX11-LABEL: alloca_and_call:
; GISEL-GFX11: ; %bb.0: ; %.entry
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-GFX11-NEXT: s_mov_b32 s32, 16
; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 42
; GISEL-GFX11-NEXT: s_mov_b32 s0, use at abs32@lo
; GISEL-GFX11-NEXT: s_mov_b32 s1, use at abs32@hi
-; GISEL-GFX11-NEXT: s_mov_b32 s32, 16
; GISEL-GFX11-NEXT: scratch_store_b32 off, v0, off
; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -373,6 +377,7 @@ define amdgpu_cs_chain void @alloca_and_call() {
; GISEL-GFX10-LABEL: alloca_and_call:
; GISEL-GFX10: ; %bb.0: ; %.entry
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 42
; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; GISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
@@ -380,17 +385,16 @@ define amdgpu_cs_chain void @alloca_and_call() {
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; GISEL-GFX10-NEXT: buffer_store_dword v0, off, s[48:51], 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX10-NEXT: s_endpgm
;
; DAGISEL-GFX11-LABEL: alloca_and_call:
; DAGISEL-GFX11: ; %bb.0: ; %.entry
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 16
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v0, 42
; DAGISEL-GFX11-NEXT: s_mov_b32 s1, use at abs32@hi
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, use at abs32@lo
-; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 16
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v0, off
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -399,6 +403,7 @@ define amdgpu_cs_chain void @alloca_and_call() {
; DAGISEL-GFX10-LABEL: alloca_and_call:
; DAGISEL-GFX10: ; %bb.0: ; %.entry
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; DAGISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 42
; DAGISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; DAGISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
@@ -406,7 +411,6 @@ define amdgpu_cs_chain void @alloca_and_call() {
; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; DAGISEL-GFX10-NEXT: buffer_store_dword v0, off, s[48:51], 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0
-; DAGISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX10-NEXT: s_endpgm
.entry:
diff --git a/llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir b/llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
index a2ec87053a8d5..4f1a6cb2c48d8 100644
--- a/llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
+++ b/llvm/test/CodeGen/AMDGPU/av_spill_cross_bb_usage.mir
@@ -27,8 +27,473 @@ body: |
; GCN-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GCN-NEXT: liveins: $sgpr30, $sgpr31, $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr105
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr106
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr107
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr108
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr109
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr110
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr111
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr112
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr113
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr114
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr115
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr116
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr117
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr118
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr119
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr120
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr121
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr122
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr123
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr124
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr125
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr126
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr127
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr128
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr129
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr130
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr131
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr132
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr133
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr134
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr135
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr136
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr137
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr138
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr139
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr140
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr141
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr142
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr143
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr144
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr145
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr146
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr147
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr148
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr149
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr150
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr151
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr152
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr153
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr154
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr155
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr156
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr157
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr158
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr159
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr160
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr161
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr162
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr163
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr164
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr165
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr166
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr167
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr168
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr169
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr170
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr171
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr172
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr173
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr174
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr175
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr176
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr177
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr178
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr179
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr180
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr181
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr182
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr183
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr184
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr185
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr186
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr187
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr188
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr189
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr190
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr191
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr192
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr193
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr194
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr195
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr196
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr197
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr198
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr199
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr200
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr201
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr202
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr203
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr204
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr205
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr206
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr207
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr208
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr209
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr210
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr211
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr212
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr213
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr214
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr215
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr216
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr217
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr218
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr219
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr220
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr221
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr222
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr223
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr224
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr225
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr226
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr227
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr228
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr229
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr230
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr231
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr232
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr233
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr234
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr235
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr236
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr237
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr238
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr239
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr240
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr241
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr242
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr243
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr244
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr245
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr246
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr247
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr248
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr249
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr250
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr251
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr252
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr253
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr254
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr255
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GCN-NEXT: $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 68, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 4352
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 44, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 40, 0, 0, implicit $exec :: (store (s32) into %stack.5, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir b/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
index 7336a54ae42db..72b6b9f9ec686 100644
--- a/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
@@ -19,11 +19,17 @@ body: |
; GCN-NEXT: successors: %bb.1(0x80000000)
; GCN-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $agpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: $vgpr63 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr63, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $agpr0, 0
; GCN-NEXT: $exec = S_MOV_B64 -1
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr62, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr62, 256
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: renamable $vgpr62 = IMPLICIT_DEF
; GCN-NEXT: $vgpr62 = SI_SPILL_S32_TO_VGPR $sgpr15, 0, killed $vgpr62
diff --git a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
index c407f7645315d..360ea2befda20 100644
--- a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
@@ -7129,6 +7129,7 @@ define void @stack_12xv3i32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 11
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7137,7 +7138,6 @@ define void @stack_12xv3i32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 13
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; VI-NEXT: v_mov_b32_e32 v0, 14
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; VI-NEXT: v_mov_b32_e32 v0, 15
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7197,6 +7197,7 @@ define void @stack_12xv3i32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 11
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7205,7 +7206,6 @@ define void @stack_12xv3i32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 13
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; CI-NEXT: v_mov_b32_e32 v0, 14
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; CI-NEXT: v_mov_b32_e32 v0, 15
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7265,6 +7265,7 @@ define void @stack_12xv3i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 11
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7273,7 +7274,6 @@ define void @stack_12xv3i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 14
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -7383,6 +7383,7 @@ define void @stack_12xv3i32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 11
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7391,7 +7392,6 @@ define void @stack_12xv3i32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 13
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; HSA-NEXT: v_mov_b32_e32 v0, 14
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; HSA-NEXT: v_mov_b32_e32 v0, 15
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -7468,6 +7468,7 @@ define void @stack_12xv3f32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 0x41300000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7476,7 +7477,6 @@ define void @stack_12xv3f32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 0x41500000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; VI-NEXT: v_mov_b32_e32 v0, 0x41600000
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; VI-NEXT: v_mov_b32_e32 v0, 0x41700000
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7536,6 +7536,7 @@ define void @stack_12xv3f32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 0x41300000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7544,7 +7545,6 @@ define void @stack_12xv3f32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 0x41500000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; CI-NEXT: v_mov_b32_e32 v0, 0x41600000
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; CI-NEXT: v_mov_b32_e32 v0, 0x41700000
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7604,6 +7604,7 @@ define void @stack_12xv3f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41300000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7612,7 +7613,6 @@ define void @stack_12xv3f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -7726,6 +7726,7 @@ define void @stack_12xv3f32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 0x41300000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7734,7 +7735,6 @@ define void @stack_12xv3f32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 0x41500000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; HSA-NEXT: v_mov_b32_e32 v0, 0x41600000
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; HSA-NEXT: v_mov_b32_e32 v0, 0x41700000
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -7811,6 +7811,7 @@ define void @stack_8xv5i32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 7
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7827,7 +7828,6 @@ define void @stack_8xv5i32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 13
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; VI-NEXT: v_mov_b32_e32 v0, 14
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; VI-NEXT: v_mov_b32_e32 v0, 15
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7887,6 +7887,7 @@ define void @stack_8xv5i32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 7
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7903,7 +7904,6 @@ define void @stack_8xv5i32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 13
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; CI-NEXT: v_mov_b32_e32 v0, 14
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; CI-NEXT: v_mov_b32_e32 v0, 15
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7963,6 +7963,7 @@ define void @stack_8xv5i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 7
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7979,7 +7980,6 @@ define void @stack_8xv5i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 14
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -8094,6 +8094,7 @@ define void @stack_8xv5i32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 7
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8110,7 +8111,6 @@ define void @stack_8xv5i32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 13
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; HSA-NEXT: v_mov_b32_e32 v0, 14
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; HSA-NEXT: v_mov_b32_e32 v0, 15
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -8183,6 +8183,7 @@ define void @stack_8xv5f32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 0x40e00000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8199,7 +8200,6 @@ define void @stack_8xv5f32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 0x41500000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; VI-NEXT: v_mov_b32_e32 v0, 0x41600000
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; VI-NEXT: v_mov_b32_e32 v0, 0x41700000
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -8259,6 +8259,7 @@ define void @stack_8xv5f32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 0x40e00000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8275,7 +8276,6 @@ define void @stack_8xv5f32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 0x41500000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; CI-NEXT: v_mov_b32_e32 v0, 0x41600000
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; CI-NEXT: v_mov_b32_e32 v0, 0x41700000
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -8335,6 +8335,7 @@ define void @stack_8xv5f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x40e00000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8351,7 +8352,6 @@ define void @stack_8xv5f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -8469,6 +8469,7 @@ define void @stack_8xv5f32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 0x40e00000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8485,7 +8486,6 @@ define void @stack_8xv5f32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 0x41500000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; HSA-NEXT: v_mov_b32_e32 v0, 0x41600000
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; HSA-NEXT: v_mov_b32_e32 v0, 0x41700000
; HSA-NEXT: v_writelane_b32 v40, s30, 0
diff --git a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
index 5f965ba431ab5..e691fdaea67e3 100644
--- a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
+++ b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
@@ -420,8 +420,8 @@ define void @func_indirect_use_workitem_id_x() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_x at gotpcrel32@hi+12
@@ -453,8 +453,8 @@ define void @func_indirect_use_workitem_id_y() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_y at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_y at gotpcrel32@hi+12
@@ -486,8 +486,8 @@ define void @func_indirect_use_workitem_id_z() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_z at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_z at gotpcrel32@hi+12
@@ -939,8 +939,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GFX7-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[6:7]
-; GFX7-NEXT: s_addk_i32 s32, 0x400
; GFX7-NEXT: v_writelane_b32 v40, s4, 2
+; GFX7-NEXT: s_addk_i32 s32, 0x400
; GFX7-NEXT: s_getpc_b64 s[4:5]
; GFX7-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GFX7-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1003,8 +1003,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GFX90A-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX90A-NEXT: s_mov_b64 exec, s[6:7]
-; GFX90A-NEXT: s_addk_i32 s32, 0x400
; GFX90A-NEXT: v_writelane_b32 v40, s4, 2
+; GFX90A-NEXT: s_addk_i32 s32, 0x400
; GFX90A-NEXT: s_getpc_b64 s[4:5]
; GFX90A-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GFX90A-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1081,9 +1081,9 @@ define void @too_many_args_call_too_many_args_use_workitem_id_x(
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GCN-NEXT: s_addk_i32 s32, 0x400
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1396,6 +1396,7 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: v_mov_b32_e32 v0, 0x3e7
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s33
@@ -1403,7 +1404,6 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: v_mov_b32_e32 v0, 0x140
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s33
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x_byval at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x_byval at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
index bb2f06bfe83f8..2854bdca76d01 100644
--- a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
+++ b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
@@ -265,8 +265,8 @@ define void @func_indirect_use_workitem_id_x() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_x at gotpcrel32@hi+12
@@ -298,8 +298,8 @@ define void @func_indirect_use_workitem_id_y() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_y at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_y at gotpcrel32@hi+12
@@ -331,8 +331,8 @@ define void @func_indirect_use_workitem_id_z() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_z at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_z at gotpcrel32@hi+12
@@ -651,8 +651,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -729,9 +729,9 @@ define void @too_many_args_call_too_many_args_use_workitem_id_x(
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GCN-NEXT: s_addk_i32 s32, 0x400
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -970,6 +970,7 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: v_mov_b32_e32 v0, 0x3e7
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s33
@@ -977,7 +978,6 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: v_mov_b32_e32 v0, 0x140
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s33
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x_byval at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x_byval at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir b/llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
index 6504f48333485..209ac8e811456 100644
--- a/llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
+++ b/llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
@@ -15,6 +15,12 @@ body: |
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
; CHECK-NEXT: S_NOP 0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
diff --git a/llvm/test/CodeGen/AMDGPU/debug-frame.ll b/llvm/test/CodeGen/AMDGPU/debug-frame.ll
index 40ff6ccf0cb0f..676144e65c10f 100644
--- a/llvm/test/CodeGen/AMDGPU/debug-frame.ll
+++ b/llvm/test/CodeGen/AMDGPU/debug-frame.ll
@@ -22,6 +22,8 @@ define hidden void @func_no_clobber() #0 {
; CHECK: .Lfunc_begin1:
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0: ; %entry
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
entry:
@@ -33,9 +35,183 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX900: .Lfunc_begin2:
; GFX900-NEXT: .cfi_startproc
; GFX900-NEXT: ; %bb.0:
+; GFX900-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX900-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX900-NEXT: .cfi_undefined 2560
+; GFX900-NEXT: .cfi_undefined 2561
+; GFX900-NEXT: .cfi_undefined 2562
+; GFX900-NEXT: .cfi_undefined 2563
+; GFX900-NEXT: .cfi_undefined 2564
+; GFX900-NEXT: .cfi_undefined 2565
+; GFX900-NEXT: .cfi_undefined 2566
+; GFX900-NEXT: .cfi_undefined 2567
+; GFX900-NEXT: .cfi_undefined 2568
+; GFX900-NEXT: .cfi_undefined 2569
+; GFX900-NEXT: .cfi_undefined 2570
+; GFX900-NEXT: .cfi_undefined 2571
+; GFX900-NEXT: .cfi_undefined 2572
+; GFX900-NEXT: .cfi_undefined 2573
+; GFX900-NEXT: .cfi_undefined 2574
+; GFX900-NEXT: .cfi_undefined 2575
+; GFX900-NEXT: .cfi_undefined 2576
+; GFX900-NEXT: .cfi_undefined 2577
+; GFX900-NEXT: .cfi_undefined 2578
+; GFX900-NEXT: .cfi_undefined 2579
+; GFX900-NEXT: .cfi_undefined 2580
+; GFX900-NEXT: .cfi_undefined 2581
+; GFX900-NEXT: .cfi_undefined 2582
+; GFX900-NEXT: .cfi_undefined 2583
+; GFX900-NEXT: .cfi_undefined 2584
+; GFX900-NEXT: .cfi_undefined 2585
+; GFX900-NEXT: .cfi_undefined 2586
+; GFX900-NEXT: .cfi_undefined 2587
+; GFX900-NEXT: .cfi_undefined 2588
+; GFX900-NEXT: .cfi_undefined 2589
+; GFX900-NEXT: .cfi_undefined 2590
+; GFX900-NEXT: .cfi_undefined 2591
+; GFX900-NEXT: .cfi_undefined 2592
+; GFX900-NEXT: .cfi_undefined 2593
+; GFX900-NEXT: .cfi_undefined 2594
+; GFX900-NEXT: .cfi_undefined 2595
+; GFX900-NEXT: .cfi_undefined 2596
+; GFX900-NEXT: .cfi_undefined 2597
+; GFX900-NEXT: .cfi_undefined 2598
+; GFX900-NEXT: .cfi_undefined 2599
+; GFX900-NEXT: .cfi_undefined 2608
+; GFX900-NEXT: .cfi_undefined 2609
+; GFX900-NEXT: .cfi_undefined 2610
+; GFX900-NEXT: .cfi_undefined 2611
+; GFX900-NEXT: .cfi_undefined 2612
+; GFX900-NEXT: .cfi_undefined 2613
+; GFX900-NEXT: .cfi_undefined 2614
+; GFX900-NEXT: .cfi_undefined 2615
+; GFX900-NEXT: .cfi_undefined 2624
+; GFX900-NEXT: .cfi_undefined 2625
+; GFX900-NEXT: .cfi_undefined 2626
+; GFX900-NEXT: .cfi_undefined 2627
+; GFX900-NEXT: .cfi_undefined 2628
+; GFX900-NEXT: .cfi_undefined 2629
+; GFX900-NEXT: .cfi_undefined 2630
+; GFX900-NEXT: .cfi_undefined 2631
+; GFX900-NEXT: .cfi_undefined 2640
+; GFX900-NEXT: .cfi_undefined 2641
+; GFX900-NEXT: .cfi_undefined 2642
+; GFX900-NEXT: .cfi_undefined 2643
+; GFX900-NEXT: .cfi_undefined 2644
+; GFX900-NEXT: .cfi_undefined 2645
+; GFX900-NEXT: .cfi_undefined 2646
+; GFX900-NEXT: .cfi_undefined 2647
+; GFX900-NEXT: .cfi_undefined 2656
+; GFX900-NEXT: .cfi_undefined 2657
+; GFX900-NEXT: .cfi_undefined 2658
+; GFX900-NEXT: .cfi_undefined 2659
+; GFX900-NEXT: .cfi_undefined 2660
+; GFX900-NEXT: .cfi_undefined 2661
+; GFX900-NEXT: .cfi_undefined 2662
+; GFX900-NEXT: .cfi_undefined 2663
+; GFX900-NEXT: .cfi_undefined 2672
+; GFX900-NEXT: .cfi_undefined 2673
+; GFX900-NEXT: .cfi_undefined 2674
+; GFX900-NEXT: .cfi_undefined 2675
+; GFX900-NEXT: .cfi_undefined 2676
+; GFX900-NEXT: .cfi_undefined 2677
+; GFX900-NEXT: .cfi_undefined 2678
+; GFX900-NEXT: .cfi_undefined 2679
+; GFX900-NEXT: .cfi_undefined 2688
+; GFX900-NEXT: .cfi_undefined 2689
+; GFX900-NEXT: .cfi_undefined 2690
+; GFX900-NEXT: .cfi_undefined 2691
+; GFX900-NEXT: .cfi_undefined 2692
+; GFX900-NEXT: .cfi_undefined 2693
+; GFX900-NEXT: .cfi_undefined 2694
+; GFX900-NEXT: .cfi_undefined 2695
+; GFX900-NEXT: .cfi_undefined 2704
+; GFX900-NEXT: .cfi_undefined 2705
+; GFX900-NEXT: .cfi_undefined 2706
+; GFX900-NEXT: .cfi_undefined 2707
+; GFX900-NEXT: .cfi_undefined 2708
+; GFX900-NEXT: .cfi_undefined 2709
+; GFX900-NEXT: .cfi_undefined 2710
+; GFX900-NEXT: .cfi_undefined 2711
+; GFX900-NEXT: .cfi_undefined 2720
+; GFX900-NEXT: .cfi_undefined 2721
+; GFX900-NEXT: .cfi_undefined 2722
+; GFX900-NEXT: .cfi_undefined 2723
+; GFX900-NEXT: .cfi_undefined 2724
+; GFX900-NEXT: .cfi_undefined 2725
+; GFX900-NEXT: .cfi_undefined 2726
+; GFX900-NEXT: .cfi_undefined 2727
+; GFX900-NEXT: .cfi_undefined 2736
+; GFX900-NEXT: .cfi_undefined 2737
+; GFX900-NEXT: .cfi_undefined 2738
+; GFX900-NEXT: .cfi_undefined 2739
+; GFX900-NEXT: .cfi_undefined 2740
+; GFX900-NEXT: .cfi_undefined 2741
+; GFX900-NEXT: .cfi_undefined 2742
+; GFX900-NEXT: .cfi_undefined 2743
+; GFX900-NEXT: .cfi_undefined 2752
+; GFX900-NEXT: .cfi_undefined 2753
+; GFX900-NEXT: .cfi_undefined 2754
+; GFX900-NEXT: .cfi_undefined 2755
+; GFX900-NEXT: .cfi_undefined 2756
+; GFX900-NEXT: .cfi_undefined 2757
+; GFX900-NEXT: .cfi_undefined 2758
+; GFX900-NEXT: .cfi_undefined 2759
+; GFX900-NEXT: .cfi_undefined 2768
+; GFX900-NEXT: .cfi_undefined 2769
+; GFX900-NEXT: .cfi_undefined 2770
+; GFX900-NEXT: .cfi_undefined 2771
+; GFX900-NEXT: .cfi_undefined 2772
+; GFX900-NEXT: .cfi_undefined 2773
+; GFX900-NEXT: .cfi_undefined 2774
+; GFX900-NEXT: .cfi_undefined 2775
+; GFX900-NEXT: .cfi_undefined 2784
+; GFX900-NEXT: .cfi_undefined 2785
+; GFX900-NEXT: .cfi_undefined 2786
+; GFX900-NEXT: .cfi_undefined 2787
+; GFX900-NEXT: .cfi_undefined 2788
+; GFX900-NEXT: .cfi_undefined 2789
+; GFX900-NEXT: .cfi_undefined 2790
+; GFX900-NEXT: .cfi_undefined 2791
+; GFX900-NEXT: .cfi_undefined 2800
+; GFX900-NEXT: .cfi_undefined 2801
+; GFX900-NEXT: .cfi_undefined 2802
+; GFX900-NEXT: .cfi_undefined 2803
+; GFX900-NEXT: .cfi_undefined 2804
+; GFX900-NEXT: .cfi_undefined 2805
+; GFX900-NEXT: .cfi_undefined 2806
+; GFX900-NEXT: .cfi_undefined 2807
+; GFX900-NEXT: .cfi_undefined 36
+; GFX900-NEXT: .cfi_undefined 37
+; GFX900-NEXT: .cfi_undefined 38
+; GFX900-NEXT: .cfi_undefined 39
+; GFX900-NEXT: .cfi_undefined 40
+; GFX900-NEXT: .cfi_undefined 41
+; GFX900-NEXT: .cfi_undefined 42
+; GFX900-NEXT: .cfi_undefined 43
+; GFX900-NEXT: .cfi_undefined 44
+; GFX900-NEXT: .cfi_undefined 45
+; GFX900-NEXT: .cfi_undefined 46
+; GFX900-NEXT: .cfi_undefined 47
+; GFX900-NEXT: .cfi_undefined 48
+; GFX900-NEXT: .cfi_undefined 49
+; GFX900-NEXT: .cfi_undefined 50
+; GFX900-NEXT: .cfi_undefined 51
+; GFX900-NEXT: .cfi_undefined 52
+; GFX900-NEXT: .cfi_undefined 53
+; GFX900-NEXT: .cfi_undefined 54
+; GFX900-NEXT: .cfi_undefined 55
+; GFX900-NEXT: .cfi_undefined 56
+; GFX900-NEXT: .cfi_undefined 57
+; GFX900-NEXT: .cfi_undefined 58
+; GFX900-NEXT: .cfi_undefined 59
+; GFX900-NEXT: .cfi_undefined 60
+; GFX900-NEXT: .cfi_undefined 61
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-NEXT: s_mov_b32 s40, s33
+; GFX900-NEXT: .cfi_register 65, 72
; GFX900-NEXT: s_mov_b32 s33, s32
+; GFX900-NEXT: .cfi_def_cfa_register 65
; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill
; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill
; GFX900-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill
@@ -268,6 +444,7 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Reload
; GFX900-NEXT: s_addk_i32 s32, 0x7100
; GFX900-NEXT: s_mov_b32 s32, s33
+; GFX900-NEXT: .cfi_def_cfa_register 64
; GFX900-NEXT: s_mov_b32 s33, s40
; GFX900-NEXT: s_waitcnt vmcnt(0)
; GFX900-NEXT: s_setpc_b64 s[30:31]
@@ -276,9 +453,183 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX90A-V2A-DIS: .Lfunc_begin2:
; GFX90A-V2A-DIS-NEXT: .cfi_startproc
; GFX90A-V2A-DIS-NEXT: ; %bb.0:
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2562
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2563
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2564
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2565
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2566
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2567
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2568
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2569
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2570
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2571
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2572
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2573
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2574
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2575
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2576
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2577
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2578
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2579
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2580
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2581
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2582
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2583
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2584
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2585
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2586
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2587
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2588
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2589
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2590
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2591
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2592
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2593
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2594
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2595
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2596
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2597
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2598
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2599
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2608
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2609
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2610
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2611
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2612
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2613
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2614
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2615
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2624
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2625
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2626
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2627
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2628
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2629
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2630
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2631
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2640
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2641
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2642
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2643
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2644
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2645
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2646
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2647
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2656
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2657
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2658
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2659
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2660
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2661
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2662
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2663
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2672
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2673
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2674
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2675
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2676
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2677
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2678
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2679
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2688
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2689
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2690
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2691
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2692
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2693
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2694
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2695
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2704
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2705
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2706
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2707
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2708
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2709
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2710
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2711
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2720
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2721
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2722
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2723
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2724
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2725
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2726
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2727
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2736
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2737
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2738
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2739
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2740
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2741
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2742
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2743
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2752
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2753
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2754
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2755
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2756
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2757
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2758
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2759
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2768
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2769
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2770
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2771
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2772
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2773
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2774
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2775
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2784
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2785
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2786
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2787
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2788
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2789
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2790
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2791
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2800
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2801
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2802
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2803
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2804
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2805
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2806
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2807
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 36
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 37
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 38
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 39
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 40
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 41
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 42
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 43
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 44
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 45
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 46
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 47
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 48
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 49
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 50
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 51
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 52
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 53
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 54
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 55
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 56
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 57
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 58
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 59
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 60
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 61
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s40, s33
+; GFX90A-V2A-DIS-NEXT: .cfi_register 65, 72
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s32
+; GFX90A-V2A-DIS-NEXT: .cfi_def_cfa_register 65
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill
@@ -511,6 +862,7 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Reload
; GFX90A-V2A-DIS-NEXT: s_addk_i32 s32, 0x7100
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s32, s33
+; GFX90A-V2A-DIS-NEXT: .cfi_def_cfa_register 64
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s40
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0)
; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31]
@@ -519,9 +871,215 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX90A-V2A-EN: .Lfunc_begin2:
; GFX90A-V2A-EN-NEXT: .cfi_startproc
; GFX90A-V2A-EN-NEXT: ; %bb.0:
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2562
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2563
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2564
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2565
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2566
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2567
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2568
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2569
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2570
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2571
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2572
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2573
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2574
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2575
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2576
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2577
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2578
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2579
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2580
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2581
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2582
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2583
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2584
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2585
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2586
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2587
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2588
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2589
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2590
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2591
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2592
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2593
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2594
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2595
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2596
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2597
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2598
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2599
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2608
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2609
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2610
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2611
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2612
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2613
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2614
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2615
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2624
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2625
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2626
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2627
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2628
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2629
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2630
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2631
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2640
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2641
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2642
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2643
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2644
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2645
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2646
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2647
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2656
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2657
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2658
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2659
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2660
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2661
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2662
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2663
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2672
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2673
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2674
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2675
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2676
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2677
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2678
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2679
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2688
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2689
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2690
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2691
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2692
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2693
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2694
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2695
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2704
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2705
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2706
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2707
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2708
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2709
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2710
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2711
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2720
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2721
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2722
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2723
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2724
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2725
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2726
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2727
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2736
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2737
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2738
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2739
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2740
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2741
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2742
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2743
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2752
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2753
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2754
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2755
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2756
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2757
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2758
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2759
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2768
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2769
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2770
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2771
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2772
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2773
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2774
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2775
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2784
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2785
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2786
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2787
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2788
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2789
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2790
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2791
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2800
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2801
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2802
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2803
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2804
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2805
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2806
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2807
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3072
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3073
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3074
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3075
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3076
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3077
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3078
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3079
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3080
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3081
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3082
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3083
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3084
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3085
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3086
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3087
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3088
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3089
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3090
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3091
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3092
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3093
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3094
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3095
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3096
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3097
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3098
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3099
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3100
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3101
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3102
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3103
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 36
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 37
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 38
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 39
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 40
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 41
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 42
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 43
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 44
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 45
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 46
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 47
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 48
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 49
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 50
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 51
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 52
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 53
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 54
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 55
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 56
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 57
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 58
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 59
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 60
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 61
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-EN-NEXT: s_mov_b32 s40, s33
+; GFX90A-V2A-EN-NEXT: .cfi_register 65, 72
; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s32
+; GFX90A-V2A-EN-NEXT: .cfi_def_cfa_register 65
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a2, v42 ; Reload Reuse
@@ -754,6 +1312,7 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v41, a1 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v40, a0 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: s_mov_b32 s32, s33
+; GFX90A-V2A-EN-NEXT: .cfi_def_cfa_register 64
; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s40
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0)
; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31]
@@ -762,9 +1321,183 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; WAVE32: .Lfunc_begin2:
; WAVE32-NEXT: .cfi_startproc
; WAVE32-NEXT: ; %bb.0:
+; WAVE32-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE32-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; WAVE32-NEXT: .cfi_undefined 1536
+; WAVE32-NEXT: .cfi_undefined 1537
+; WAVE32-NEXT: .cfi_undefined 1538
+; WAVE32-NEXT: .cfi_undefined 1539
+; WAVE32-NEXT: .cfi_undefined 1540
+; WAVE32-NEXT: .cfi_undefined 1541
+; WAVE32-NEXT: .cfi_undefined 1542
+; WAVE32-NEXT: .cfi_undefined 1543
+; WAVE32-NEXT: .cfi_undefined 1544
+; WAVE32-NEXT: .cfi_undefined 1545
+; WAVE32-NEXT: .cfi_undefined 1546
+; WAVE32-NEXT: .cfi_undefined 1547
+; WAVE32-NEXT: .cfi_undefined 1548
+; WAVE32-NEXT: .cfi_undefined 1549
+; WAVE32-NEXT: .cfi_undefined 1550
+; WAVE32-NEXT: .cfi_undefined 1551
+; WAVE32-NEXT: .cfi_undefined 1552
+; WAVE32-NEXT: .cfi_undefined 1553
+; WAVE32-NEXT: .cfi_undefined 1554
+; WAVE32-NEXT: .cfi_undefined 1555
+; WAVE32-NEXT: .cfi_undefined 1556
+; WAVE32-NEXT: .cfi_undefined 1557
+; WAVE32-NEXT: .cfi_undefined 1558
+; WAVE32-NEXT: .cfi_undefined 1559
+; WAVE32-NEXT: .cfi_undefined 1560
+; WAVE32-NEXT: .cfi_undefined 1561
+; WAVE32-NEXT: .cfi_undefined 1562
+; WAVE32-NEXT: .cfi_undefined 1563
+; WAVE32-NEXT: .cfi_undefined 1564
+; WAVE32-NEXT: .cfi_undefined 1565
+; WAVE32-NEXT: .cfi_undefined 1566
+; WAVE32-NEXT: .cfi_undefined 1567
+; WAVE32-NEXT: .cfi_undefined 1568
+; WAVE32-NEXT: .cfi_undefined 1569
+; WAVE32-NEXT: .cfi_undefined 1570
+; WAVE32-NEXT: .cfi_undefined 1571
+; WAVE32-NEXT: .cfi_undefined 1572
+; WAVE32-NEXT: .cfi_undefined 1573
+; WAVE32-NEXT: .cfi_undefined 1574
+; WAVE32-NEXT: .cfi_undefined 1575
+; WAVE32-NEXT: .cfi_undefined 1584
+; WAVE32-NEXT: .cfi_undefined 1585
+; WAVE32-NEXT: .cfi_undefined 1586
+; WAVE32-NEXT: .cfi_undefined 1587
+; WAVE32-NEXT: .cfi_undefined 1588
+; WAVE32-NEXT: .cfi_undefined 1589
+; WAVE32-NEXT: .cfi_undefined 1590
+; WAVE32-NEXT: .cfi_undefined 1591
+; WAVE32-NEXT: .cfi_undefined 1600
+; WAVE32-NEXT: .cfi_undefined 1601
+; WAVE32-NEXT: .cfi_undefined 1602
+; WAVE32-NEXT: .cfi_undefined 1603
+; WAVE32-NEXT: .cfi_undefined 1604
+; WAVE32-NEXT: .cfi_undefined 1605
+; WAVE32-NEXT: .cfi_undefined 1606
+; WAVE32-NEXT: .cfi_undefined 1607
+; WAVE32-NEXT: .cfi_undefined 1616
+; WAVE32-NEXT: .cfi_undefined 1617
+; WAVE32-NEXT: .cfi_undefined 1618
+; WAVE32-NEXT: .cfi_undefined 1619
+; WAVE32-NEXT: .cfi_undefined 1620
+; WAVE32-NEXT: .cfi_undefined 1621
+; WAVE32-NEXT: .cfi_undefined 1622
+; WAVE32-NEXT: .cfi_undefined 1623
+; WAVE32-NEXT: .cfi_undefined 1632
+; WAVE32-NEXT: .cfi_undefined 1633
+; WAVE32-NEXT: .cfi_undefined 1634
+; WAVE32-NEXT: .cfi_undefined 1635
+; WAVE32-NEXT: .cfi_undefined 1636
+; WAVE32-NEXT: .cfi_undefined 1637
+; WAVE32-NEXT: .cfi_undefined 1638
+; WAVE32-NEXT: .cfi_undefined 1639
+; WAVE32-NEXT: .cfi_undefined 1648
+; WAVE32-NEXT: .cfi_undefined 1649
+; WAVE32-NEXT: .cfi_undefined 1650
+; WAVE32-NEXT: .cfi_undefined 1651
+; WAVE32-NEXT: .cfi_undefined 1652
+; WAVE32-NEXT: .cfi_undefined 1653
+; WAVE32-NEXT: .cfi_undefined 1654
+; WAVE32-NEXT: .cfi_undefined 1655
+; WAVE32-NEXT: .cfi_undefined 1664
+; WAVE32-NEXT: .cfi_undefined 1665
+; WAVE32-NEXT: .cfi_undefined 1666
+; WAVE32-NEXT: .cfi_undefined 1667
+; WAVE32-NEXT: .cfi_undefined 1668
+; WAVE32-NEXT: .cfi_undefined 1669
+; WAVE32-NEXT: .cfi_undefined 1670
+; WAVE32-NEXT: .cfi_undefined 1671
+; WAVE32-NEXT: .cfi_undefined 1680
+; WAVE32-NEXT: .cfi_undefined 1681
+; WAVE32-NEXT: .cfi_undefined 1682
+; WAVE32-NEXT: .cfi_undefined 1683
+; WAVE32-NEXT: .cfi_undefined 1684
+; WAVE32-NEXT: .cfi_undefined 1685
+; WAVE32-NEXT: .cfi_undefined 1686
+; WAVE32-NEXT: .cfi_undefined 1687
+; WAVE32-NEXT: .cfi_undefined 1696
+; WAVE32-NEXT: .cfi_undefined 1697
+; WAVE32-NEXT: .cfi_undefined 1698
+; WAVE32-NEXT: .cfi_undefined 1699
+; WAVE32-NEXT: .cfi_undefined 1700
+; WAVE32-NEXT: .cfi_undefined 1701
+; WAVE32-NEXT: .cfi_undefined 1702
+; WAVE32-NEXT: .cfi_undefined 1703
+; WAVE32-NEXT: .cfi_undefined 1712
+; WAVE32-NEXT: .cfi_undefined 1713
+; WAVE32-NEXT: .cfi_undefined 1714
+; WAVE32-NEXT: .cfi_undefined 1715
+; WAVE32-NEXT: .cfi_undefined 1716
+; WAVE32-NEXT: .cfi_undefined 1717
+; WAVE32-NEXT: .cfi_undefined 1718
+; WAVE32-NEXT: .cfi_undefined 1719
+; WAVE32-NEXT: .cfi_undefined 1728
+; WAVE32-NEXT: .cfi_undefined 1729
+; WAVE32-NEXT: .cfi_undefined 1730
+; WAVE32-NEXT: .cfi_undefined 1731
+; WAVE32-NEXT: .cfi_undefined 1732
+; WAVE32-NEXT: .cfi_undefined 1733
+; WAVE32-NEXT: .cfi_undefined 1734
+; WAVE32-NEXT: .cfi_undefined 1735
+; WAVE32-NEXT: .cfi_undefined 1744
+; WAVE32-NEXT: .cfi_undefined 1745
+; WAVE32-NEXT: .cfi_undefined 1746
+; WAVE32-NEXT: .cfi_undefined 1747
+; WAVE32-NEXT: .cfi_undefined 1748
+; WAVE32-NEXT: .cfi_undefined 1749
+; WAVE32-NEXT: .cfi_undefined 1750
+; WAVE32-NEXT: .cfi_undefined 1751
+; WAVE32-NEXT: .cfi_undefined 1760
+; WAVE32-NEXT: .cfi_undefined 1761
+; WAVE32-NEXT: .cfi_undefined 1762
+; WAVE32-NEXT: .cfi_undefined 1763
+; WAVE32-NEXT: .cfi_undefined 1764
+; WAVE32-NEXT: .cfi_undefined 1765
+; WAVE32-NEXT: .cfi_undefined 1766
+; WAVE32-NEXT: .cfi_undefined 1767
+; WAVE32-NEXT: .cfi_undefined 1776
+; WAVE32-NEXT: .cfi_undefined 1777
+; WAVE32-NEXT: .cfi_undefined 1778
+; WAVE32-NEXT: .cfi_undefined 1779
+; WAVE32-NEXT: .cfi_undefined 1780
+; WAVE32-NEXT: .cfi_undefined 1781
+; WAVE32-NEXT: .cfi_undefined 1782
+; WAVE32-NEXT: .cfi_undefined 1783
+; WAVE32-NEXT: .cfi_undefined 36
+; WAVE32-NEXT: .cfi_undefined 37
+; WAVE32-NEXT: .cfi_undefined 38
+; WAVE32-NEXT: .cfi_undefined 39
+; WAVE32-NEXT: .cfi_undefined 40
+; WAVE32-NEXT: .cfi_undefined 41
+; WAVE32-NEXT: .cfi_undefined 42
+; WAVE32-NEXT: .cfi_undefined 43
+; WAVE32-NEXT: .cfi_undefined 44
+; WAVE32-NEXT: .cfi_undefined 45
+; WAVE32-NEXT: .cfi_undefined 46
+; WAVE32-NEXT: .cfi_undefined 47
+; WAVE32-NEXT: .cfi_undefined 48
+; WAVE32-NEXT: .cfi_undefined 49
+; WAVE32-NEXT: .cfi_undefined 50
+; WAVE32-NEXT: .cfi_undefined 51
+; WAVE32-NEXT: .cfi_undefined 52
+; WAVE32-NEXT: .cfi_undefined 53
+; WAVE32-NEXT: .cfi_undefined 54
+; WAVE32-NEXT: .cfi_undefined 55
+; WAVE32-NEXT: .cfi_undefined 56
+; WAVE32-NEXT: .cfi_undefined 57
+; WAVE32-NEXT: .cfi_undefined 58
+; WAVE32-NEXT: .cfi_undefined 59
+; WAVE32-NEXT: .cfi_undefined 60
+; WAVE32-NEXT: .cfi_undefined 61
; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; WAVE32-NEXT: s_mov_b32 s40, s33
+; WAVE32-NEXT: .cfi_register 65, 72
; WAVE32-NEXT: s_mov_b32 s33, s32
+; WAVE32-NEXT: .cfi_def_cfa_register 65
; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill
; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill
; WAVE32-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill
@@ -999,6 +1732,7 @@ define void @callee_need_to_spill_fp_to_memory() #1 {
; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444
; WAVE32-NEXT: s_addk_i32 s32, 0x3880
; WAVE32-NEXT: s_mov_b32 s32, s33
+; WAVE32-NEXT: .cfi_def_cfa_register 64
; WAVE32-NEXT: s_waitcnt_depctr 0xffe3
; WAVE32-NEXT: s_mov_b32 s33, s40
; WAVE32-NEXT: s_waitcnt vmcnt(0)
@@ -1046,13 +1780,224 @@ define hidden void @func_call_clobber() #0 {
; GFX900: .Lfunc_begin3:
; GFX900-NEXT: .cfi_startproc
; GFX900-NEXT: ; %bb.0: ; %entry
+; GFX900-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX900-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX900-NEXT: .cfi_undefined 2560
+; GFX900-NEXT: .cfi_undefined 2561
+; GFX900-NEXT: .cfi_undefined 2562
+; GFX900-NEXT: .cfi_undefined 2563
+; GFX900-NEXT: .cfi_undefined 2564
+; GFX900-NEXT: .cfi_undefined 2565
+; GFX900-NEXT: .cfi_undefined 2566
+; GFX900-NEXT: .cfi_undefined 2567
+; GFX900-NEXT: .cfi_undefined 2568
+; GFX900-NEXT: .cfi_undefined 2569
+; GFX900-NEXT: .cfi_undefined 2570
+; GFX900-NEXT: .cfi_undefined 2571
+; GFX900-NEXT: .cfi_undefined 2572
+; GFX900-NEXT: .cfi_undefined 2573
+; GFX900-NEXT: .cfi_undefined 2574
+; GFX900-NEXT: .cfi_undefined 2575
+; GFX900-NEXT: .cfi_undefined 2576
+; GFX900-NEXT: .cfi_undefined 2577
+; GFX900-NEXT: .cfi_undefined 2578
+; GFX900-NEXT: .cfi_undefined 2579
+; GFX900-NEXT: .cfi_undefined 2580
+; GFX900-NEXT: .cfi_undefined 2581
+; GFX900-NEXT: .cfi_undefined 2582
+; GFX900-NEXT: .cfi_undefined 2583
+; GFX900-NEXT: .cfi_undefined 2584
+; GFX900-NEXT: .cfi_undefined 2585
+; GFX900-NEXT: .cfi_undefined 2586
+; GFX900-NEXT: .cfi_undefined 2587
+; GFX900-NEXT: .cfi_undefined 2588
+; GFX900-NEXT: .cfi_undefined 2589
+; GFX900-NEXT: .cfi_undefined 2590
+; GFX900-NEXT: .cfi_undefined 2591
+; GFX900-NEXT: .cfi_undefined 2592
+; GFX900-NEXT: .cfi_undefined 2593
+; GFX900-NEXT: .cfi_undefined 2594
+; GFX900-NEXT: .cfi_undefined 2595
+; GFX900-NEXT: .cfi_undefined 2596
+; GFX900-NEXT: .cfi_undefined 2597
+; GFX900-NEXT: .cfi_undefined 2598
+; GFX900-NEXT: .cfi_undefined 2599
+; GFX900-NEXT: .cfi_undefined 2608
+; GFX900-NEXT: .cfi_undefined 2609
+; GFX900-NEXT: .cfi_undefined 2610
+; GFX900-NEXT: .cfi_undefined 2611
+; GFX900-NEXT: .cfi_undefined 2612
+; GFX900-NEXT: .cfi_undefined 2613
+; GFX900-NEXT: .cfi_undefined 2614
+; GFX900-NEXT: .cfi_undefined 2615
+; GFX900-NEXT: .cfi_undefined 2624
+; GFX900-NEXT: .cfi_undefined 2625
+; GFX900-NEXT: .cfi_undefined 2626
+; GFX900-NEXT: .cfi_undefined 2627
+; GFX900-NEXT: .cfi_undefined 2628
+; GFX900-NEXT: .cfi_undefined 2629
+; GFX900-NEXT: .cfi_undefined 2630
+; GFX900-NEXT: .cfi_undefined 2631
+; GFX900-NEXT: .cfi_undefined 2640
+; GFX900-NEXT: .cfi_undefined 2641
+; GFX900-NEXT: .cfi_undefined 2642
+; GFX900-NEXT: .cfi_undefined 2643
+; GFX900-NEXT: .cfi_undefined 2644
+; GFX900-NEXT: .cfi_undefined 2645
+; GFX900-NEXT: .cfi_undefined 2646
+; GFX900-NEXT: .cfi_undefined 2647
+; GFX900-NEXT: .cfi_undefined 2656
+; GFX900-NEXT: .cfi_undefined 2657
+; GFX900-NEXT: .cfi_undefined 2658
+; GFX900-NEXT: .cfi_undefined 2659
+; GFX900-NEXT: .cfi_undefined 2660
+; GFX900-NEXT: .cfi_undefined 2661
+; GFX900-NEXT: .cfi_undefined 2662
+; GFX900-NEXT: .cfi_undefined 2663
+; GFX900-NEXT: .cfi_undefined 2672
+; GFX900-NEXT: .cfi_undefined 2673
+; GFX900-NEXT: .cfi_undefined 2674
+; GFX900-NEXT: .cfi_undefined 2675
+; GFX900-NEXT: .cfi_undefined 2676
+; GFX900-NEXT: .cfi_undefined 2677
+; GFX900-NEXT: .cfi_undefined 2678
+; GFX900-NEXT: .cfi_undefined 2679
+; GFX900-NEXT: .cfi_undefined 2688
+; GFX900-NEXT: .cfi_undefined 2689
+; GFX900-NEXT: .cfi_undefined 2690
+; GFX900-NEXT: .cfi_undefined 2691
+; GFX900-NEXT: .cfi_undefined 2692
+; GFX900-NEXT: .cfi_undefined 2693
+; GFX900-NEXT: .cfi_undefined 2694
+; GFX900-NEXT: .cfi_undefined 2695
+; GFX900-NEXT: .cfi_undefined 2704
+; GFX900-NEXT: .cfi_undefined 2705
+; GFX900-NEXT: .cfi_undefined 2706
+; GFX900-NEXT: .cfi_undefined 2707
+; GFX900-NEXT: .cfi_undefined 2708
+; GFX900-NEXT: .cfi_undefined 2709
+; GFX900-NEXT: .cfi_undefined 2710
+; GFX900-NEXT: .cfi_undefined 2711
+; GFX900-NEXT: .cfi_undefined 2720
+; GFX900-NEXT: .cfi_undefined 2721
+; GFX900-NEXT: .cfi_undefined 2722
+; GFX900-NEXT: .cfi_undefined 2723
+; GFX900-NEXT: .cfi_undefined 2724
+; GFX900-NEXT: .cfi_undefined 2725
+; GFX900-NEXT: .cfi_undefined 2726
+; GFX900-NEXT: .cfi_undefined 2727
+; GFX900-NEXT: .cfi_undefined 2736
+; GFX900-NEXT: .cfi_undefined 2737
+; GFX900-NEXT: .cfi_undefined 2738
+; GFX900-NEXT: .cfi_undefined 2739
+; GFX900-NEXT: .cfi_undefined 2740
+; GFX900-NEXT: .cfi_undefined 2741
+; GFX900-NEXT: .cfi_undefined 2742
+; GFX900-NEXT: .cfi_undefined 2743
+; GFX900-NEXT: .cfi_undefined 2752
+; GFX900-NEXT: .cfi_undefined 2753
+; GFX900-NEXT: .cfi_undefined 2754
+; GFX900-NEXT: .cfi_undefined 2755
+; GFX900-NEXT: .cfi_undefined 2756
+; GFX900-NEXT: .cfi_undefined 2757
+; GFX900-NEXT: .cfi_undefined 2758
+; GFX900-NEXT: .cfi_undefined 2759
+; GFX900-NEXT: .cfi_undefined 2768
+; GFX900-NEXT: .cfi_undefined 2769
+; GFX900-NEXT: .cfi_undefined 2770
+; GFX900-NEXT: .cfi_undefined 2771
+; GFX900-NEXT: .cfi_undefined 2772
+; GFX900-NEXT: .cfi_undefined 2773
+; GFX900-NEXT: .cfi_undefined 2774
+; GFX900-NEXT: .cfi_undefined 2775
+; GFX900-NEXT: .cfi_undefined 2784
+; GFX900-NEXT: .cfi_undefined 2785
+; GFX900-NEXT: .cfi_undefined 2786
+; GFX900-NEXT: .cfi_undefined 2787
+; GFX900-NEXT: .cfi_undefined 2788
+; GFX900-NEXT: .cfi_undefined 2789
+; GFX900-NEXT: .cfi_undefined 2790
+; GFX900-NEXT: .cfi_undefined 2791
+; GFX900-NEXT: .cfi_undefined 2800
+; GFX900-NEXT: .cfi_undefined 2801
+; GFX900-NEXT: .cfi_undefined 2802
+; GFX900-NEXT: .cfi_undefined 2803
+; GFX900-NEXT: .cfi_undefined 2804
+; GFX900-NEXT: .cfi_undefined 2805
+; GFX900-NEXT: .cfi_undefined 2806
+; GFX900-NEXT: .cfi_undefined 2807
+; GFX900-NEXT: .cfi_undefined 32
+; GFX900-NEXT: .cfi_undefined 33
+; GFX900-NEXT: .cfi_undefined 34
+; GFX900-NEXT: .cfi_undefined 35
+; GFX900-NEXT: .cfi_undefined 36
+; GFX900-NEXT: .cfi_undefined 37
+; GFX900-NEXT: .cfi_undefined 38
+; GFX900-NEXT: .cfi_undefined 39
+; GFX900-NEXT: .cfi_undefined 40
+; GFX900-NEXT: .cfi_undefined 41
+; GFX900-NEXT: .cfi_undefined 42
+; GFX900-NEXT: .cfi_undefined 43
+; GFX900-NEXT: .cfi_undefined 44
+; GFX900-NEXT: .cfi_undefined 45
+; GFX900-NEXT: .cfi_undefined 46
+; GFX900-NEXT: .cfi_undefined 47
+; GFX900-NEXT: .cfi_undefined 48
+; GFX900-NEXT: .cfi_undefined 49
+; GFX900-NEXT: .cfi_undefined 50
+; GFX900-NEXT: .cfi_undefined 51
+; GFX900-NEXT: .cfi_undefined 52
+; GFX900-NEXT: .cfi_undefined 53
+; GFX900-NEXT: .cfi_undefined 54
+; GFX900-NEXT: .cfi_undefined 55
+; GFX900-NEXT: .cfi_undefined 56
+; GFX900-NEXT: .cfi_undefined 57
+; GFX900-NEXT: .cfi_undefined 58
+; GFX900-NEXT: .cfi_undefined 59
+; GFX900-NEXT: .cfi_undefined 60
+; GFX900-NEXT: .cfi_undefined 61
+; GFX900-NEXT: .cfi_undefined 72
+; GFX900-NEXT: .cfi_undefined 73
+; GFX900-NEXT: .cfi_undefined 74
+; GFX900-NEXT: .cfi_undefined 75
+; GFX900-NEXT: .cfi_undefined 76
+; GFX900-NEXT: .cfi_undefined 77
+; GFX900-NEXT: .cfi_undefined 78
+; GFX900-NEXT: .cfi_undefined 79
+; GFX900-NEXT: .cfi_undefined 88
+; GFX900-NEXT: .cfi_undefined 89
+; GFX900-NEXT: .cfi_undefined 90
+; GFX900-NEXT: .cfi_undefined 91
+; GFX900-NEXT: .cfi_undefined 92
+; GFX900-NEXT: .cfi_undefined 93
+; GFX900-NEXT: .cfi_undefined 94
+; GFX900-NEXT: .cfi_undefined 95
+; GFX900-NEXT: .cfi_undefined 1096
+; GFX900-NEXT: .cfi_undefined 1097
+; GFX900-NEXT: .cfi_undefined 1098
+; GFX900-NEXT: .cfi_undefined 1099
+; GFX900-NEXT: .cfi_undefined 1100
+; GFX900-NEXT: .cfi_undefined 1101
+; GFX900-NEXT: .cfi_undefined 1102
+; GFX900-NEXT: .cfi_undefined 1103
+; GFX900-NEXT: .cfi_undefined 1112
+; GFX900-NEXT: .cfi_undefined 1113
+; GFX900-NEXT: .cfi_undefined 1114
+; GFX900-NEXT: .cfi_undefined 1115
+; GFX900-NEXT: .cfi_undefined 1116
+; GFX900-NEXT: .cfi_undefined 1117
+; GFX900-NEXT: .cfi_undefined 1118
+; GFX900-NEXT: .cfi_undefined 1119
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-NEXT: s_mov_b32 s16, s33
; GFX900-NEXT: s_mov_b32 s33, s32
; GFX900-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX900-NEXT: .cfi_offset 2600, 0
; GFX900-NEXT: s_mov_b64 exec, s[18:19]
; GFX900-NEXT: v_writelane_b32 v40, s16, 2
+; GFX900-NEXT: .cfi_llvm_vector_registers 65, 2600, 2, 32
+; GFX900-NEXT: .cfi_def_cfa_register 65
; GFX900-NEXT: s_addk_i32 s32, 0x400
; GFX900-NEXT: v_writelane_b32 v40, s30, 0
; GFX900-NEXT: s_getpc_b64 s[16:17]
@@ -1067,6 +2012,7 @@ define hidden void @func_call_clobber() #0 {
; GFX900-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; GFX900-NEXT: s_mov_b64 exec, s[6:7]
+; GFX900-NEXT: .cfi_def_cfa_register 64
; GFX900-NEXT: s_mov_b32 s33, s4
; GFX900-NEXT: s_waitcnt vmcnt(0)
; GFX900-NEXT: s_setpc_b64 s[30:31]
@@ -1075,13 +2021,256 @@ define hidden void @func_call_clobber() #0 {
; GFX90A-V2A-DIS: .Lfunc_begin3:
; GFX90A-V2A-DIS-NEXT: .cfi_startproc
; GFX90A-V2A-DIS-NEXT: ; %bb.0: ; %entry
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2562
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2563
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2564
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2565
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2566
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2567
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2568
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2569
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2570
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2571
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2572
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2573
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2574
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2575
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2576
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2577
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2578
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2579
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2580
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2581
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2582
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2583
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2584
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2585
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2586
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2587
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2588
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2589
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2590
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2591
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2592
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2593
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2594
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2595
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2596
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2597
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2598
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2599
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2608
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2609
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2610
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2611
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2612
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2613
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2614
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2615
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2624
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2625
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2626
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2627
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2628
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2629
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2630
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2631
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2640
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2641
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2642
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2643
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2644
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2645
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2646
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2647
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2656
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2657
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2658
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2659
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2660
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2661
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2662
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2663
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2672
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2673
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2674
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2675
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2676
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2677
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2678
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2679
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2688
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2689
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2690
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2691
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2692
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2693
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2694
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2695
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2704
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2705
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2706
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2707
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2708
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2709
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2710
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2711
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2720
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2721
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2722
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2723
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2724
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2725
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2726
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2727
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2736
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2737
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2738
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2739
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2740
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2741
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2742
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2743
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2752
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2753
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2754
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2755
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2756
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2757
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2758
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2759
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2768
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2769
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2770
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2771
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2772
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2773
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2774
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2775
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2784
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2785
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2786
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2787
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2788
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2789
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2790
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2791
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2800
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2801
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2802
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2803
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2804
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2805
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2806
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 2807
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3072
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3073
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3074
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3075
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3076
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3077
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3078
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3079
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3080
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3081
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3082
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3083
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3084
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3085
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3086
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3087
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3088
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3089
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3090
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3091
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3092
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3093
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3094
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3095
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3096
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3097
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3098
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3099
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3100
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3101
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3102
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 3103
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 32
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 33
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 34
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 35
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 36
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 37
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 38
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 39
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 40
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 41
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 42
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 43
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 44
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 45
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 46
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 47
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 48
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 49
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 50
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 51
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 52
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 53
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 54
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 55
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 56
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 57
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 58
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 59
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 60
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 61
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 72
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 73
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 74
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 75
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 76
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 77
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 78
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 79
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 88
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 89
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 90
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 91
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 92
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 93
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 94
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 95
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1096
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1097
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1098
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1099
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1100
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1101
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1102
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1103
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1112
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1113
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1114
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1115
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1116
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1117
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1118
+; GFX90A-V2A-DIS-NEXT: .cfi_undefined 1119
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s16, s33
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s32
; GFX90A-V2A-DIS-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX90A-V2A-DIS-NEXT: .cfi_offset 2600, 0
; GFX90A-V2A-DIS-NEXT: s_mov_b64 exec, s[18:19]
; GFX90A-V2A-DIS-NEXT: v_writelane_b32 v40, s16, 2
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_vector_registers 65, 2600, 2, 32
+; GFX90A-V2A-DIS-NEXT: .cfi_def_cfa_register 65
; GFX90A-V2A-DIS-NEXT: s_addk_i32 s32, 0x400
; GFX90A-V2A-DIS-NEXT: v_writelane_b32 v40, s30, 0
; GFX90A-V2A-DIS-NEXT: s_getpc_b64 s[16:17]
@@ -1096,6 +2285,7 @@ define hidden void @func_call_clobber() #0 {
; GFX90A-V2A-DIS-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; GFX90A-V2A-DIS-NEXT: s_mov_b64 exec, s[6:7]
+; GFX90A-V2A-DIS-NEXT: .cfi_def_cfa_register 64
; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s4
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0)
; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31]
@@ -1104,13 +2294,256 @@ define hidden void @func_call_clobber() #0 {
; GFX90A-V2A-EN: .Lfunc_begin3:
; GFX90A-V2A-EN-NEXT: .cfi_startproc
; GFX90A-V2A-EN-NEXT: ; %bb.0: ; %entry
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2562
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2563
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2564
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2565
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2566
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2567
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2568
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2569
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2570
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2571
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2572
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2573
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2574
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2575
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2576
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2577
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2578
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2579
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2580
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2581
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2582
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2583
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2584
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2585
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2586
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2587
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2588
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2589
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2590
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2591
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2592
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2593
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2594
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2595
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2596
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2597
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2598
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2599
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2608
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2609
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2610
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2611
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2612
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2613
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2614
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2615
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2624
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2625
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2626
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2627
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2628
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2629
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2630
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2631
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2640
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2641
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2642
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2643
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2644
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2645
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2646
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2647
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2656
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2657
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2658
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2659
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2660
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2661
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2662
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2663
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2672
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2673
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2674
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2675
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2676
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2677
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2678
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2679
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2688
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2689
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2690
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2691
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2692
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2693
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2694
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2695
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2704
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2705
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2706
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2707
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2708
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2709
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2710
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2711
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2720
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2721
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2722
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2723
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2724
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2725
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2726
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2727
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2736
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2737
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2738
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2739
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2740
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2741
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2742
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2743
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2752
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2753
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2754
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2755
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2756
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2757
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2758
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2759
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2768
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2769
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2770
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2771
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2772
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2773
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2774
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2775
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2784
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2785
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2786
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2787
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2788
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2789
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2790
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2791
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2800
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2801
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2802
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2803
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2804
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2805
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2806
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2807
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3072
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3073
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3074
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3075
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3076
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3077
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3078
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3079
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3080
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3081
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3082
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3083
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3084
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3085
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3086
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3087
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3088
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3089
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3090
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3091
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3092
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3093
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3094
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3095
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3096
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3097
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3098
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3099
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3100
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3101
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3102
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3103
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 32
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 33
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 34
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 35
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 36
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 37
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 38
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 39
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 40
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 41
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 42
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 43
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 44
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 45
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 46
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 47
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 48
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 49
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 50
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 51
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 52
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 53
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 54
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 55
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 56
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 57
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 58
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 59
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 60
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 61
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 72
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 73
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 74
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 75
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 76
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 77
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 78
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 79
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 88
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 89
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 90
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 91
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 92
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 93
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 94
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 95
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1096
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1097
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1098
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1099
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1100
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1101
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1102
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1103
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1112
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1113
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1114
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1115
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1116
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1117
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1118
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 1119
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-EN-NEXT: s_mov_b32 s16, s33
; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s32
; GFX90A-V2A-EN-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX90A-V2A-EN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX90A-V2A-EN-NEXT: .cfi_offset 2600, 0
; GFX90A-V2A-EN-NEXT: s_mov_b64 exec, s[18:19]
; GFX90A-V2A-EN-NEXT: v_writelane_b32 v40, s16, 2
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_vector_registers 65, 2600, 2, 32
+; GFX90A-V2A-EN-NEXT: .cfi_def_cfa_register 65
; GFX90A-V2A-EN-NEXT: s_addk_i32 s32, 0x400
; GFX90A-V2A-EN-NEXT: v_writelane_b32 v40, s30, 0
; GFX90A-V2A-EN-NEXT: s_getpc_b64 s[16:17]
@@ -1125,6 +2558,7 @@ define hidden void @func_call_clobber() #0 {
; GFX90A-V2A-EN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX90A-V2A-EN-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; GFX90A-V2A-EN-NEXT: s_mov_b64 exec, s[6:7]
+; GFX90A-V2A-EN-NEXT: .cfi_def_cfa_register 64
; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s4
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0)
; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31]
@@ -1133,19 +2567,230 @@ define hidden void @func_call_clobber() #0 {
; WAVE32: .Lfunc_begin3:
; WAVE32-NEXT: .cfi_startproc
; WAVE32-NEXT: ; %bb.0: ; %entry
+; WAVE32-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE32-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; WAVE32-NEXT: .cfi_undefined 1536
+; WAVE32-NEXT: .cfi_undefined 1537
+; WAVE32-NEXT: .cfi_undefined 1538
+; WAVE32-NEXT: .cfi_undefined 1539
+; WAVE32-NEXT: .cfi_undefined 1540
+; WAVE32-NEXT: .cfi_undefined 1541
+; WAVE32-NEXT: .cfi_undefined 1542
+; WAVE32-NEXT: .cfi_undefined 1543
+; WAVE32-NEXT: .cfi_undefined 1544
+; WAVE32-NEXT: .cfi_undefined 1545
+; WAVE32-NEXT: .cfi_undefined 1546
+; WAVE32-NEXT: .cfi_undefined 1547
+; WAVE32-NEXT: .cfi_undefined 1548
+; WAVE32-NEXT: .cfi_undefined 1549
+; WAVE32-NEXT: .cfi_undefined 1550
+; WAVE32-NEXT: .cfi_undefined 1551
+; WAVE32-NEXT: .cfi_undefined 1552
+; WAVE32-NEXT: .cfi_undefined 1553
+; WAVE32-NEXT: .cfi_undefined 1554
+; WAVE32-NEXT: .cfi_undefined 1555
+; WAVE32-NEXT: .cfi_undefined 1556
+; WAVE32-NEXT: .cfi_undefined 1557
+; WAVE32-NEXT: .cfi_undefined 1558
+; WAVE32-NEXT: .cfi_undefined 1559
+; WAVE32-NEXT: .cfi_undefined 1560
+; WAVE32-NEXT: .cfi_undefined 1561
+; WAVE32-NEXT: .cfi_undefined 1562
+; WAVE32-NEXT: .cfi_undefined 1563
+; WAVE32-NEXT: .cfi_undefined 1564
+; WAVE32-NEXT: .cfi_undefined 1565
+; WAVE32-NEXT: .cfi_undefined 1566
+; WAVE32-NEXT: .cfi_undefined 1567
+; WAVE32-NEXT: .cfi_undefined 1568
+; WAVE32-NEXT: .cfi_undefined 1569
+; WAVE32-NEXT: .cfi_undefined 1570
+; WAVE32-NEXT: .cfi_undefined 1571
+; WAVE32-NEXT: .cfi_undefined 1572
+; WAVE32-NEXT: .cfi_undefined 1573
+; WAVE32-NEXT: .cfi_undefined 1574
+; WAVE32-NEXT: .cfi_undefined 1575
+; WAVE32-NEXT: .cfi_undefined 1584
+; WAVE32-NEXT: .cfi_undefined 1585
+; WAVE32-NEXT: .cfi_undefined 1586
+; WAVE32-NEXT: .cfi_undefined 1587
+; WAVE32-NEXT: .cfi_undefined 1588
+; WAVE32-NEXT: .cfi_undefined 1589
+; WAVE32-NEXT: .cfi_undefined 1590
+; WAVE32-NEXT: .cfi_undefined 1591
+; WAVE32-NEXT: .cfi_undefined 1600
+; WAVE32-NEXT: .cfi_undefined 1601
+; WAVE32-NEXT: .cfi_undefined 1602
+; WAVE32-NEXT: .cfi_undefined 1603
+; WAVE32-NEXT: .cfi_undefined 1604
+; WAVE32-NEXT: .cfi_undefined 1605
+; WAVE32-NEXT: .cfi_undefined 1606
+; WAVE32-NEXT: .cfi_undefined 1607
+; WAVE32-NEXT: .cfi_undefined 1616
+; WAVE32-NEXT: .cfi_undefined 1617
+; WAVE32-NEXT: .cfi_undefined 1618
+; WAVE32-NEXT: .cfi_undefined 1619
+; WAVE32-NEXT: .cfi_undefined 1620
+; WAVE32-NEXT: .cfi_undefined 1621
+; WAVE32-NEXT: .cfi_undefined 1622
+; WAVE32-NEXT: .cfi_undefined 1623
+; WAVE32-NEXT: .cfi_undefined 1632
+; WAVE32-NEXT: .cfi_undefined 1633
+; WAVE32-NEXT: .cfi_undefined 1634
+; WAVE32-NEXT: .cfi_undefined 1635
+; WAVE32-NEXT: .cfi_undefined 1636
+; WAVE32-NEXT: .cfi_undefined 1637
+; WAVE32-NEXT: .cfi_undefined 1638
+; WAVE32-NEXT: .cfi_undefined 1639
+; WAVE32-NEXT: .cfi_undefined 1648
+; WAVE32-NEXT: .cfi_undefined 1649
+; WAVE32-NEXT: .cfi_undefined 1650
+; WAVE32-NEXT: .cfi_undefined 1651
+; WAVE32-NEXT: .cfi_undefined 1652
+; WAVE32-NEXT: .cfi_undefined 1653
+; WAVE32-NEXT: .cfi_undefined 1654
+; WAVE32-NEXT: .cfi_undefined 1655
+; WAVE32-NEXT: .cfi_undefined 1664
+; WAVE32-NEXT: .cfi_undefined 1665
+; WAVE32-NEXT: .cfi_undefined 1666
+; WAVE32-NEXT: .cfi_undefined 1667
+; WAVE32-NEXT: .cfi_undefined 1668
+; WAVE32-NEXT: .cfi_undefined 1669
+; WAVE32-NEXT: .cfi_undefined 1670
+; WAVE32-NEXT: .cfi_undefined 1671
+; WAVE32-NEXT: .cfi_undefined 1680
+; WAVE32-NEXT: .cfi_undefined 1681
+; WAVE32-NEXT: .cfi_undefined 1682
+; WAVE32-NEXT: .cfi_undefined 1683
+; WAVE32-NEXT: .cfi_undefined 1684
+; WAVE32-NEXT: .cfi_undefined 1685
+; WAVE32-NEXT: .cfi_undefined 1686
+; WAVE32-NEXT: .cfi_undefined 1687
+; WAVE32-NEXT: .cfi_undefined 1696
+; WAVE32-NEXT: .cfi_undefined 1697
+; WAVE32-NEXT: .cfi_undefined 1698
+; WAVE32-NEXT: .cfi_undefined 1699
+; WAVE32-NEXT: .cfi_undefined 1700
+; WAVE32-NEXT: .cfi_undefined 1701
+; WAVE32-NEXT: .cfi_undefined 1702
+; WAVE32-NEXT: .cfi_undefined 1703
+; WAVE32-NEXT: .cfi_undefined 1712
+; WAVE32-NEXT: .cfi_undefined 1713
+; WAVE32-NEXT: .cfi_undefined 1714
+; WAVE32-NEXT: .cfi_undefined 1715
+; WAVE32-NEXT: .cfi_undefined 1716
+; WAVE32-NEXT: .cfi_undefined 1717
+; WAVE32-NEXT: .cfi_undefined 1718
+; WAVE32-NEXT: .cfi_undefined 1719
+; WAVE32-NEXT: .cfi_undefined 1728
+; WAVE32-NEXT: .cfi_undefined 1729
+; WAVE32-NEXT: .cfi_undefined 1730
+; WAVE32-NEXT: .cfi_undefined 1731
+; WAVE32-NEXT: .cfi_undefined 1732
+; WAVE32-NEXT: .cfi_undefined 1733
+; WAVE32-NEXT: .cfi_undefined 1734
+; WAVE32-NEXT: .cfi_undefined 1735
+; WAVE32-NEXT: .cfi_undefined 1744
+; WAVE32-NEXT: .cfi_undefined 1745
+; WAVE32-NEXT: .cfi_undefined 1746
+; WAVE32-NEXT: .cfi_undefined 1747
+; WAVE32-NEXT: .cfi_undefined 1748
+; WAVE32-NEXT: .cfi_undefined 1749
+; WAVE32-NEXT: .cfi_undefined 1750
+; WAVE32-NEXT: .cfi_undefined 1751
+; WAVE32-NEXT: .cfi_undefined 1760
+; WAVE32-NEXT: .cfi_undefined 1761
+; WAVE32-NEXT: .cfi_undefined 1762
+; WAVE32-NEXT: .cfi_undefined 1763
+; WAVE32-NEXT: .cfi_undefined 1764
+; WAVE32-NEXT: .cfi_undefined 1765
+; WAVE32-NEXT: .cfi_undefined 1766
+; WAVE32-NEXT: .cfi_undefined 1767
+; WAVE32-NEXT: .cfi_undefined 1776
+; WAVE32-NEXT: .cfi_undefined 1777
+; WAVE32-NEXT: .cfi_undefined 1778
+; WAVE32-NEXT: .cfi_undefined 1779
+; WAVE32-NEXT: .cfi_undefined 1780
+; WAVE32-NEXT: .cfi_undefined 1781
+; WAVE32-NEXT: .cfi_undefined 1782
+; WAVE32-NEXT: .cfi_undefined 1783
+; WAVE32-NEXT: .cfi_undefined 32
+; WAVE32-NEXT: .cfi_undefined 33
+; WAVE32-NEXT: .cfi_undefined 34
+; WAVE32-NEXT: .cfi_undefined 35
+; WAVE32-NEXT: .cfi_undefined 36
+; WAVE32-NEXT: .cfi_undefined 37
+; WAVE32-NEXT: .cfi_undefined 38
+; WAVE32-NEXT: .cfi_undefined 39
+; WAVE32-NEXT: .cfi_undefined 40
+; WAVE32-NEXT: .cfi_undefined 41
+; WAVE32-NEXT: .cfi_undefined 42
+; WAVE32-NEXT: .cfi_undefined 43
+; WAVE32-NEXT: .cfi_undefined 44
+; WAVE32-NEXT: .cfi_undefined 45
+; WAVE32-NEXT: .cfi_undefined 46
+; WAVE32-NEXT: .cfi_undefined 47
+; WAVE32-NEXT: .cfi_undefined 48
+; WAVE32-NEXT: .cfi_undefined 49
+; WAVE32-NEXT: .cfi_undefined 50
+; WAVE32-NEXT: .cfi_undefined 51
+; WAVE32-NEXT: .cfi_undefined 52
+; WAVE32-NEXT: .cfi_undefined 53
+; WAVE32-NEXT: .cfi_undefined 54
+; WAVE32-NEXT: .cfi_undefined 55
+; WAVE32-NEXT: .cfi_undefined 56
+; WAVE32-NEXT: .cfi_undefined 57
+; WAVE32-NEXT: .cfi_undefined 58
+; WAVE32-NEXT: .cfi_undefined 59
+; WAVE32-NEXT: .cfi_undefined 60
+; WAVE32-NEXT: .cfi_undefined 61
+; WAVE32-NEXT: .cfi_undefined 72
+; WAVE32-NEXT: .cfi_undefined 73
+; WAVE32-NEXT: .cfi_undefined 74
+; WAVE32-NEXT: .cfi_undefined 75
+; WAVE32-NEXT: .cfi_undefined 76
+; WAVE32-NEXT: .cfi_undefined 77
+; WAVE32-NEXT: .cfi_undefined 78
+; WAVE32-NEXT: .cfi_undefined 79
+; WAVE32-NEXT: .cfi_undefined 88
+; WAVE32-NEXT: .cfi_undefined 89
+; WAVE32-NEXT: .cfi_undefined 90
+; WAVE32-NEXT: .cfi_undefined 91
+; WAVE32-NEXT: .cfi_undefined 92
+; WAVE32-NEXT: .cfi_undefined 93
+; WAVE32-NEXT: .cfi_undefined 94
+; WAVE32-NEXT: .cfi_undefined 95
+; WAVE32-NEXT: .cfi_undefined 1096
+; WAVE32-NEXT: .cfi_undefined 1097
+; WAVE32-NEXT: .cfi_undefined 1098
+; WAVE32-NEXT: .cfi_undefined 1099
+; WAVE32-NEXT: .cfi_undefined 1100
+; WAVE32-NEXT: .cfi_undefined 1101
+; WAVE32-NEXT: .cfi_undefined 1102
+; WAVE32-NEXT: .cfi_undefined 1103
+; WAVE32-NEXT: .cfi_undefined 1112
+; WAVE32-NEXT: .cfi_undefined 1113
+; WAVE32-NEXT: .cfi_undefined 1114
+; WAVE32-NEXT: .cfi_undefined 1115
+; WAVE32-NEXT: .cfi_undefined 1116
+; WAVE32-NEXT: .cfi_undefined 1117
+; WAVE32-NEXT: .cfi_undefined 1118
+; WAVE32-NEXT: .cfi_undefined 1119
; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; WAVE32-NEXT: s_mov_b32 s16, s33
; WAVE32-NEXT: s_mov_b32 s33, s32
; WAVE32-NEXT: s_or_saveexec_b32 s17, -1
; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; WAVE32-NEXT: .cfi_offset 1576, 0
; WAVE32-NEXT: s_waitcnt_depctr 0xffe3
; WAVE32-NEXT: s_mov_b32 exec_lo, s17
; WAVE32-NEXT: v_writelane_b32 v40, s16, 2
+; WAVE32-NEXT: .cfi_llvm_vector_registers 65, 1576, 2, 32
+; WAVE32-NEXT: .cfi_def_cfa_register 65
+; WAVE32-NEXT: v_writelane_b32 v40, s30, 0
; WAVE32-NEXT: s_addk_i32 s32, 0x200
; WAVE32-NEXT: s_getpc_b64 s[16:17]
; WAVE32-NEXT: s_add_u32 s16, s16, ex at rel32@lo+4
; WAVE32-NEXT: s_addc_u32 s17, s17, ex at rel32@hi+12
-; WAVE32-NEXT: v_writelane_b32 v40, s30, 0
; WAVE32-NEXT: v_writelane_b32 v40, s31, 1
; WAVE32-NEXT: s_swappc_b64 s[30:31], s[16:17]
; WAVE32-NEXT: v_readlane_b32 s31, v40, 1
@@ -1156,6 +2801,7 @@ define hidden void @func_call_clobber() #0 {
; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; WAVE32-NEXT: s_waitcnt_depctr 0xffe3
; WAVE32-NEXT: s_mov_b32 exec_lo, s5
+; WAVE32-NEXT: .cfi_def_cfa_register 64
; WAVE32-NEXT: s_mov_b32 s33, s4
; WAVE32-NEXT: s_waitcnt vmcnt(0)
; WAVE32-NEXT: s_setpc_b64 s[30:31]
@@ -1169,6 +2815,8 @@ define hidden void @func_spill_vgpr_to_vmem() #0 {
; GFX900: .Lfunc_begin4:
; GFX900-NEXT: .cfi_startproc
; GFX900-NEXT: ; %bb.0: ; %entry
+; GFX900-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX900-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill
@@ -1193,6 +2841,8 @@ define hidden void @func_spill_vgpr_to_vmem() #0 {
; GFX90A-V2A-DIS: .Lfunc_begin4:
; GFX90A-V2A-DIS-NEXT: .cfi_startproc
; GFX90A-V2A-DIS-NEXT: ; %bb.0: ; %entry
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
@@ -1221,6 +2871,12 @@ define hidden void @func_spill_vgpr_to_vmem() #0 {
; GFX90A-V2A-EN: .Lfunc_begin4:
; GFX90A-V2A-EN-NEXT: .cfi_startproc
; GFX90A-V2A-EN-NEXT: ; %bb.0: ; %entry
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3072
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3073
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse
@@ -1248,6 +2904,8 @@ define hidden void @func_spill_vgpr_to_vmem() #0 {
; WAVE32: .Lfunc_begin4:
; WAVE32-NEXT: .cfi_startproc
; WAVE32-NEXT: ; %bb.0: ; %entry
+; WAVE32-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE32-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill
@@ -1281,6 +2939,8 @@ define hidden void @func_spill_vgpr_to_agpr() #2 {
; GFX900: .Lfunc_begin5:
; GFX900-NEXT: .cfi_startproc
; GFX900-NEXT: ; %bb.0:
+; GFX900-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX900-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill
@@ -1305,6 +2965,8 @@ define hidden void @func_spill_vgpr_to_agpr() #2 {
; GFX90A-V2A-DIS: .Lfunc_begin5:
; GFX90A-V2A-DIS-NEXT: .cfi_startproc
; GFX90A-V2A-DIS-NEXT: ; %bb.0:
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-DIS-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill
; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill
@@ -1333,6 +2995,12 @@ define hidden void @func_spill_vgpr_to_agpr() #2 {
; GFX90A-V2A-EN: .Lfunc_begin5:
; GFX90A-V2A-EN-NEXT: .cfi_startproc
; GFX90A-V2A-EN-NEXT: ; %bb.0:
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GFX90A-V2A-EN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2560
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 2561
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3072
+; GFX90A-V2A-EN-NEXT: .cfi_undefined 3073
; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse
; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse
@@ -1360,6 +3028,8 @@ define hidden void @func_spill_vgpr_to_agpr() #2 {
; WAVE32: .Lfunc_begin5:
; WAVE32-NEXT: .cfi_startproc
; WAVE32-NEXT: ; %bb.0:
+; WAVE32-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; WAVE32-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill
diff --git a/llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll b/llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
index 40cdfd76d6af6..a0c25b2a0beb3 100644
--- a/llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+++ b/llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
@@ -15,13 +15,480 @@ define weak_odr void @test(i32 %0) !dbg !34 {
; CHECK-NEXT: .cfi_sections .debug_frame
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 2565
+; CHECK-NEXT: .cfi_undefined 2566
+; CHECK-NEXT: .cfi_undefined 2567
+; CHECK-NEXT: .cfi_undefined 2568
+; CHECK-NEXT: .cfi_undefined 2569
+; CHECK-NEXT: .cfi_undefined 2570
+; CHECK-NEXT: .cfi_undefined 2571
+; CHECK-NEXT: .cfi_undefined 2572
+; CHECK-NEXT: .cfi_undefined 2573
+; CHECK-NEXT: .cfi_undefined 2574
+; CHECK-NEXT: .cfi_undefined 2575
+; CHECK-NEXT: .cfi_undefined 2576
+; CHECK-NEXT: .cfi_undefined 2577
+; CHECK-NEXT: .cfi_undefined 2578
+; CHECK-NEXT: .cfi_undefined 2579
+; CHECK-NEXT: .cfi_undefined 2580
+; CHECK-NEXT: .cfi_undefined 2581
+; CHECK-NEXT: .cfi_undefined 2582
+; CHECK-NEXT: .cfi_undefined 2583
+; CHECK-NEXT: .cfi_undefined 2584
+; CHECK-NEXT: .cfi_undefined 2585
+; CHECK-NEXT: .cfi_undefined 2586
+; CHECK-NEXT: .cfi_undefined 2587
+; CHECK-NEXT: .cfi_undefined 2588
+; CHECK-NEXT: .cfi_undefined 2589
+; CHECK-NEXT: .cfi_undefined 2590
+; CHECK-NEXT: .cfi_undefined 2591
+; CHECK-NEXT: .cfi_undefined 2592
+; CHECK-NEXT: .cfi_undefined 2593
+; CHECK-NEXT: .cfi_undefined 2594
+; CHECK-NEXT: .cfi_undefined 2595
+; CHECK-NEXT: .cfi_undefined 2596
+; CHECK-NEXT: .cfi_undefined 2597
+; CHECK-NEXT: .cfi_undefined 2598
+; CHECK-NEXT: .cfi_undefined 2599
+; CHECK-NEXT: .cfi_undefined 2608
+; CHECK-NEXT: .cfi_undefined 2609
+; CHECK-NEXT: .cfi_undefined 2610
+; CHECK-NEXT: .cfi_undefined 2611
+; CHECK-NEXT: .cfi_undefined 2612
+; CHECK-NEXT: .cfi_undefined 2613
+; CHECK-NEXT: .cfi_undefined 2614
+; CHECK-NEXT: .cfi_undefined 2615
+; CHECK-NEXT: .cfi_undefined 2624
+; CHECK-NEXT: .cfi_undefined 2625
+; CHECK-NEXT: .cfi_undefined 2626
+; CHECK-NEXT: .cfi_undefined 2627
+; CHECK-NEXT: .cfi_undefined 2628
+; CHECK-NEXT: .cfi_undefined 2629
+; CHECK-NEXT: .cfi_undefined 2630
+; CHECK-NEXT: .cfi_undefined 2631
+; CHECK-NEXT: .cfi_undefined 2640
+; CHECK-NEXT: .cfi_undefined 2641
+; CHECK-NEXT: .cfi_undefined 2642
+; CHECK-NEXT: .cfi_undefined 2643
+; CHECK-NEXT: .cfi_undefined 2644
+; CHECK-NEXT: .cfi_undefined 2645
+; CHECK-NEXT: .cfi_undefined 2646
+; CHECK-NEXT: .cfi_undefined 2647
+; CHECK-NEXT: .cfi_undefined 2656
+; CHECK-NEXT: .cfi_undefined 2657
+; CHECK-NEXT: .cfi_undefined 2658
+; CHECK-NEXT: .cfi_undefined 2659
+; CHECK-NEXT: .cfi_undefined 2660
+; CHECK-NEXT: .cfi_undefined 2661
+; CHECK-NEXT: .cfi_undefined 2662
+; CHECK-NEXT: .cfi_undefined 2663
+; CHECK-NEXT: .cfi_undefined 2672
+; CHECK-NEXT: .cfi_undefined 2673
+; CHECK-NEXT: .cfi_undefined 2674
+; CHECK-NEXT: .cfi_undefined 2675
+; CHECK-NEXT: .cfi_undefined 2676
+; CHECK-NEXT: .cfi_undefined 2677
+; CHECK-NEXT: .cfi_undefined 2678
+; CHECK-NEXT: .cfi_undefined 2679
+; CHECK-NEXT: .cfi_undefined 2688
+; CHECK-NEXT: .cfi_undefined 2689
+; CHECK-NEXT: .cfi_undefined 2690
+; CHECK-NEXT: .cfi_undefined 2691
+; CHECK-NEXT: .cfi_undefined 2692
+; CHECK-NEXT: .cfi_undefined 2693
+; CHECK-NEXT: .cfi_undefined 2694
+; CHECK-NEXT: .cfi_undefined 2695
+; CHECK-NEXT: .cfi_undefined 2704
+; CHECK-NEXT: .cfi_undefined 2705
+; CHECK-NEXT: .cfi_undefined 2706
+; CHECK-NEXT: .cfi_undefined 2707
+; CHECK-NEXT: .cfi_undefined 2708
+; CHECK-NEXT: .cfi_undefined 2709
+; CHECK-NEXT: .cfi_undefined 2710
+; CHECK-NEXT: .cfi_undefined 2711
+; CHECK-NEXT: .cfi_undefined 2720
+; CHECK-NEXT: .cfi_undefined 2721
+; CHECK-NEXT: .cfi_undefined 2722
+; CHECK-NEXT: .cfi_undefined 2723
+; CHECK-NEXT: .cfi_undefined 2724
+; CHECK-NEXT: .cfi_undefined 2725
+; CHECK-NEXT: .cfi_undefined 2726
+; CHECK-NEXT: .cfi_undefined 2727
+; CHECK-NEXT: .cfi_undefined 2736
+; CHECK-NEXT: .cfi_undefined 2737
+; CHECK-NEXT: .cfi_undefined 2738
+; CHECK-NEXT: .cfi_undefined 2739
+; CHECK-NEXT: .cfi_undefined 2740
+; CHECK-NEXT: .cfi_undefined 2741
+; CHECK-NEXT: .cfi_undefined 2742
+; CHECK-NEXT: .cfi_undefined 2743
+; CHECK-NEXT: .cfi_undefined 2752
+; CHECK-NEXT: .cfi_undefined 2753
+; CHECK-NEXT: .cfi_undefined 2754
+; CHECK-NEXT: .cfi_undefined 2755
+; CHECK-NEXT: .cfi_undefined 2756
+; CHECK-NEXT: .cfi_undefined 2757
+; CHECK-NEXT: .cfi_undefined 2758
+; CHECK-NEXT: .cfi_undefined 2759
+; CHECK-NEXT: .cfi_undefined 2768
+; CHECK-NEXT: .cfi_undefined 2769
+; CHECK-NEXT: .cfi_undefined 2770
+; CHECK-NEXT: .cfi_undefined 2771
+; CHECK-NEXT: .cfi_undefined 2772
+; CHECK-NEXT: .cfi_undefined 2773
+; CHECK-NEXT: .cfi_undefined 2774
+; CHECK-NEXT: .cfi_undefined 2775
+; CHECK-NEXT: .cfi_undefined 2784
+; CHECK-NEXT: .cfi_undefined 2785
+; CHECK-NEXT: .cfi_undefined 2786
+; CHECK-NEXT: .cfi_undefined 2787
+; CHECK-NEXT: .cfi_undefined 2788
+; CHECK-NEXT: .cfi_undefined 2789
+; CHECK-NEXT: .cfi_undefined 2790
+; CHECK-NEXT: .cfi_undefined 2791
+; CHECK-NEXT: .cfi_undefined 2800
+; CHECK-NEXT: .cfi_undefined 2801
+; CHECK-NEXT: .cfi_undefined 2802
+; CHECK-NEXT: .cfi_undefined 2803
+; CHECK-NEXT: .cfi_undefined 2804
+; CHECK-NEXT: .cfi_undefined 2805
+; CHECK-NEXT: .cfi_undefined 2806
+; CHECK-NEXT: .cfi_undefined 2807
+; CHECK-NEXT: .cfi_undefined 3072
+; CHECK-NEXT: .cfi_undefined 3073
+; CHECK-NEXT: .cfi_undefined 3074
+; CHECK-NEXT: .cfi_undefined 3075
+; CHECK-NEXT: .cfi_undefined 3076
+; CHECK-NEXT: .cfi_undefined 3077
+; CHECK-NEXT: .cfi_undefined 3078
+; CHECK-NEXT: .cfi_undefined 3079
+; CHECK-NEXT: .cfi_undefined 3080
+; CHECK-NEXT: .cfi_undefined 3081
+; CHECK-NEXT: .cfi_undefined 3082
+; CHECK-NEXT: .cfi_undefined 3083
+; CHECK-NEXT: .cfi_undefined 3084
+; CHECK-NEXT: .cfi_undefined 3085
+; CHECK-NEXT: .cfi_undefined 3086
+; CHECK-NEXT: .cfi_undefined 3087
+; CHECK-NEXT: .cfi_undefined 3088
+; CHECK-NEXT: .cfi_undefined 3089
+; CHECK-NEXT: .cfi_undefined 3090
+; CHECK-NEXT: .cfi_undefined 3091
+; CHECK-NEXT: .cfi_undefined 3092
+; CHECK-NEXT: .cfi_undefined 3093
+; CHECK-NEXT: .cfi_undefined 3094
+; CHECK-NEXT: .cfi_undefined 3095
+; CHECK-NEXT: .cfi_undefined 3096
+; CHECK-NEXT: .cfi_undefined 3097
+; CHECK-NEXT: .cfi_undefined 3098
+; CHECK-NEXT: .cfi_undefined 3099
+; CHECK-NEXT: .cfi_undefined 3100
+; CHECK-NEXT: .cfi_undefined 3101
+; CHECK-NEXT: .cfi_undefined 3102
+; CHECK-NEXT: .cfi_undefined 3103
+; CHECK-NEXT: .cfi_undefined 3104
+; CHECK-NEXT: .cfi_undefined 3105
+; CHECK-NEXT: .cfi_undefined 3106
+; CHECK-NEXT: .cfi_undefined 3107
+; CHECK-NEXT: .cfi_undefined 3108
+; CHECK-NEXT: .cfi_undefined 3109
+; CHECK-NEXT: .cfi_undefined 3110
+; CHECK-NEXT: .cfi_undefined 3111
+; CHECK-NEXT: .cfi_undefined 3112
+; CHECK-NEXT: .cfi_undefined 3113
+; CHECK-NEXT: .cfi_undefined 3114
+; CHECK-NEXT: .cfi_undefined 3115
+; CHECK-NEXT: .cfi_undefined 3116
+; CHECK-NEXT: .cfi_undefined 3117
+; CHECK-NEXT: .cfi_undefined 3118
+; CHECK-NEXT: .cfi_undefined 3119
+; CHECK-NEXT: .cfi_undefined 3120
+; CHECK-NEXT: .cfi_undefined 3121
+; CHECK-NEXT: .cfi_undefined 3122
+; CHECK-NEXT: .cfi_undefined 3123
+; CHECK-NEXT: .cfi_undefined 3124
+; CHECK-NEXT: .cfi_undefined 3125
+; CHECK-NEXT: .cfi_undefined 3126
+; CHECK-NEXT: .cfi_undefined 3127
+; CHECK-NEXT: .cfi_undefined 3128
+; CHECK-NEXT: .cfi_undefined 3129
+; CHECK-NEXT: .cfi_undefined 3130
+; CHECK-NEXT: .cfi_undefined 3131
+; CHECK-NEXT: .cfi_undefined 3132
+; CHECK-NEXT: .cfi_undefined 3133
+; CHECK-NEXT: .cfi_undefined 3134
+; CHECK-NEXT: .cfi_undefined 3135
+; CHECK-NEXT: .cfi_undefined 3136
+; CHECK-NEXT: .cfi_undefined 3137
+; CHECK-NEXT: .cfi_undefined 3138
+; CHECK-NEXT: .cfi_undefined 3139
+; CHECK-NEXT: .cfi_undefined 3140
+; CHECK-NEXT: .cfi_undefined 3141
+; CHECK-NEXT: .cfi_undefined 3142
+; CHECK-NEXT: .cfi_undefined 3143
+; CHECK-NEXT: .cfi_undefined 3144
+; CHECK-NEXT: .cfi_undefined 3145
+; CHECK-NEXT: .cfi_undefined 3146
+; CHECK-NEXT: .cfi_undefined 3147
+; CHECK-NEXT: .cfi_undefined 3148
+; CHECK-NEXT: .cfi_undefined 3149
+; CHECK-NEXT: .cfi_undefined 3150
+; CHECK-NEXT: .cfi_undefined 3151
+; CHECK-NEXT: .cfi_undefined 3152
+; CHECK-NEXT: .cfi_undefined 3153
+; CHECK-NEXT: .cfi_undefined 3154
+; CHECK-NEXT: .cfi_undefined 3155
+; CHECK-NEXT: .cfi_undefined 3156
+; CHECK-NEXT: .cfi_undefined 3157
+; CHECK-NEXT: .cfi_undefined 3158
+; CHECK-NEXT: .cfi_undefined 3159
+; CHECK-NEXT: .cfi_undefined 3160
+; CHECK-NEXT: .cfi_undefined 3161
+; CHECK-NEXT: .cfi_undefined 3162
+; CHECK-NEXT: .cfi_undefined 3163
+; CHECK-NEXT: .cfi_undefined 3164
+; CHECK-NEXT: .cfi_undefined 3165
+; CHECK-NEXT: .cfi_undefined 3166
+; CHECK-NEXT: .cfi_undefined 3167
+; CHECK-NEXT: .cfi_undefined 3168
+; CHECK-NEXT: .cfi_undefined 3169
+; CHECK-NEXT: .cfi_undefined 3170
+; CHECK-NEXT: .cfi_undefined 3171
+; CHECK-NEXT: .cfi_undefined 3172
+; CHECK-NEXT: .cfi_undefined 3173
+; CHECK-NEXT: .cfi_undefined 3174
+; CHECK-NEXT: .cfi_undefined 3175
+; CHECK-NEXT: .cfi_undefined 3176
+; CHECK-NEXT: .cfi_undefined 3177
+; CHECK-NEXT: .cfi_undefined 3178
+; CHECK-NEXT: .cfi_undefined 3179
+; CHECK-NEXT: .cfi_undefined 3180
+; CHECK-NEXT: .cfi_undefined 3181
+; CHECK-NEXT: .cfi_undefined 3182
+; CHECK-NEXT: .cfi_undefined 3183
+; CHECK-NEXT: .cfi_undefined 3184
+; CHECK-NEXT: .cfi_undefined 3185
+; CHECK-NEXT: .cfi_undefined 3186
+; CHECK-NEXT: .cfi_undefined 3187
+; CHECK-NEXT: .cfi_undefined 3188
+; CHECK-NEXT: .cfi_undefined 3189
+; CHECK-NEXT: .cfi_undefined 3190
+; CHECK-NEXT: .cfi_undefined 3191
+; CHECK-NEXT: .cfi_undefined 3192
+; CHECK-NEXT: .cfi_undefined 3193
+; CHECK-NEXT: .cfi_undefined 3194
+; CHECK-NEXT: .cfi_undefined 3195
+; CHECK-NEXT: .cfi_undefined 3196
+; CHECK-NEXT: .cfi_undefined 3197
+; CHECK-NEXT: .cfi_undefined 3198
+; CHECK-NEXT: .cfi_undefined 3199
+; CHECK-NEXT: .cfi_undefined 3200
+; CHECK-NEXT: .cfi_undefined 3201
+; CHECK-NEXT: .cfi_undefined 3202
+; CHECK-NEXT: .cfi_undefined 3203
+; CHECK-NEXT: .cfi_undefined 3204
+; CHECK-NEXT: .cfi_undefined 3205
+; CHECK-NEXT: .cfi_undefined 3206
+; CHECK-NEXT: .cfi_undefined 3207
+; CHECK-NEXT: .cfi_undefined 3208
+; CHECK-NEXT: .cfi_undefined 3209
+; CHECK-NEXT: .cfi_undefined 3210
+; CHECK-NEXT: .cfi_undefined 3211
+; CHECK-NEXT: .cfi_undefined 3212
+; CHECK-NEXT: .cfi_undefined 3213
+; CHECK-NEXT: .cfi_undefined 3214
+; CHECK-NEXT: .cfi_undefined 3215
+; CHECK-NEXT: .cfi_undefined 3216
+; CHECK-NEXT: .cfi_undefined 3217
+; CHECK-NEXT: .cfi_undefined 3218
+; CHECK-NEXT: .cfi_undefined 3219
+; CHECK-NEXT: .cfi_undefined 3220
+; CHECK-NEXT: .cfi_undefined 3221
+; CHECK-NEXT: .cfi_undefined 3222
+; CHECK-NEXT: .cfi_undefined 3223
+; CHECK-NEXT: .cfi_undefined 3224
+; CHECK-NEXT: .cfi_undefined 3225
+; CHECK-NEXT: .cfi_undefined 3226
+; CHECK-NEXT: .cfi_undefined 3227
+; CHECK-NEXT: .cfi_undefined 3228
+; CHECK-NEXT: .cfi_undefined 3229
+; CHECK-NEXT: .cfi_undefined 3230
+; CHECK-NEXT: .cfi_undefined 3231
+; CHECK-NEXT: .cfi_undefined 3232
+; CHECK-NEXT: .cfi_undefined 3233
+; CHECK-NEXT: .cfi_undefined 3234
+; CHECK-NEXT: .cfi_undefined 3235
+; CHECK-NEXT: .cfi_undefined 3236
+; CHECK-NEXT: .cfi_undefined 3237
+; CHECK-NEXT: .cfi_undefined 3238
+; CHECK-NEXT: .cfi_undefined 3239
+; CHECK-NEXT: .cfi_undefined 3240
+; CHECK-NEXT: .cfi_undefined 3241
+; CHECK-NEXT: .cfi_undefined 3242
+; CHECK-NEXT: .cfi_undefined 3243
+; CHECK-NEXT: .cfi_undefined 3244
+; CHECK-NEXT: .cfi_undefined 3245
+; CHECK-NEXT: .cfi_undefined 3246
+; CHECK-NEXT: .cfi_undefined 3247
+; CHECK-NEXT: .cfi_undefined 3248
+; CHECK-NEXT: .cfi_undefined 3249
+; CHECK-NEXT: .cfi_undefined 3250
+; CHECK-NEXT: .cfi_undefined 3251
+; CHECK-NEXT: .cfi_undefined 3252
+; CHECK-NEXT: .cfi_undefined 3253
+; CHECK-NEXT: .cfi_undefined 3254
+; CHECK-NEXT: .cfi_undefined 3255
+; CHECK-NEXT: .cfi_undefined 3256
+; CHECK-NEXT: .cfi_undefined 3257
+; CHECK-NEXT: .cfi_undefined 3258
+; CHECK-NEXT: .cfi_undefined 3259
+; CHECK-NEXT: .cfi_undefined 3260
+; CHECK-NEXT: .cfi_undefined 3261
+; CHECK-NEXT: .cfi_undefined 3262
+; CHECK-NEXT: .cfi_undefined 3263
+; CHECK-NEXT: .cfi_undefined 3264
+; CHECK-NEXT: .cfi_undefined 3265
+; CHECK-NEXT: .cfi_undefined 3266
+; CHECK-NEXT: .cfi_undefined 3267
+; CHECK-NEXT: .cfi_undefined 3268
+; CHECK-NEXT: .cfi_undefined 3269
+; CHECK-NEXT: .cfi_undefined 3270
+; CHECK-NEXT: .cfi_undefined 3271
+; CHECK-NEXT: .cfi_undefined 3272
+; CHECK-NEXT: .cfi_undefined 3273
+; CHECK-NEXT: .cfi_undefined 3274
+; CHECK-NEXT: .cfi_undefined 3275
+; CHECK-NEXT: .cfi_undefined 3276
+; CHECK-NEXT: .cfi_undefined 3277
+; CHECK-NEXT: .cfi_undefined 3278
+; CHECK-NEXT: .cfi_undefined 3279
+; CHECK-NEXT: .cfi_undefined 3280
+; CHECK-NEXT: .cfi_undefined 3281
+; CHECK-NEXT: .cfi_undefined 3282
+; CHECK-NEXT: .cfi_undefined 3283
+; CHECK-NEXT: .cfi_undefined 3284
+; CHECK-NEXT: .cfi_undefined 3285
+; CHECK-NEXT: .cfi_undefined 3286
+; CHECK-NEXT: .cfi_undefined 3287
+; CHECK-NEXT: .cfi_undefined 3288
+; CHECK-NEXT: .cfi_undefined 3289
+; CHECK-NEXT: .cfi_undefined 3290
+; CHECK-NEXT: .cfi_undefined 3291
+; CHECK-NEXT: .cfi_undefined 3292
+; CHECK-NEXT: .cfi_undefined 3293
+; CHECK-NEXT: .cfi_undefined 3294
+; CHECK-NEXT: .cfi_undefined 3295
+; CHECK-NEXT: .cfi_undefined 3296
+; CHECK-NEXT: .cfi_undefined 3297
+; CHECK-NEXT: .cfi_undefined 3298
+; CHECK-NEXT: .cfi_undefined 3299
+; CHECK-NEXT: .cfi_undefined 3300
+; CHECK-NEXT: .cfi_undefined 3301
+; CHECK-NEXT: .cfi_undefined 3302
+; CHECK-NEXT: .cfi_undefined 3303
+; CHECK-NEXT: .cfi_undefined 3304
+; CHECK-NEXT: .cfi_undefined 3305
+; CHECK-NEXT: .cfi_undefined 3306
+; CHECK-NEXT: .cfi_undefined 3307
+; CHECK-NEXT: .cfi_undefined 3308
+; CHECK-NEXT: .cfi_undefined 3309
+; CHECK-NEXT: .cfi_undefined 3310
+; CHECK-NEXT: .cfi_undefined 3311
+; CHECK-NEXT: .cfi_undefined 3312
+; CHECK-NEXT: .cfi_undefined 3313
+; CHECK-NEXT: .cfi_undefined 3314
+; CHECK-NEXT: .cfi_undefined 3315
+; CHECK-NEXT: .cfi_undefined 3316
+; CHECK-NEXT: .cfi_undefined 3317
+; CHECK-NEXT: .cfi_undefined 3318
+; CHECK-NEXT: .cfi_undefined 3319
+; CHECK-NEXT: .cfi_undefined 3320
+; CHECK-NEXT: .cfi_undefined 3321
+; CHECK-NEXT: .cfi_undefined 3322
+; CHECK-NEXT: .cfi_undefined 3323
+; CHECK-NEXT: .cfi_undefined 3324
+; CHECK-NEXT: .cfi_undefined 3325
+; CHECK-NEXT: .cfi_undefined 3326
+; CHECK-NEXT: .cfi_undefined 3327
+; CHECK-NEXT: .cfi_undefined 32
+; CHECK-NEXT: .cfi_undefined 33
+; CHECK-NEXT: .cfi_undefined 34
+; CHECK-NEXT: .cfi_undefined 35
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
+; CHECK-NEXT: .cfi_undefined 38
+; CHECK-NEXT: .cfi_undefined 39
+; CHECK-NEXT: .cfi_undefined 40
+; CHECK-NEXT: .cfi_undefined 41
+; CHECK-NEXT: .cfi_undefined 42
+; CHECK-NEXT: .cfi_undefined 43
+; CHECK-NEXT: .cfi_undefined 44
+; CHECK-NEXT: .cfi_undefined 45
+; CHECK-NEXT: .cfi_undefined 46
+; CHECK-NEXT: .cfi_undefined 47
+; CHECK-NEXT: .cfi_undefined 48
+; CHECK-NEXT: .cfi_undefined 49
+; CHECK-NEXT: .cfi_undefined 50
+; CHECK-NEXT: .cfi_undefined 51
+; CHECK-NEXT: .cfi_undefined 52
+; CHECK-NEXT: .cfi_undefined 53
+; CHECK-NEXT: .cfi_undefined 54
+; CHECK-NEXT: .cfi_undefined 55
+; CHECK-NEXT: .cfi_undefined 56
+; CHECK-NEXT: .cfi_undefined 57
+; CHECK-NEXT: .cfi_undefined 58
+; CHECK-NEXT: .cfi_undefined 59
+; CHECK-NEXT: .cfi_undefined 60
+; CHECK-NEXT: .cfi_undefined 61
+; CHECK-NEXT: .cfi_undefined 72
+; CHECK-NEXT: .cfi_undefined 73
+; CHECK-NEXT: .cfi_undefined 74
+; CHECK-NEXT: .cfi_undefined 75
+; CHECK-NEXT: .cfi_undefined 76
+; CHECK-NEXT: .cfi_undefined 77
+; CHECK-NEXT: .cfi_undefined 78
+; CHECK-NEXT: .cfi_undefined 79
+; CHECK-NEXT: .cfi_undefined 88
+; CHECK-NEXT: .cfi_undefined 89
+; CHECK-NEXT: .cfi_undefined 90
+; CHECK-NEXT: .cfi_undefined 91
+; CHECK-NEXT: .cfi_undefined 92
+; CHECK-NEXT: .cfi_undefined 93
+; CHECK-NEXT: .cfi_undefined 94
+; CHECK-NEXT: .cfi_undefined 95
+; CHECK-NEXT: .cfi_undefined 1096
+; CHECK-NEXT: .cfi_undefined 1097
+; CHECK-NEXT: .cfi_undefined 1098
+; CHECK-NEXT: .cfi_undefined 1099
+; CHECK-NEXT: .cfi_undefined 1100
+; CHECK-NEXT: .cfi_undefined 1101
+; CHECK-NEXT: .cfi_undefined 1102
+; CHECK-NEXT: .cfi_undefined 1103
+; CHECK-NEXT: .cfi_undefined 1112
+; CHECK-NEXT: .cfi_undefined 1113
+; CHECK-NEXT: .cfi_undefined 1114
+; CHECK-NEXT: .cfi_undefined 1115
+; CHECK-NEXT: .cfi_undefined 1116
+; CHECK-NEXT: .cfi_undefined 1117
+; CHECK-NEXT: .cfi_undefined 1118
+; CHECK-NEXT: .cfi_undefined 1119
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s16, s33
; CHECK-NEXT: s_mov_b32 s33, s32
; CHECK-NEXT: s_or_saveexec_b64 s[18:19], -1
; CHECK-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
+; CHECK-NEXT: .cfi_offset 2601, 256
; CHECK-NEXT: s_mov_b64 exec, s[18:19]
; CHECK-NEXT: v_writelane_b32 v41, s16, 16
+; CHECK-NEXT: .cfi_llvm_vector_registers 65, 2601, 16, 32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: v_writelane_b32 v41, s30, 0
; CHECK-NEXT: v_writelane_b32 v41, s31, 1
; CHECK-NEXT: v_writelane_b32 v41, s34, 2
@@ -96,6 +563,7 @@ define weak_odr void @test(i32 %0) !dbg !34 {
; CHECK-NEXT: s_or_saveexec_b64 s[6:7], -1
; CHECK-NEXT: buffer_load_dword v41, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload
; CHECK-NEXT: s_mov_b64 exec, s[6:7]
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s4
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll b/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
index bcccf50e3805c..c05eef51c276f 100644
--- a/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
+++ b/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
@@ -287,10 +287,10 @@ define amdgpu_gfx void @amdgpu_gfx() #0 {
; CHECK-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-TRUE16-NEXT: v_mov_b16_e32 v0.l, 15
+; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-TRUE16-NEXT: s_mov_b32 s1, callee at abs32@hi
; CHECK-TRUE16-NEXT: s_mov_b32 s0, callee at abs32@lo
; CHECK-TRUE16-NEXT: s_add_co_i32 s32, s32, 16
-; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-TRUE16-NEXT: s_wait_storecnt 0x0
; CHECK-TRUE16-NEXT: scratch_store_b8 off, v0, s33 scope:SCOPE_SYS
; CHECK-TRUE16-NEXT: s_wait_storecnt 0x0
@@ -327,10 +327,10 @@ define amdgpu_gfx void @amdgpu_gfx() #0 {
; CHECK-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-FAKE16-NEXT: v_mov_b32_e32 v0, 15
+; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-FAKE16-NEXT: s_mov_b32 s1, callee at abs32@hi
; CHECK-FAKE16-NEXT: s_mov_b32 s0, callee at abs32@lo
; CHECK-FAKE16-NEXT: s_add_co_i32 s32, s32, 16
-; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-FAKE16-NEXT: s_wait_storecnt 0x0
; CHECK-FAKE16-NEXT: scratch_store_b8 off, v0, s33 scope:SCOPE_SYS
; CHECK-FAKE16-NEXT: s_wait_storecnt 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
index dafd6cce2d878..15ef61fd75bad 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
@@ -21,21 +21,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__inline_imm__fi_offset0
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 12, $sgpr4, implicit-def dead $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__inline_imm__fi_offset0
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 12, $sgpr4, implicit-def dead $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__inline_imm__fi_offset0
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 12, $sgpr32, implicit-def dead $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 12, $sgpr32, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__inline_imm__fi_offset0
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 12, $sgpr32, implicit-def dead $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 12, $sgpr32, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 12, %stack.0, implicit-def dead $scc
SI_RETURN implicit $sgpr7
@@ -54,21 +66,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__inline_imm
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 12, implicit-def dead $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__inline_imm
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 12, implicit-def dead $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__inline_imm
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 $sgpr32, 12, implicit-def dead $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 12, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__inline_imm
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 $sgpr32, 12, implicit-def dead $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 12, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 %stack.0, 12, implicit-def dead $scc
SI_RETURN implicit $sgpr7
@@ -88,21 +112,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__inline_imm___fi_offset_inline_imm
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 28, $sgpr4, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__inline_imm___fi_offset_inline_imm
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 28, $sgpr4, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__inline_imm___fi_offset_inline_imm
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 28, $sgpr32, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 28, $sgpr32, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__inline_imm___fi_offset_inline_imm
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 28, $sgpr32, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 28, $sgpr32, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 12, %stack.1, implicit-def $scc
SI_RETURN implicit $sgpr7
@@ -121,21 +157,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__literal__fi_offset0
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 68, $sgpr4, implicit-def dead $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__literal__fi_offset0
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 68, $sgpr4, implicit-def dead $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__literal__fi_offset0
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 68, $sgpr32, implicit-def dead $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 68, $sgpr32, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__literal__fi_offset0
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 68, $sgpr32, implicit-def dead $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 68, $sgpr32, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 68, %stack.0, implicit-def dead $scc
SI_RETURN implicit $sgpr7
@@ -154,21 +202,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__literal
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 68, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__literal
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 68, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__literal
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 $sgpr32, 68, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 68, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__literal
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 $sgpr32, 68, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 68, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 %stack.0, 68, implicit-def $scc
SI_RETURN implicit $sgpr7
@@ -188,21 +248,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__literal__fi_offset96
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, $sgpr4, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_add_i32__literal__fi_offset96
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, $sgpr4, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_add_i32__literal__fi_offset96
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 164, $sgpr32, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, $sgpr32, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_add_i32__literal__fi_offset96
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 164, $sgpr32, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, $sgpr32, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
@@ -222,21 +294,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32____fi_offset96__literal
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 164, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_add_i32____fi_offset96__literal
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 164, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_add_i32____fi_offset96__literal
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 $sgpr32, 164, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 164, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_add_i32____fi_offset96__literal
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 $sgpr32, 164, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 164, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_ADD_I32 %stack.1, 68, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
@@ -258,6 +342,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__sgpr__fi_offset0
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -266,6 +353,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__sgpr__fi_offset0
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -274,6 +364,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__sgpr__fi_offset0
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
@@ -281,6 +374,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__sgpr__fi_offset0
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
@@ -304,6 +400,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__sgpr
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -312,6 +411,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -320,6 +422,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__sgpr
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
@@ -327,6 +432,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
@@ -351,6 +459,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__sgpr__fi_literal_offset
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 80, implicit-def dead $scc
@@ -359,6 +470,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__sgpr__fi_literal_offset
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 80, implicit-def dead $scc
@@ -367,6 +481,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__sgpr__fi_literal_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 80, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
@@ -374,6 +491,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__sgpr__fi_literal_offset
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 80, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
@@ -398,6 +518,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__fi_literal_offset__sgpr
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 80, killed renamable $sgpr7, implicit-def $scc
@@ -406,6 +529,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__fi_literal_offset__sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 80, killed renamable $sgpr7, implicit-def $scc
@@ -414,6 +540,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__fi_literal_offset__sgpr
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 80, killed renamable $sgpr7, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -421,6 +550,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__fi_literal_offset__sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 80, killed renamable $sgpr7, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -750,6 +882,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__sgpr__fi_offset0__live_scc
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 0, implicit-def $scc
@@ -758,6 +893,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__sgpr__fi_offset0__live_scc
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 0, implicit-def $scc
@@ -766,6 +904,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__sgpr__fi_offset0__live_scc
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 0, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -773,6 +914,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__sgpr__fi_offset0__live_scc
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 0, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -851,6 +995,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__sgpr__fi_literal_offset__live_scc
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 96, implicit-def $scc
@@ -859,6 +1006,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__sgpr__fi_literal_offset__live_scc
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 96, implicit-def $scc
@@ -867,6 +1017,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__sgpr__fi_literal_offset__live_scc
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 96, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -874,6 +1027,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__sgpr__fi_literal_offset__live_scc
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed renamable $sgpr7, 96, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -896,21 +1052,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, $sgpr4, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, $sgpr4, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 40, $sgpr32, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, $sgpr32, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 40, $sgpr32, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, $sgpr32, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_ADD_I32 8, %stack.1, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
@@ -930,21 +1098,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 40, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr4, 40, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm
- ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 $sgpr32, 40, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 40, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm
- ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 $sgpr32, 40, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr32, 40, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_ADD_I32 %stack.1, 8, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
@@ -1061,21 +1241,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__0__fi_offset0
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr4
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__0__fi_offset0
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr4
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__0__fi_offset0
- ; FLATSCRW64: renamable $sgpr7 = COPY $sgpr32
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr32
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__0__fi_offset0
- ; FLATSCRW32: renamable $sgpr7 = COPY $sgpr32
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr32
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 0, %stack.0, implicit-def dead $scc
SI_RETURN implicit $sgpr7
@@ -1094,21 +1286,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__0
- ; MUBUFW64: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY $sgpr4
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7
;
; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__0
- ; MUBUFW32: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY $sgpr4
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__0
- ; FLATSCRW64: renamable $sgpr7 = COPY $sgpr32
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = COPY $sgpr32
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
;
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__0
- ; FLATSCRW32: renamable $sgpr7 = COPY $sgpr32
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = COPY $sgpr32
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
renamable $sgpr7 = S_ADD_I32 %stack.0, 0, implicit-def dead $scc
SI_RETURN implicit $sgpr7
@@ -1130,6 +1334,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__same_sgpr__fi_offset0
; MUBUFW64: liveins: $sgpr7
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr4, $sgpr7, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1138,6 +1345,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__same_sgpr__fi_offset0
; MUBUFW32: liveins: $sgpr7
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr4, $sgpr7, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1146,6 +1356,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__same_sgpr__fi_offset0
; FLATSCRW64: liveins: $sgpr7
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr7, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr4
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
@@ -1153,6 +1366,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__same_sgpr__fi_offset0
; FLATSCRW32: liveins: $sgpr7
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr7, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr4
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
@@ -1176,6 +1392,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1184,6 +1403,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1192,6 +1414,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7
@@ -1199,6 +1424,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7
@@ -1222,6 +1450,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1230,6 +1461,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr7, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
@@ -1238,6 +1472,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
@@ -1245,6 +1482,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__different_sgpr__fi_offset0_live_after
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY killed renamable $sgpr7
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $sgpr8
@@ -1488,6 +1728,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 killed $sgpr4, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr8
@@ -1496,6 +1739,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 killed $sgpr4, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr8
@@ -1504,6 +1750,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; FLATSCRW64-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr4
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8
@@ -1511,6 +1760,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; FLATSCRW32-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr8 = COPY killed renamable $sgpr4
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8
@@ -1536,6 +1788,9 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; MUBUFW64-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 killed $sgpr4, $sgpr8, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 killed renamable $sgpr8, 32, implicit-def dead $scc
@@ -1544,6 +1799,9 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; MUBUFW32-NEXT: renamable $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 killed $sgpr4, $sgpr8, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 killed renamable $sgpr8, 32, implicit-def dead $scc
@@ -1552,6 +1810,9 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; FLATSCRW64-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 killed renamable $sgpr4, 32, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8
@@ -1559,6 +1820,9 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; FLATSCRW32-NEXT: renamable $sgpr4 = S_ADD_I32 killed $sgpr32, $sgpr8, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 killed renamable $sgpr4, 32, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8
@@ -1583,6 +1847,8 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32_use_dst_reg_as_temp_regression
; MUBUFW64: liveins: $vcc_lo, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; MUBUFW64-NEXT: renamable $vcc_hi = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $vcc_hi = S_ADD_I32 killed $vcc_hi, renamable $vcc_lo, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $vcc_hi = COPY killed renamable $vcc_hi
@@ -1591,6 +1857,8 @@ body: |
; MUBUFW32-LABEL: name: s_add_i32_use_dst_reg_as_temp_regression
; MUBUFW32: liveins: $vcc_lo, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; MUBUFW32-NEXT: renamable $vcc_hi = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $vcc_hi = S_ADD_I32 killed $vcc_hi, renamable $vcc_lo, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $vcc_hi = COPY killed renamable $vcc_hi
@@ -1599,6 +1867,8 @@ body: |
; FLATSCRW64-LABEL: name: s_add_i32_use_dst_reg_as_temp_regression
; FLATSCRW64: liveins: $vcc_lo, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; FLATSCRW64-NEXT: renamable $vcc_hi = S_ADD_I32 killed $sgpr32, renamable $vcc_lo, implicit-def dead $scc
; FLATSCRW64-NEXT: renamable $vcc_hi = COPY killed renamable $vcc_hi
; FLATSCRW64-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29
@@ -1606,6 +1876,8 @@ body: |
; FLATSCRW32-LABEL: name: s_add_i32_use_dst_reg_as_temp_regression
; FLATSCRW32: liveins: $vcc_lo, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; FLATSCRW32-NEXT: renamable $vcc_hi = S_ADD_I32 killed $sgpr32, renamable $vcc_lo, implicit-def dead $scc
; FLATSCRW32-NEXT: renamable $vcc_hi = COPY killed renamable $vcc_hi
; FLATSCRW32-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29
@@ -1629,24 +1901,36 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero
; MUBUFW64: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = COPY renamable $sgpr7
; MUBUFW64-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; MUBUFW32-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero
; MUBUFW32: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = COPY renamable $sgpr7
; MUBUFW32-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; FLATSCRW64-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero
; FLATSCRW64: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = COPY renamable $sgpr7
; FLATSCRW64-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; FLATSCRW32-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero
; FLATSCRW32: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = COPY renamable $sgpr7
; FLATSCRW32-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, %stack.0, implicit-def dead $scc
@@ -1670,24 +1954,36 @@ body: |
; MUBUFW64-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero
; MUBUFW64: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, 64, implicit-def dead $scc
; MUBUFW64-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; MUBUFW32-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero
; MUBUFW32: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, 64, implicit-def dead $scc
; MUBUFW32-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; FLATSCRW64-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero
; FLATSCRW64: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, 64, implicit-def dead $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
;
; FLATSCRW32-LABEL: name: s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero
; FLATSCRW32: liveins: $vcc_lo, $vcc_hi, $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr32, $sgpr33, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, 64, implicit-def dead $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $vcc_lo, implicit $vcc_hi, implicit $sgpr0, implicit $sgpr1, implicit $sgpr2, implicit $sgpr3, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31, implicit $sgpr32, implicit $sgpr33, implicit $sgpr34, implicit $sgpr35, implicit $sgpr36, implicit $sgpr37, implicit $sgpr38, implicit $sgpr39, implicit $sgpr40, implicit $sgpr41, implicit $sgpr42, implicit $sgpr43, implicit $sgpr44, implicit $sgpr45, implicit $sgpr46, implicit $sgpr47, implicit $sgpr48, implicit $sgpr49, implicit $sgpr50, implicit $sgpr51, implicit $sgpr52, implicit $sgpr53, implicit $sgpr54, implicit $sgpr55, implicit $sgpr56, implicit $sgpr57, implicit $sgpr58, implicit $sgpr59, implicit $sgpr60, implicit $sgpr61, implicit $sgpr62, implicit $sgpr63, implicit $sgpr64, implicit $sgpr65, implicit $sgpr66, implicit $sgpr67, implicit $sgpr68, implicit $sgpr69, implicit $sgpr70, implicit $sgpr71, implicit $sgpr72, implicit $sgpr73, implicit $sgpr74, implicit $sgpr75, implicit $sgpr76, implicit $sgpr77, implicit $sgpr78, implicit $sgpr79, implicit $sgpr80, implicit $sgpr81, implicit $sgpr82, implicit $sgpr83, implicit $sgpr84, implicit $sgpr85, implicit $sgpr86, implicit $sgpr87, implicit $sgpr88, implicit $sgpr89, implicit $sgpr90, implicit $sgpr91, implicit $sgpr92, implicit $sgpr93, implicit $sgpr94, implicit $sgpr95
renamable $sgpr7 = S_ADD_I32 renamable $sgpr7, %stack.1, implicit-def dead $scc
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
index 7f370b2cca658..d3a8d983bb22c 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
@@ -33,6 +33,214 @@ body: |
; GFX8-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX8: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX8-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX8-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX8-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc
@@ -58,6 +266,214 @@ body: |
; GFX900-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX900: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX900-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX900-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX900-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc
@@ -83,6 +499,246 @@ body: |
; GFX90A-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX90A: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX90A-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX90A-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX90A-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc
@@ -108,6 +764,214 @@ body: |
; GFX1010-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX1010: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX1010-NEXT: {{ $}}
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX1010-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX1010-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX1010-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc_lo
@@ -133,6 +997,214 @@ body: |
; GFX1100-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX1100: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX1100-NEXT: {{ $}}
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX1100-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX1100-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX1100-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc_lo
@@ -158,6 +1230,214 @@ body: |
; GFX1200-LABEL: name: s_copy_frame_index_elimination_failure_pei
; GFX1200: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $vgpr0, $vgpr1, $vgpr2, $vgpr4, $vgpr31, $vgpr40, $vgpr63, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr30_sgpr31
; GFX1200-NEXT: {{ $}}
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX1200-NEXT: renamable $sgpr18_sgpr19 = S_MOV_B64 $src_private_base
; GFX1200-NEXT: renamable $sgpr17 = S_MOV_B32 0
; GFX1200-NEXT: undef renamable $vcc_lo = COPY undef renamable $sgpr17, implicit-def $vcc_lo
@@ -216,6 +1496,9 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; GFX8-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX8-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
@@ -227,6 +1510,9 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; GFX900-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX900-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
@@ -237,6 +1523,9 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX90A: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; GFX90A-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX90A-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
@@ -247,6 +1536,9 @@ body: |
; GFX1010-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX1010: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1010-NEXT: {{ $}}
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1010-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc_lo, implicit $exec
; GFX1010-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX1010-NEXT: $vgpr0 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
@@ -257,6 +1549,9 @@ body: |
; GFX1100-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX1100: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1100-NEXT: {{ $}}
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1100-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc_lo, implicit $exec
; GFX1100-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX1100-NEXT: $sgpr0 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
@@ -268,6 +1563,9 @@ body: |
; GFX1200-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc
; GFX1200: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1200-NEXT: {{ $}}
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1200-NEXT: V_CMP_EQ_U32_e32 0, killed $vgpr0, implicit-def $vcc_lo, implicit $exec
; GFX1200-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX1200-NEXT: $sgpr0 = S_ADDC_U32 $sgpr32, 64, implicit-def $scc, implicit $scc
@@ -300,6 +1598,57 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
@@ -361,6 +1710,57 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
@@ -421,6 +1821,73 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX90A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr40, implicit $exec
; GFX90A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr41, implicit $exec
; GFX90A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr42, implicit $exec
@@ -481,6 +1948,57 @@ body: |
; GFX1010-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX1010: liveins: $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX1010-NEXT: {{ $}}
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1010-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX1010-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
; GFX1010-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
@@ -539,6 +2057,57 @@ body: |
; GFX1100-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX1100: liveins: $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX1100-NEXT: {{ $}}
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1100-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr40, $sgpr32, 60, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX1100-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 56, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
; GFX1100-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 52, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.4, addrspace 5)
@@ -598,6 +2167,57 @@ body: |
; GFX1200-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc_live_vcc_no_vgpr
; GFX1200: liveins: $sgpr4, $sgpr5, $vgpr0, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX1200-NEXT: {{ $}}
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX1200-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr40, $sgpr32, 60, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX1200-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 56, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
; GFX1200-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 52, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.4, addrspace 5)
@@ -694,6 +2314,54 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -721,6 +2389,54 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -747,6 +2463,54 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX90A: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -773,6 +2537,54 @@ body: |
; GFX1010-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX1010: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1010-NEXT: {{ $}}
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -799,6 +2611,54 @@ body: |
; GFX1100-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX1100: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1100-NEXT: {{ $}}
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -826,6 +2686,54 @@ body: |
; GFX1200-LABEL: name: materialize_fi_s_mov_b32_offset_24_live_scc_live_vcc_no_sgpr
; GFX1200: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1200-NEXT: {{ $}}
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -889,6 +2797,54 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX8-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -916,6 +2872,54 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX900-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -942,6 +2946,54 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX90A: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX90A-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -968,6 +3020,54 @@ body: |
; GFX1010-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX1010: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1010-NEXT: {{ $}}
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1010-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1010-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -994,6 +3094,54 @@ body: |
; GFX1100-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX1100: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1100-NEXT: {{ $}}
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1100-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1100-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
@@ -1021,6 +3169,54 @@ body: |
; GFX1200-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc_no_sgpr
; GFX1200: liveins: $sgpr4, $sgpr5, $vgpr0
; GFX1200-NEXT: {{ $}}
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX1200-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX1200-NEXT: S_NOP 0, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
index aecff1b13171d..48f1ab0ee3c30 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-bit-ops.mir
@@ -21,21 +21,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_or_b32__inline_imm__fi_offset0
- ; MUBUFW64: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 12, killed $sgpr4, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_or_b32__inline_imm__fi_offset0
- ; MUBUFW32: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 12, killed $sgpr4, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_or_b32__inline_imm__fi_offset0
- ; FLATSCRW64: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_or_b32__inline_imm__fi_offset0
- ; FLATSCRW32: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 12, $sgpr32, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_OR_B32 12, %stack.0, implicit-def $scc
SI_RETURN implicit $sgpr7, implicit $scc
@@ -55,24 +67,36 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: s_or_b32__literal__fi_offset96
- ; MUBUFW64: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 96, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
; MUBUFW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; MUBUFW32-LABEL: name: s_or_b32__literal__fi_offset96
- ; MUBUFW32: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 96, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW64-LABEL: name: s_or_b32__literal__fi_offset96
- ; FLATSCRW64: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
;
; FLATSCRW32-LABEL: name: s_or_b32__literal__fi_offset96
- ; FLATSCRW32: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 96, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 68, killed $sgpr4, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
renamable $sgpr7 = S_OR_B32 68, %stack.1, implicit-def $scc
@@ -96,6 +120,9 @@ body: |
; MUBUFW64-LABEL: name: s_or_b32__sgpr__fi_literal_offset
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -104,6 +131,9 @@ body: |
; MUBUFW32-LABEL: name: s_or_b32__sgpr__fi_literal_offset
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -112,6 +142,9 @@ body: |
; FLATSCRW64-LABEL: name: s_or_b32__sgpr__fi_literal_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -119,6 +152,9 @@ body: |
; FLATSCRW32-LABEL: name: s_or_b32__sgpr__fi_literal_offset
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -143,6 +179,9 @@ body: |
; MUBUFW64-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 32, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -151,6 +190,9 @@ body: |
; MUBUFW32-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 32, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -159,6 +201,9 @@ body: |
; FLATSCRW64-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 32, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -166,6 +211,9 @@ body: |
; FLATSCRW32-LABEL: name: s_or_b32__sgpr__fi_inlineimm_offset
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 32, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_OR_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -190,6 +238,9 @@ body: |
; MUBUFW64-LABEL: name: s_and_b32__sgpr__fi_literal_offset
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW64-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; MUBUFW64-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
; MUBUFW64-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -198,6 +249,9 @@ body: |
; MUBUFW32-LABEL: name: s_and_b32__sgpr__fi_literal_offset
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; MUBUFW32-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 5, implicit-def $scc
; MUBUFW32-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 80, implicit-def $scc
; MUBUFW32-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
@@ -206,6 +260,9 @@ body: |
; FLATSCRW64-LABEL: name: s_and_b32__sgpr__fi_literal_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW64-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
; FLATSCRW64-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
@@ -213,6 +270,9 @@ body: |
; FLATSCRW32-LABEL: name: s_and_b32__sgpr__fi_literal_offset
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
; FLATSCRW32-NEXT: $sgpr4 = S_ADD_I32 $sgpr32, 80, implicit-def $scc
; FLATSCRW32-NEXT: renamable $sgpr7 = S_AND_B32 $sgpr8, killed $sgpr4, implicit-def $scc
; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
index 2a4b305f32cef..fd296666514ad 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir
@@ -16,11 +16,17 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
- ; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
- ; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 0, implicit $exec
SI_RETURN implicit $vgpr0, implicit $sgpr0
@@ -39,12 +45,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc
- ; MUBUFW32: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc
- ; FLATSCRW32: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr0
renamable $vgpr0, $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 0, implicit $exec
@@ -64,12 +76,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
- ; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
- ; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
@@ -89,12 +107,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
- ; MUBUFW32: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
;
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
- ; FLATSCRW32: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
@@ -118,6 +142,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -125,6 +152,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -149,6 +179,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -156,6 +189,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -181,6 +217,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
@@ -188,6 +227,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -213,6 +255,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
@@ -220,6 +265,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -245,6 +293,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -252,6 +303,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc_lo
@@ -306,6 +360,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; MUBUFW32: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; MUBUFW32-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
@@ -314,6 +371,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; FLATSCRW32: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0, renamable $vcc_lo = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
index ae53a3696fc2b..95d9f226c4634 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
@@ -22,12 +22,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def dead $vcc, implicit $exec
@@ -47,13 +53,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0_live_vcc
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0_live_vcc
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -75,12 +87,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm___fi_offset_inline_imm
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 28, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm___fi_offset_inline_imm
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 28, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.1, implicit-def dead $vcc, implicit $exec
@@ -101,13 +119,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm___fi_offset_inline_imm_live_vcc
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 28, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm___fi_offset_inline_imm_live_vcc
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 28, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -128,12 +152,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 68, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 68, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 68, %stack.0, implicit-def dead $vcc, implicit $exec
@@ -153,13 +183,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0_live_vcc
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 68, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0_live_vcc
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 68, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -181,12 +217,18 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 100, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 100, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 68, %stack.1, implicit-def dead $vcc, implicit $exec
@@ -207,13 +249,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm_live_vcc
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 100, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm_live_vcc
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 100, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, killed $vgpr0, implicit-def $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -237,6 +285,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__vgpr__fi_offset0
; MUBUFW64: liveins: $vgpr1
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr1, killed $vgpr2, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
@@ -244,6 +295,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__vgpr__fi_offset0
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr32, $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr1, %stack.0, implicit-def dead $vcc, implicit $exec
@@ -266,6 +320,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__vgpr
; MUBUFW64: liveins: $vgpr1
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr1, killed $vgpr2, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
@@ -273,6 +330,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__vgpr
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr32, $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr1, implicit-def dead $vcc, implicit $exec
@@ -296,6 +356,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__vgpr__fi_literal_offset
; MUBUFW64: liveins: $vgpr1
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr1, killed $vgpr2, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
@@ -304,6 +367,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__vgpr__fi_literal_offset
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr32, $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
@@ -328,6 +394,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__vgpr
; MUBUFW64: liveins: $vgpr1
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr1, killed $vgpr2, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
@@ -336,6 +405,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__vgpr
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr32, $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
@@ -360,6 +432,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__sgpr__fi_literal_offset
; MUBUFW64: liveins: $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr8, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
@@ -368,6 +443,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__sgpr__fi_literal_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr8, killed $vgpr1, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
@@ -389,13 +467,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 12, killed $vgpr1, 0, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0
- ; FLATSCRW64: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 12, %stack.0, 0, implicit $exec
@@ -415,13 +499,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, killed $vgpr1, 0, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__clamp
- ; FLATSCRW64: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
@@ -441,13 +531,19 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUFW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
- ; MUBUFW64: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUFW64: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 12, killed $vgpr1, 0, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; FLATSCRW64-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp
- ; FLATSCRW64: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 12, %stack.0, 1, implicit $exec
@@ -471,6 +567,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX7: liveins: $sgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -480,6 +579,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX8: liveins: $sgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -489,6 +591,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX900: liveins: $sgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -498,6 +603,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX90A: liveins: $sgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -507,6 +615,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX10: liveins: $sgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
@@ -515,6 +626,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX942: liveins: $sgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -524,6 +638,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX11: liveins: $sgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -531,6 +648,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr
; GFX12: liveins: $sgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -555,6 +675,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX7: liveins: $sgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -564,6 +687,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX8: liveins: $sgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -573,6 +699,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX900: liveins: $sgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -582,6 +711,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX90A: liveins: $sgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -591,6 +723,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX10: liveins: $sgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
@@ -599,6 +734,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX942: liveins: $sgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -608,6 +746,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX11: liveins: $sgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -615,6 +756,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr_clamp
; GFX12: liveins: $sgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -640,6 +784,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX7: liveins: $vgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -649,6 +796,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX8: liveins: $vgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -658,6 +808,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX900: liveins: $vgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -667,6 +820,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX90A: liveins: $vgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -676,6 +832,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX10: liveins: $vgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
@@ -684,6 +843,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX942: liveins: $vgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $vgpr0, 0, implicit $exec
@@ -692,6 +854,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX11: liveins: $vgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0
@@ -699,6 +864,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr
; GFX12: liveins: $vgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0
@@ -724,6 +892,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX7: liveins: $vgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -733,6 +904,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX8: liveins: $vgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -742,6 +916,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX900: liveins: $vgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -751,6 +928,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX90A: liveins: $vgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -760,6 +940,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX10: liveins: $vgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
@@ -768,6 +951,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX942: liveins: $vgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $vgpr0, 1, implicit $exec
@@ -776,6 +962,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX11: liveins: $vgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0
@@ -783,6 +972,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__clamp
; GFX12: liveins: $vgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 1, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0
@@ -808,6 +1000,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX7: liveins: $vgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -817,6 +1012,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX8: liveins: $vgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -826,6 +1024,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX900: liveins: $vgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -835,6 +1036,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX90A: liveins: $vgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -844,6 +1048,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX10: liveins: $vgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
@@ -852,6 +1059,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX942: liveins: $vgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $vgpr0, 0, implicit $exec
@@ -860,6 +1070,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX11: liveins: $vgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -867,6 +1080,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc
; GFX12: liveins: $vgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
@@ -1081,6 +1297,9 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX7: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX7-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX7-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1093,6 +1312,9 @@ body: |
; GFX8-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX8: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX8-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1105,6 +1327,9 @@ body: |
; GFX900-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX900: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX900-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1117,6 +1342,9 @@ body: |
; GFX90A-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX90A-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1129,6 +1357,9 @@ body: |
; GFX10-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX10: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1140,6 +1371,9 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX942: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 132, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
@@ -1152,6 +1386,9 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX11: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX11-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
@@ -1160,6 +1397,9 @@ body: |
; GFX12-LABEL: name: v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required
; GFX12: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 128, killed $vgpr0, 0, implicit $exec
; GFX12-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
@@ -1188,6 +1428,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__sgpr__scavenge_spill_required
; MUBUFW64: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr8, killed $vgpr1, implicit-def dead $vcc, implicit $exec
@@ -1199,6 +1442,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__sgpr__scavenge_spill_required
; FLATSCRW64: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 132, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr8, killed $vgpr1, implicit-def dead $vcc, implicit $exec
@@ -1230,6 +1476,9 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__vgpr__scavenge_spill_required
; MUBUFW64: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW64-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 132, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr8, killed $vgpr1, implicit-def dead $vcc, implicit $exec
@@ -1241,6 +1490,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_literal_offset__vgpr__scavenge_spill_required
; FLATSCRW64: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253, $vgpr254, $vgpr255, $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 $sgpr32, $vgpr8, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 128, killed $vgpr0, implicit-def dead $vcc, implicit $exec
; FLATSCRW64-NEXT: S_NOP 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, implicit $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, implicit $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, implicit $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, implicit $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, implicit $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, implicit $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, implicit $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, implicit $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, implicit $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, implicit $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, implicit $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, implicit $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, implicit $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, implicit $vgpr248_vgpr249_vgpr250_vgpr251, implicit $vgpr252_vgpr253, implicit $vgpr254, implicit $vgpr255
@@ -1798,6 +2050,11 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_func
; MUBUFW64: liveins: $sgpr4
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 killed $sgpr4, killed $vgpr1, 0, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
@@ -1805,6 +2062,11 @@ body: |
; GFX942-LABEL: name: v_add_co_u32_e64__fi_sgpr_func
; GFX942: liveins: $sgpr4
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX942-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 killed $sgpr4, killed $vgpr1, 0, implicit $exec
; GFX942-NEXT: SI_RETURN implicit $vgpr0
@@ -1812,12 +2074,22 @@ body: |
; GFX11-LABEL: name: v_add_co_u32_e64__fi_sgpr_func
; GFX11: liveins: $sgpr4
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; GFX11-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 $sgpr32, killed $sgpr4, 0, implicit $exec
; GFX11-NEXT: SI_RETURN implicit $vgpr0
;
; GFX12-LABEL: name: v_add_co_u32_e64__fi_sgpr_func
; GFX12: liveins: $sgpr4
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; GFX12-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 $sgpr32, killed $sgpr4, 0, implicit $exec
; GFX12-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec
@@ -1875,6 +2147,11 @@ body: |
; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_func
; MUBUFW64: liveins: $vgpr0
; MUBUFW64-NEXT: {{ $}}
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; MUBUFW64-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUFW64-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 killed $vgpr0, killed $vgpr1, 0, implicit $exec
; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0
@@ -1882,6 +2159,11 @@ body: |
; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_func
; FLATSCRW64: liveins: $vgpr0
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; FLATSCRW64-NEXT: renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 $sgpr32, killed $vgpr0, 0, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $vgpr0, 0, implicit $exec
@@ -2182,11 +2464,19 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX7: liveins: $sgpr4, $sgpr5
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX7-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX7-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX7-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX7-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX7-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX7-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX7-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX7-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2194,17 +2484,26 @@ body: |
; GFX7-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX7-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX7-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX7-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX7-NEXT: SI_RETURN implicit $vgpr0
;
; GFX8-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX8-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX8-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX8-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX8-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX8-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX8-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX8-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX8-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2212,102 +2511,157 @@ body: |
; GFX8-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX8-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX8-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX8-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX8-NEXT: SI_RETURN implicit $vgpr0
;
; GFX900-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX900-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX900-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX900-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX900-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX900-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX900-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX900-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX900-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX900-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX900-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX900-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX900-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX900-NEXT: SI_RETURN implicit $vgpr0
;
; GFX90A-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX90A-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX90A-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX90A-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX90A-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX90A-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX90A-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX90A-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX90A-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX90A-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX90A-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX90A-NEXT: SI_RETURN implicit $vgpr0
;
; GFX10-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX10: liveins: $sgpr4, $sgpr5
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX10-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX10-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX10-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX10-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX10-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX10-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 12352, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX10-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX10-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX10-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX10-NEXT: SI_RETURN implicit $vgpr0
;
; GFX942-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX942: liveins: $sgpr4, $sgpr5
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX942-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX942-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX942-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX942-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX942-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX942-NEXT: $sgpr6 = S_ADD_I32 $sgpr33, 12288, implicit-def $scc
; GFX942-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $sgpr6, 0, implicit $exec
; GFX942-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX942-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX942-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX942-NEXT: SI_RETURN implicit $vgpr0
;
; GFX11-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX11: liveins: $sgpr4, $sgpr5
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX11-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX11-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX11-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX11-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX11-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX11-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $sgpr33, 12352, 0, implicit $exec
; GFX11-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX11-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX11-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX11-NEXT: SI_RETURN implicit $vgpr0
;
; GFX12-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc
; GFX12: liveins: $sgpr4, $sgpr5
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX12-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX12-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX12-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX12-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX12-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24576, implicit-def dead $scc
; GFX12-NEXT: renamable $vgpr0, dead renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $sgpr33, 4160, 0, implicit $exec
; GFX12-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX12-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX12-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX12-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, %stack.1, 0, implicit $exec
@@ -2332,11 +2686,19 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX7: liveins: $sgpr4, $sgpr5
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX7-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX7-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX7-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX7-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX7-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX7-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX7-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX7-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2344,17 +2706,26 @@ body: |
; GFX7-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX7-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX7-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX7-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX8-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX8-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX8-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX8-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX8-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX8-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX8-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX8-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX8-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2362,105 +2733,160 @@ body: |
; GFX8-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX8-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX8-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX8-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX8-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX900-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX900-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX900-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX900-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX900-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX900-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX900-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX900-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX900-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX900-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX900-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX900-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX900-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX90A-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX90A-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX90A-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX90A-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX90A-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX90A-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX90A-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX90A-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX90A-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX90A-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX90A-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX90A-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX10-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX10: liveins: $sgpr4, $sgpr5
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX10-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX10-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX10-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX10-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX10-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX10-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 12352, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX10-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX10-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX10-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX10-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX10-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX942-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX942: liveins: $sgpr4, $sgpr5
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX942-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX942-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX942-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX942-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX942-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX942-NEXT: $sgpr6 = S_ADD_I32 $sgpr33, 12288, implicit-def $scc
; GFX942-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, killed $sgpr6, 0, implicit $exec
; GFX942-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX942-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX942-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX942-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX11-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX11: liveins: $sgpr4, $sgpr5
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX11-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX11-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX11-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX11-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX11-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX11-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $sgpr33, 12352, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX11-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX11-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX11-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX11-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
;
; GFX12-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live
; GFX12: liveins: $sgpr4, $sgpr5
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; GFX12-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX12-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX12-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX12-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX12-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24576, implicit-def dead $scc
; GFX12-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $sgpr33, 4160, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX12-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX12-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX12-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX12-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8_sgpr9
renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 64, %stack.1, 0, implicit $exec
@@ -2485,11 +2911,17 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX7: liveins: $sgpr4, $sgpr5
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX7-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX7-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX7-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX7-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX7-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX7-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX7-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2497,17 +2929,24 @@ body: |
; GFX7-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX7-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX7-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX7-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX7-NEXT: SI_RETURN implicit $vgpr0
;
; GFX8-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX8-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX8-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX8-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX8-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX8-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX8-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX8-NEXT: $vcc_lo = S_MOV_B32 12288
@@ -2515,102 +2954,145 @@ body: |
; GFX8-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX8-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX8-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX8-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX8-NEXT: SI_RETURN implicit $vgpr0
;
; GFX900-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX900-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX900-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX900-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX900-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX900-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX900-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX900-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX900-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX900-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX900-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX900-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX900-NEXT: SI_RETURN implicit $vgpr0
;
; GFX90A-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX90A-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX90A-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX90A-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX90A-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX90A-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX90A-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX90A-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX90A-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX90A-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX90A-NEXT: SI_RETURN implicit $vgpr0
;
; GFX10-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX10: liveins: $sgpr4, $sgpr5
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX10-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX10-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX10-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX10-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX10-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX10-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 12352, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX10-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX10-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX10-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX10-NEXT: SI_RETURN implicit $vgpr0
;
; GFX942-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX942: liveins: $sgpr4, $sgpr5
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX942-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX942-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX942-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX942-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX942-NEXT: $sgpr6 = S_ADD_I32 $sgpr33, 12288, implicit-def $scc
; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 64, killed $sgpr6, 0, implicit $exec
; GFX942-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX942-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX942-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX942-NEXT: SI_RETURN implicit $vgpr0
;
; GFX11-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX11: liveins: $sgpr4, $sgpr5
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX11-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX11-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX11-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX11-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr33, 12352, 0, implicit $exec
; GFX11-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX11-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX11-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX11-NEXT: SI_RETURN implicit $vgpr0
;
; GFX12-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc
; GFX12: liveins: $sgpr4, $sgpr5
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX12-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX12-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX12-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX12-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24576, implicit-def dead $scc
; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $sgpr33, 4160, 0, implicit $exec
; GFX12-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX12-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX12-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX12-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 64, %stack.1, 0, implicit $exec
@@ -2635,11 +3117,17 @@ body: |
; GFX7-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX7: liveins: $sgpr4, $sgpr5
; GFX7-NEXT: {{ $}}
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX7-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX7-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX7-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX7-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX7-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX7-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX7-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX7-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX7-NEXT: $sgpr6 = S_MOV_B32 12288
@@ -2647,17 +3135,24 @@ body: |
; GFX7-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX7-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX7-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX7-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX7-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX7-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX8-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX8-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX8-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX8-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX8-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX8-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX8-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX8-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX8-NEXT: $sgpr6 = S_MOV_B32 12288
@@ -2665,105 +3160,148 @@ body: |
; GFX8-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX8-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX8-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX8-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX8-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX8-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX900-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX900-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX900-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX900-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX900-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX900-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX900-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX900-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX900-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX900-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX900-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX900-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX900-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX900-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX900-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX90A-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX90A-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX90A-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX90A-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX90A-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX90A-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX90A-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX90A-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX90A-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; GFX90A-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, killed $vgpr1, 0, implicit $exec
; GFX90A-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX90A-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX90A-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX90A-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX90A-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX10-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX10: liveins: $sgpr4, $sgpr5
; GFX10-NEXT: {{ $}}
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX10-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX10-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX10-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX10-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX10-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX10-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX10-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 12352, killed $vgpr1, 0, implicit $exec
; GFX10-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX10-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX10-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX10-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX10-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX10-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX942-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX942: liveins: $sgpr4, $sgpr5
; GFX942-NEXT: {{ $}}
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX942-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX942-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX942-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX942-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX942-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX942-NEXT: $sgpr6 = S_ADD_I32 $sgpr33, 12288, implicit-def $scc
; GFX942-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, killed $sgpr6, 0, implicit $exec
; GFX942-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX942-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX942-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX942-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX942-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX11-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX11: liveins: $sgpr4, $sgpr5
; GFX11-NEXT: {{ $}}
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX11-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX11-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX11-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX11-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX11-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr33, 12352, 0, implicit $exec
; GFX11-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX11-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX11-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX11-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX11-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX11-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
;
; GFX12-LABEL: name: v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live
; GFX12: liveins: $sgpr4, $sgpr5
; GFX12-NEXT: {{ $}}
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX12-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; GFX12-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX12-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX12-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; GFX12-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24576, implicit-def dead $scc
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 $sgpr33, 4160, 0, implicit $exec
; GFX12-NEXT: renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr0, 0, 0, implicit $exec
; GFX12-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; GFX12-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; GFX12-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX12-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; GFX12-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc
renamable $vgpr0, renamable $vcc = V_ADD_CO_U32_e64 64, %stack.1, 0, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
index c5c9696ee355a..3b1ad0cf28e58 100644
--- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
+++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
@@ -18,22 +18,34 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0
- ; MUBUF: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 12, killed $vgpr1, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0
- ; MUBUFW32: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 12, killed $vgpr1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 12, killed $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0
- ; FLATSCRW32: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 12, killed $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 12, %stack.0, implicit $exec
@@ -54,22 +66,34 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUF-LABEL: name: v_add_u32_e32__inline_imm___fi_offset_inline_imm
- ; MUBUF: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 28, killed $vgpr1, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm___fi_offset_inline_imm
- ; MUBUFW32: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 28, killed $vgpr1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm___fi_offset_inline_imm
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 28, killed $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm___fi_offset_inline_imm
- ; FLATSCRW32: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 28, killed $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 12, %stack.1, implicit $exec
@@ -89,22 +113,34 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUF-LABEL: name: v_add_u32_e32__literal__fi_offset0
- ; MUBUF: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 68, killed $vgpr1, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e32__literal__fi_offset0
- ; MUBUFW32: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 68, killed $vgpr1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e32__literal__fi_offset0
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 68, killed $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__literal__fi_offset0
- ; FLATSCRW32: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 68, killed $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 68, %stack.0, implicit $exec
@@ -125,22 +161,34 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUF-LABEL: name: v_add_u32_e32__literal__fi_offset0__offset_inlineimm
- ; MUBUF: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 100, killed $vgpr1, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e32__literal__fi_offset0__offset_inlineimm
- ; MUBUFW32: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 100, killed $vgpr1, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e32__literal__fi_offset0__offset_inlineimm
- ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 100, killed $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__literal__fi_offset0__offset_inlineimm
- ; FLATSCRW32: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 100, killed $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 68, %stack.1, implicit $exec
@@ -163,6 +211,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e32__vgpr__fi_offset0
; MUBUF: liveins: $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
@@ -170,6 +221,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e32__vgpr__fi_offset0
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
@@ -177,12 +231,18 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e32__vgpr__fi_offset0
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__vgpr__fi_offset0
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, %stack.0, implicit $exec
@@ -205,6 +265,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__vgpr
; MUBUF: liveins: $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
@@ -212,6 +275,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__vgpr
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
@@ -219,12 +285,18 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__vgpr
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__vgpr
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e32 %stack.0, $vgpr1, implicit $exec
@@ -248,6 +320,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e32__vgpr__fi_literal_offset
; MUBUF: liveins: $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -256,6 +331,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e32__vgpr__fi_literal_offset
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -264,6 +342,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e32__vgpr__fi_literal_offset
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
@@ -271,6 +352,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e32__vgpr__fi_literal_offset
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -295,6 +379,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e32__fi_literal_offset__vgpr
; MUBUF: liveins: $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -303,6 +390,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e32__fi_literal_offset__vgpr
; MUBUFW32: liveins: $vgpr1
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr2 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $vgpr1, killed $vgpr2, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -311,6 +401,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_literal_offset__vgpr
; FLATSCRW64: liveins: $vgpr1
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
@@ -318,6 +411,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_literal_offset__vgpr
; FLATSCRW32: liveins: $vgpr1
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr32, $vgpr1, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -342,6 +438,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e32__sgpr__fi_literal_offset
; MUBUF: liveins: $sgpr8
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -350,6 +449,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e32__sgpr__fi_literal_offset
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -358,6 +460,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e32__sgpr__fi_literal_offset
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -366,6 +471,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e32__sgpr__fi_literal_offset
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 128, killed $vgpr0, implicit $exec
@@ -387,21 +495,33 @@ machineFunctionInfo:
body: |
bb.0:
; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0
- ; MUBUF: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 12, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0
- ; MUBUFW32: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
+ ; MUBUFW32: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 12, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0
- ; FLATSCRW64: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0
- ; FLATSCRW32: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, 12, 0, implicit $exec
+ ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, 12, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e64 12, %stack.0, 0, implicit $exec
SI_RETURN implicit $vgpr0
@@ -424,6 +544,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e64__fi_literal_offset__sgpr
; MUBUF: liveins: $sgpr8
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -433,6 +556,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal_offset__sgpr
; MUBUFW32: liveins: $sgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, killed $vgpr0, 0, implicit $exec
@@ -441,6 +567,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal_offset__sgpr
; FLATSCRW64: liveins: $sgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, killed $vgpr1, 0, implicit $exec
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -450,6 +579,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal_offset__sgpr
; FLATSCRW32: liveins: $sgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $sgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, killed $vgpr0, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -474,6 +606,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset
; MUBUF: liveins: $vgpr8
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -483,6 +618,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr0, 128, 0, implicit $exec
@@ -491,6 +629,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset
; FLATSCRW64: liveins: $vgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, killed $vgpr0, 0, implicit $exec
@@ -499,6 +640,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr0, 128, 0, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -523,6 +667,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset__clamp
; MUBUF: liveins: $vgpr8
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -532,6 +679,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset__clamp
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr0, 128, 1, implicit $exec
@@ -540,6 +690,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset__clamp
; FLATSCRW64: liveins: $vgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, killed $vgpr0, 1, implicit $exec
@@ -548,6 +701,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e64__vgpr__fi_literal_offset__clamp
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr0, 128, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -572,6 +728,9 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp
; MUBUF: liveins: $vgpr8
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
@@ -581,6 +740,9 @@ body: |
; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp
; MUBUFW32: liveins: $vgpr8
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr32, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr8, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, killed $vgpr0, 1, implicit $exec
@@ -589,6 +751,9 @@ body: |
; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp
; FLATSCRW64: liveins: $vgpr8
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, killed $vgpr0, 1, implicit $exec
@@ -597,6 +762,9 @@ body: |
; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp
; FLATSCRW32: liveins: $vgpr8
; FLATSCRW32-NEXT: {{ $}}
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr32, $vgpr8, 0, implicit $exec
; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, killed $vgpr0, 1, implicit $exec
; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0
@@ -1902,49 +2070,70 @@ body: |
; MUBUF-LABEL: name: v_add_u32_e64_imm_fi_vop3_literal_error
; MUBUF: liveins: $sgpr4, $sgpr5
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; MUBUF-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; MUBUF-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; MUBUF-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; MUBUF-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; MUBUF-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; MUBUF-NEXT: $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; MUBUF-NEXT: $vgpr1 = V_ADD_U32_e32 12288, killed $vgpr1, implicit $exec
; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 64, killed $vgpr1, 0, implicit $exec
; MUBUF-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; MUBUF-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; MUBUF-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; MUBUF-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; MUBUF-NEXT: SI_RETURN implicit $vgpr0
;
; MUBUFW32-LABEL: name: v_add_u32_e64_imm_fi_vop3_literal_error
; MUBUFW32: liveins: $sgpr4, $sgpr5
; MUBUFW32-NEXT: {{ $}}
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUFW32-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; MUBUFW32-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 262112, implicit-def $scc
; MUBUFW32-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294705152, implicit-def dead $scc
; MUBUFW32-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; MUBUFW32-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; MUBUFW32-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 1048576, implicit-def dead $scc
; MUBUFW32-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 5, $sgpr33, implicit $exec
; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 12352, killed $vgpr1, 0, implicit $exec
; MUBUFW32-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; MUBUFW32-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; MUBUFW32-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; MUBUFW32-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0
;
; FLATSCRW64-LABEL: name: v_add_u32_e64_imm_fi_vop3_literal_error
; FLATSCRW64: liveins: $sgpr4, $sgpr5
; FLATSCRW64-NEXT: {{ $}}
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; FLATSCRW64-NEXT: $sgpr4 = frame-setup COPY $sgpr33
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr4
; FLATSCRW64-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; FLATSCRW64-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; FLATSCRW64-NEXT: $sgpr5 = frame-setup COPY $sgpr34
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr5
; FLATSCRW64-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCRW64-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; FLATSCRW64-NEXT: $sgpr6 = S_ADD_I32 $sgpr33, 12288, implicit-def $scc
; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 64, killed $sgpr6, 0, implicit $exec
; FLATSCRW64-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; FLATSCRW64-NEXT: $sgpr34 = frame-destroy COPY $sgpr5
+ ; FLATSCRW64-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCRW64-NEXT: $sgpr33 = frame-destroy COPY $sgpr4
; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0
renamable $vgpr0 = V_ADD_U32_e64 64, %stack.1, 0, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/frame-index.mir b/llvm/test/CodeGen/AMDGPU/frame-index.mir
index 81bd8baaa0e5d..6d54bb544fb8c 100644
--- a/llvm/test/CodeGen/AMDGPU/frame-index.mir
+++ b/llvm/test/CodeGen/AMDGPU/frame-index.mir
@@ -21,6 +21,9 @@ body: |
; GCN-LABEL: name: func_add_constant_to_fi_divergent_i32
; GCN: liveins: $vgpr31, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: renamable $vgpr0 = V_AND_B32_e32 1023, killed $vgpr31, implicit $exec
; GCN-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec
; GCN-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
@@ -55,6 +58,10 @@ body: |
; GCN-LABEL: name: func_add_constant_to_fi_uniform_i32
; GCN: liveins: $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GCN-NEXT: renamable $sgpr0 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4 = nuw S_ADD_I32 $sgpr0, 4, implicit-def dead $scc
; GCN-NEXT: renamable $vgpr0 = COPY killed renamable $sgpr4, implicit $exec
@@ -91,6 +98,12 @@ body: |
; GCN-LABEL: name: func_add_constant_to_fi_uniform_SCC_clobber_i32
; GCN: liveins: $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
; GCN-NEXT: renamable $sgpr0 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4 = nuw S_ADD_U32 $sgpr0, 4, implicit-def $scc
; GCN-NEXT: renamable $sgpr5 = S_ADDC_U32 $sgpr4, 1234567, implicit-def $scc, implicit $scc
@@ -132,6 +145,10 @@ body: |
; GCN-LABEL: name: func_other_fi_user_non_inline_imm_offset_i32
; GCN: liveins: $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GCN-NEXT: renamable $vgpr0 = V_MOV_B32_e32 7, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed renamable $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 260, 0, 0, implicit $exec
; GCN-NEXT: $sgpr5 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
@@ -168,6 +185,12 @@ body: |
; GCN-LABEL: name: func_add_constant_to_fi_uniform_live_SCC_i32
; GCN: liveins: $sgpr30_sgpr31, $sgpr10
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
; GCN-NEXT: renamable $sgpr4 = nuw S_ADD_U32 $sgpr10, 4, implicit-def $scc
; GCN-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GCN-NEXT: $sgpr0 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
@@ -204,6 +227,9 @@ body: |
; GCN-LABEL: name: func_frame_idx_at_the_end_of_bb
; GCN: liveins: $vgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: renamable $vgpr0 = V_AND_B32_e32 1023, killed $vgpr31, implicit $exec
; GCN-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec
; GCN-NEXT: renamable $vgpr1 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
@@ -223,7 +249,10 @@ machineFunctionInfo:
body: |
bb.0:
; GCN-LABEL: name: materialize_fi_s_mov_b32_offset_0_dead_scc
- ; GCN: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
+ ; GCN: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def dead $scc
; GCN-NEXT: S_ENDPGM 0, implicit $sgpr4
renamable $sgpr4 = S_MOV_B32 %stack.0
S_ENDPGM 0, implicit $sgpr4
@@ -244,6 +273,9 @@ body: |
; GCN-LABEL: name: materialize_fi_s_mov_b32_offset_0_live_scc
; GCN: liveins: $sgpr4, $sgpr5
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GCN-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GCN-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GCN-NEXT: $sgpr4 = V_READFIRSTLANE_B32 $vgpr0, implicit $exec
@@ -266,7 +298,10 @@ machineFunctionInfo:
body: |
bb.0:
; GCN-LABEL: name: materialize_fi_s_mov_b32_offset_64_dead_scc
- ; GCN: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
+ ; GCN: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; GCN-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 64, implicit-def $scc
; GCN-NEXT: S_ENDPGM 0, implicit $sgpr4
renamable $sgpr4 = S_MOV_B32 %stack.1
@@ -285,7 +320,10 @@ machineFunctionInfo:
body: |
bb.0:
; GCN-LABEL: name: materialize_fi_s_mov_b32_offset_68_dead_scc
- ; GCN: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
+ ; GCN: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: $sgpr4 = S_LSHR_B32 $sgpr32, 6, implicit-def $scc
; GCN-NEXT: $sgpr4 = S_ADD_I32 killed $sgpr4, 68, implicit-def $scc
; GCN-NEXT: S_ENDPGM 0, implicit $sgpr4
renamable $sgpr4 = S_MOV_B32 %stack.1
@@ -308,6 +346,9 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX8-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: $sgpr4 = S_MOV_B32 64
@@ -318,6 +359,9 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX900-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: $vgpr0 = V_ADD_U32_e32 64, killed $vgpr0, implicit $exec
@@ -327,6 +371,9 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_64_live_scc
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX90A-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: $vgpr0 = V_ADD_U32_e32 64, killed $vgpr0, implicit $exec
@@ -353,6 +400,9 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc
; GFX8: liveins: $sgpr4, $sgpr5
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX8-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX8-NEXT: $sgpr4 = S_MOV_B32 68
@@ -363,6 +413,9 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc
; GFX900: liveins: $sgpr4, $sgpr5
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX900-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX900-NEXT: $vgpr0 = V_ADD_U32_e32 68, killed $vgpr0, implicit $exec
@@ -372,6 +425,9 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_68_live_scc
; GFX90A: liveins: $sgpr4, $sgpr5
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: S_CMP_EQ_I32 $sgpr4, $sgpr5, implicit-def $scc
; GFX90A-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; GFX90A-NEXT: $vgpr0 = V_ADD_U32_e32 68, killed $vgpr0, implicit $exec
@@ -401,6 +457,49 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_0_live_scc__no_free_vgprs
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
@@ -461,6 +560,49 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_0_live_scc__no_free_vgprs
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
@@ -520,6 +662,65 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_0_live_scc__no_free_vgprs
; GFX90A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $sgpr4, $sgpr5, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr40, implicit $exec
; GFX90A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr41, implicit $exec
; GFX90A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr42, implicit $exec
@@ -615,6 +816,57 @@ body: |
; GFX8-LABEL: name: materialize_fi_s_mov_b32_offset_96_live_scc__no_free_vgprs
; GFX8: liveins: $sgpr4, $sgpr5, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
@@ -675,6 +927,57 @@ body: |
; GFX900-LABEL: name: materialize_fi_s_mov_b32_offset_96_live_scc__no_free_vgprs
; GFX900: liveins: $sgpr4, $sgpr5, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX900-NEXT: {{ $}}
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 60, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr41, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 56, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
; GFX900-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr42, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 52, 0, 0, implicit $exec :: (store (s32) into %stack.4, addrspace 5)
@@ -734,6 +1037,73 @@ body: |
; GFX90A-LABEL: name: materialize_fi_s_mov_b32_offset_96_live_scc__no_free_vgprs
; GFX90A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $sgpr4, $sgpr5, $vgpr40, $vgpr41, $vgpr42, $vgpr43, $vgpr44, $vgpr45, $vgpr46, $vgpr47, $vgpr56, $vgpr57, $vgpr58, $vgpr59, $vgpr60, $vgpr61, $vgpr62, $vgpr63
; GFX90A-NEXT: {{ $}}
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
; GFX90A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr40, implicit $exec
; GFX90A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr41, implicit $exec
; GFX90A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr42, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
index 831d10480c51c..381b1741517b7 100644
--- a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
@@ -1727,12 +1727,12 @@ define void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inr
; GFX9-NEXT: s_or_saveexec_b64 s[20:21], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[20:21]
+; GFX9-NEXT: v_writelane_b32 v40, s19, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: s_getpc_b64 s[20:21]
; GFX9-NEXT: s_add_u32 s20, s20, caller_void_func_i32_v2float_inreg at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s21, s21, caller_void_func_i32_v2float_inreg at gotpcrel32@hi+12
; GFX9-NEXT: s_load_dwordx2 s[20:21], s[20:21], 0x0
-; GFX9-NEXT: v_writelane_b32 v40, s19, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s2, s18
; GFX9-NEXT: s_mov_b32 s1, s17
@@ -1759,13 +1759,13 @@ define void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inr
; GFX11-NEXT: s_or_saveexec_b32 s16, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s16
+; GFX11-NEXT: v_writelane_b32 v40, s3, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_getpc_b64 s[16:17]
; GFX11-NEXT: s_add_u32 s16, s16, caller_void_func_i32_v2float_inreg at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s17, s17, caller_void_func_i32_v2float_inreg at gotpcrel32@hi+12
-; GFX11-NEXT: v_writelane_b32 v40, s3, 2
-; GFX11-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -2132,6 +2132,7 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: s_or_saveexec_b64 s[40:41], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[40:41]
+; GFX9-NEXT: v_writelane_b32 v40, s29, 2
; GFX9-NEXT: v_mov_b32_e32 v2, s28
; GFX9-NEXT: global_store_dword v[0:1], v2, off offset:48
; GFX9-NEXT: v_mov_b32_e32 v5, s27
@@ -2140,13 +2141,13 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: v_mov_b32_e32 v2, s24
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:32
-; GFX9-NEXT: v_writelane_b32 v40, s29, 2
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: v_mov_b32_e32 v5, s23
; GFX9-NEXT: v_mov_b32_e32 v4, s22
; GFX9-NEXT: v_mov_b32_e32 v3, s21
; GFX9-NEXT: v_mov_b32_e32 v2, s20
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:16
-; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: v_mov_b32_e32 v3, s17
; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: s_getpc_b64 s[16:17]
@@ -2155,7 +2156,6 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v4, s18
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -2178,6 +2178,7 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX11-NEXT: s_or_saveexec_b32 s26, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s26
+; GFX11-NEXT: v_writelane_b32 v40, s25, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_dual_mov_b32 v4, s22 :: v_dual_mov_b32 v3, s21
; GFX11-NEXT: v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v9, s19
@@ -2187,20 +2188,18 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX11-NEXT: v_dual_mov_b32 v8, s18 :: v_dual_mov_b32 v7, s17
; GFX11-NEXT: v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v13, s3
; GFX11-NEXT: s_load_b64 s[16:17], s[20:21], 0x0
-; GFX11-NEXT: v_writelane_b32 v40, s25, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v14, s24 :: v_dual_mov_b32 v5, s23
; GFX11-NEXT: v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v11, s1
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v10, s0
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_clause 0x3
; GFX11-NEXT: global_store_b32 v[0:1], v14, off offset:48
; GFX11-NEXT: global_store_b128 v[0:1], v[2:5], off offset:32
; GFX11-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
; GFX11-NEXT: global_store_b128 v[0:1], v[10:13], off
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
index 234eaa8af7edf..3ca36a97981f2 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
@@ -162,13 +162,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
-; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-NEXT: v_readlane_b32 s30, v40, 0
@@ -191,15 +191,14 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: scratch_store_b8 off, v0, s32
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: scratch_store_b8 off, v0, s32
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
@@ -221,13 +220,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
-; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-SCRATCH-NEXT: v_readlane_b32 s30, v40, 0
@@ -253,9 +252,9 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i1_signext at abs32@hi
@@ -284,13 +283,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_signext at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
@@ -315,13 +314,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_signext at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_signext at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
@@ -346,13 +345,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_signext at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
@@ -382,9 +381,9 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i1_zeroext at abs32@hi
@@ -413,13 +412,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_zeroext at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
@@ -444,13 +443,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_zeroext at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_zeroext at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
@@ -475,13 +474,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_zeroext at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
@@ -540,11 +539,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -568,11 +567,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x7b
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -596,11 +595,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -625,11 +624,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -656,9 +655,9 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_sbyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_signext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_signext at abs32@lo
@@ -685,13 +684,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_sbyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_signext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -714,13 +713,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_i8 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -743,13 +742,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_i8 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -773,13 +772,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_sbyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -807,9 +806,9 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_zeroext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_zeroext at abs32@lo
@@ -836,13 +835,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_zeroext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -865,13 +864,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -894,13 +893,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -924,13 +923,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -987,11 +986,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1015,11 +1014,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x7b
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1043,11 +1042,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1072,11 +1071,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1103,9 +1102,9 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ushort v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i16_signext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i16_signext at abs32@lo
@@ -1132,13 +1131,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_signext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1161,13 +1160,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1190,13 +1189,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1220,13 +1219,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1254,9 +1253,9 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ushort v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i16_zeroext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i16_zeroext at abs32@lo
@@ -1283,13 +1282,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_zeroext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1312,13 +1311,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1341,13 +1340,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1371,13 +1370,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1434,11 +1433,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1462,11 +1461,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 42
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1491,11 +1490,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 42
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1552,11 +1551,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i64 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -1581,10 +1580,10 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0x7b :: v_dual_mov_b32 v1, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i64 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1610,11 +1609,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i64 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1642,10 +1641,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
@@ -1672,14 +1671,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1702,14 +1701,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1733,14 +1732,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1800,11 +1799,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -1831,9 +1830,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -1861,11 +1860,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -1895,10 +1894,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i64 at abs32@lo
@@ -1927,14 +1926,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 1
; GFX10-NEXT: v_mov_b32_e32 v5, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i64 at abs32@hi
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -1959,14 +1958,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v5, 2
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i64 at abs32@lo
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1990,14 +1989,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i64 at abs32@hi
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -2029,10 +2028,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i64 at abs32@lo
@@ -2063,14 +2062,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 1
; GFX10-NEXT: v_mov_b32_e32 v5, 2
; GFX10-NEXT: v_mov_b32_e32 v6, 3
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v7, 4
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i64 at abs32@lo
@@ -2097,13 +2096,13 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v5, 2
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v6, 3 :: v_dual_mov_b32 v7, 4
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i64 at abs32@hi
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -2129,14 +2128,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, 3
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v7, 4
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i64 at abs32@lo
@@ -2198,11 +2197,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -2226,11 +2225,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x4400
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2254,11 +2253,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2283,11 +2282,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -2343,11 +2342,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 4.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -2371,11 +2370,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 4.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2400,11 +2399,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 4.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -2461,11 +2460,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f32 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -2490,10 +2489,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f32 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2519,11 +2518,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f32 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2582,11 +2581,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f32 at abs32@hi
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -2612,10 +2611,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_mov_b32_e32 v2, 4.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f32 at abs32@hi
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -2642,11 +2641,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f32 at abs32@hi
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -2708,11 +2707,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-NEXT: v_mov_b32_e32 v3, -1.0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 0.5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5f32 at abs32@lo
@@ -2740,9 +2739,9 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 4.0 :: v_dual_mov_b32 v3, -1.0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v4, 0.5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5f32 at abs32@lo
@@ -2771,11 +2770,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, -1.0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 0.5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5f32 at abs32@lo
@@ -2836,11 +2835,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f64 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -2865,10 +2864,10 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x40100000
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f64 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2894,11 +2893,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f64 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2958,11 +2957,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x40100000
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -2989,9 +2988,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40100000
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -3019,11 +3018,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 0x40100000
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -3087,11 +3086,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x40100000
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0x40200000
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f64 at abs32@hi
@@ -3120,9 +3119,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40100000
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0x40200000
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f64 at abs32@lo
@@ -3151,11 +3150,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 0x40100000
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 0x40200000
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f64 at abs32@hi
@@ -3187,10 +3186,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_ushort v0, v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i8 at abs32@hi
@@ -3220,15 +3219,15 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -3253,14 +3252,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -3286,14 +3285,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -3320,15 +3319,15 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -3358,10 +3357,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8 at abs32@lo
@@ -3391,14 +3390,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3424,14 +3423,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3457,14 +3456,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3495,10 +3494,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i8 at abs32@lo
@@ -3529,14 +3528,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3563,14 +3562,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3597,14 +3596,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3636,10 +3635,10 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v5i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v5i8 at abs32@lo
@@ -3672,14 +3671,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3708,14 +3707,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b64 v[5:6], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3744,14 +3743,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3785,10 +3784,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i8 at abs32@lo
@@ -3824,14 +3823,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3863,14 +3862,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3901,14 +3900,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3945,14 +3944,14 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v4, 16
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
-; GFX9-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i8 at abs32@lo
; GFX9-NEXT: s_addk_i32 s32, 0x400
@@ -4016,17 +4015,17 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 16
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i8 at abs32@lo
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(1)
@@ -4088,15 +4087,15 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 16
; GFX11-NEXT: v_mov_b32_e32 v5, 0
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
; GFX11-NEXT: global_load_b128 v[16:19], v[4:5], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(1)
@@ -4155,17 +4154,17 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 16
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(1)
@@ -4233,12 +4232,12 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_ubyte v0, v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_ret at abs32@lo
@@ -4269,16 +4268,16 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_ubyte v0, v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: global_store_byte v[40:41], v0, off
@@ -4305,17 +4304,17 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: global_store_b8 v[40:41], v0, off
@@ -4341,17 +4340,17 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u8 v0, v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: global_store_b8 v[40:41], v0, off
@@ -4378,16 +4377,16 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: global_store_byte v[40:41], v0, off
@@ -4421,12 +4420,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_ushort v0, v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i8_ret at abs32@hi
@@ -4462,16 +4461,16 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i8_ret at abs32@lo
; GFX10-NEXT: global_load_ushort v0, v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
@@ -4503,17 +4502,17 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -4547,17 +4546,17 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -4591,16 +4590,16 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
@@ -4639,12 +4638,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dword v0, v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
@@ -4683,16 +4682,16 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4727,17 +4726,17 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b32 v0, v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4774,17 +4773,17 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b32 v0, v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4822,16 +4821,16 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4873,12 +4872,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dword v0, v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i8_ret at abs32@lo
@@ -4918,16 +4917,16 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4963,17 +4962,17 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b32 v0, v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5011,17 +5010,17 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b32 v0, v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5064,16 +5063,16 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5116,12 +5115,12 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v5i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v5i8_ret at abs32@lo
@@ -5166,16 +5165,16 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5216,17 +5215,17 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b64 v[5:6], v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5269,17 +5268,17 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b64 v[5:6], v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5327,16 +5326,16 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5384,12 +5383,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i8_ret at abs32@lo
@@ -5439,16 +5438,16 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5494,17 +5493,17 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v[40:41], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5552,17 +5551,17 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b64 v[0:1], v[40:41], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5617,16 +5616,16 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5679,6 +5678,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v44, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
@@ -5689,7 +5689,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX9-NEXT: v_mov_b32_e32 v43, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX9-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
-; GFX9-NEXT: v_writelane_b32 v44, s34, 2
; GFX9-NEXT: v_writelane_b32 v44, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
@@ -5801,6 +5800,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v44, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
@@ -5809,13 +5809,12 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-NEXT: v_mov_b32_e32 v42, 16
; GFX10-NEXT: v_mov_b32_e32 v41, 0
; GFX10-NEXT: v_mov_b32_e32 v43, 0
-; GFX10-NEXT: v_writelane_b32 v44, s34, 2
+; GFX10-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX10-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
-; GFX10-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x400
; GFX10-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(1)
@@ -5924,6 +5923,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
@@ -5932,12 +5932,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, 0 :: v_dual_mov_b32 v42, 16
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s0, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v[40:41], off
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: global_load_b128 v[16:19], v[42:43], off
-; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 32
; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
@@ -6051,6 +6050,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x3
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
@@ -6059,12 +6059,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, 0 :: v_dual_mov_b32 v42, 16
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s0, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v[40:41], off
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: global_load_b128 v[16:19], v[42:43], off
-; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 32
; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
@@ -6203,6 +6202,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:12 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:4 ; 4-byte Folded Spill
@@ -6211,13 +6211,12 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v42, 16
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v43, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 32
; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(1)
@@ -6334,8 +6333,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i16 at abs32@lo
@@ -6362,12 +6361,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dword v0, v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6390,12 +6389,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b32 v0, v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b32 v0, v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6419,12 +6418,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6452,8 +6451,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
@@ -6480,12 +6479,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6508,12 +6507,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6537,12 +6536,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6570,8 +6569,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
@@ -6598,12 +6597,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6626,12 +6625,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6655,12 +6654,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6718,11 +6717,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-NEXT: v_mov_b32_e32 v1, 3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -6747,10 +6746,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0x20001 :: v_dual_mov_b32 v1, 3
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6776,11 +6775,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6838,11 +6837,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX10-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -6867,11 +6866,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX11-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6897,11 +6896,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6929,8 +6928,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
@@ -6957,12 +6956,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6985,12 +6984,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7014,12 +7013,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7077,11 +7076,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -7106,11 +7105,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX11-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7136,11 +7135,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7168,8 +7167,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2f16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2f16 at abs32@lo
@@ -7196,12 +7195,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dword v0, v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7224,12 +7223,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b32 v0, v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b32 v0, v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7253,12 +7252,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7286,8 +7285,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
@@ -7314,12 +7313,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7342,12 +7341,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7371,12 +7370,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7434,11 +7433,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -7463,10 +7462,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7492,11 +7491,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7555,11 +7554,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 4
; GFX10-NEXT: v_mov_b32_e32 v2, 5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32 at abs32@hi
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -7585,10 +7584,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 4
; GFX11-NEXT: v_mov_b32_e32 v2, 5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32 at abs32@hi
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -7615,11 +7614,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32 at abs32@hi
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -7680,11 +7679,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 4
; GFX10-NEXT: v_mov_b32_e32 v2, 5
; GFX10-NEXT: v_mov_b32_e32 v3, 6
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -7711,9 +7710,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 4
; GFX11-NEXT: v_dual_mov_b32 v2, 5 :: v_dual_mov_b32 v3, 6
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -7741,11 +7740,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 5
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -7775,8 +7774,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
@@ -7803,12 +7802,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7831,12 +7830,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7860,12 +7859,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7925,11 +7924,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -7956,9 +7955,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -7986,11 +7985,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -8053,11 +8052,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i32 at abs32@lo
@@ -8085,9 +8084,9 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v4, 5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i32 at abs32@lo
@@ -8116,11 +8115,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i32 at abs32@lo
@@ -8156,12 +8155,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v8, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v8, s[34:35] offset:16
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i32 at abs32@lo
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8186,12 +8185,13 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v8, 0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v8, s[34:35]
; GFX10-NEXT: global_load_dwordx4 v[4:7], v8, s[34:35] offset:16
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8219,12 +8219,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v4, 0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: global_load_b128 v[0:3], v4, s[0:1]
; GFX11-NEXT: global_load_b128 v[4:7], v4, s[0:1] offset:16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8253,12 +8253,13 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v8, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v8, s[0:1]
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[4:7], v8, s[0:1] offset:16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8325,11 +8326,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 5
; GFX10-NEXT: v_mov_b32_e32 v5, 6
; GFX10-NEXT: v_mov_b32_e32 v6, 7
@@ -8360,9 +8361,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v4, 5 :: v_dual_mov_b32 v5, 6
; GFX11-NEXT: v_dual_mov_b32 v6, 7 :: v_dual_mov_b32 v7, 8
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
@@ -8392,11 +8393,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 5
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 6
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, 7
@@ -8435,6 +8436,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v16, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v16, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v16, s[34:35] offset:16
@@ -8442,7 +8444,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX9-NEXT: global_load_dwordx4 v[12:15], v16, s[34:35] offset:48
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v16i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v16i32 at abs32@lo
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8467,6 +8468,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v16, 0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x3
@@ -8474,7 +8476,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-NEXT: global_load_dwordx4 v[4:7], v16, s[34:35] offset:16
; GFX10-NEXT: global_load_dwordx4 v[8:11], v16, s[34:35] offset:32
; GFX10-NEXT: global_load_dwordx4 v[12:15], v16, s[34:35] offset:48
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8502,6 +8504,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v12, 0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x3
@@ -8509,7 +8512,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX11-NEXT: global_load_b128 v[4:7], v12, s[0:1] offset:16
; GFX11-NEXT: global_load_b128 v[8:11], v12, s[0:1] offset:32
; GFX11-NEXT: global_load_b128 v[12:15], v12, s[0:1] offset:48
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8538,6 +8540,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v16, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x3
@@ -8545,7 +8548,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:16
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:32
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:48
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8581,6 +8584,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v28, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v28, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v28, s[34:35] offset:16
@@ -8593,7 +8597,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX9-NEXT: global_load_dwordx4 v[28:31], v28, s[34:35] offset:112
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i32 at abs32@lo
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8618,6 +8621,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v32, 0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x7
@@ -8629,7 +8633,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-NEXT: global_load_dwordx4 v[20:23], v32, s[34:35] offset:80
; GFX10-NEXT: global_load_dwordx4 v[24:27], v32, s[34:35] offset:96
; GFX10-NEXT: global_load_dwordx4 v[28:31], v32, s[34:35] offset:112
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8657,6 +8661,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v28, 0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x7
@@ -8668,7 +8673,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX11-NEXT: global_load_b128 v[20:23], v28, s[0:1] offset:80
; GFX11-NEXT: global_load_b128 v[24:27], v28, s[0:1] offset:96
; GFX11-NEXT: global_load_b128 v[28:31], v28, s[0:1] offset:112
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8697,6 +8701,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v32, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x7
@@ -8708,7 +8713,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8744,6 +8749,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX9-NEXT: v_mov_b32_e32 v28, 0
; GFX9-NEXT: global_load_dword v32, v[0:1], off
; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v28, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v28, s[34:35] offset:16
@@ -8754,7 +8760,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX9-NEXT: global_load_dwordx4 v[24:27], v28, s[34:35] offset:96
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: global_load_dwordx4 v[28:31], v28, s[34:35] offset:112
-; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i32_i32 at abs32@lo
; GFX9-NEXT: v_writelane_b32 v40, s31, 1
@@ -8784,6 +8789,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v32, 0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v33, v[0:1], off
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
@@ -8796,7 +8802,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-NEXT: global_load_dwordx4 v[20:23], v32, s[34:35] offset:80
; GFX10-NEXT: global_load_dwordx4 v[24:27], v32, s[34:35] offset:96
; GFX10-NEXT: global_load_dwordx4 v[28:31], v32, s[34:35] offset:112
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i32_i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8826,6 +8832,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v28, 0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v32, v[0:1], off
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
@@ -8838,7 +8845,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX11-NEXT: global_load_b128 v[20:23], v28, s[0:1] offset:80
; GFX11-NEXT: global_load_b128 v[24:27], v28, s[0:1] offset:96
; GFX11-NEXT: global_load_b128 v[28:31], v28, s[0:1] offset:112
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i32_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i32_i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8868,6 +8874,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v32, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v33, v[0:1], off
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
@@ -8880,7 +8887,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i32_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i32_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8953,14 +8960,14 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v40, v0
; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: s_mov_b32 s35, external_i32_func_i32 at abs32@hi
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_i32_func_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_mov_b32_e32 v41, v1
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
+; GFX10-NEXT: v_mov_b32_e32 v41, v1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: global_store_dword v[40:41], v0, off
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
@@ -8991,9 +8998,9 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-NEXT: scratch_store_b32 off, v41, s33
+; GFX11-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v41, v1 :: v_dual_mov_b32 v40, v0
; GFX11-NEXT: v_mov_b32_e32 v0, 42
-; GFX11-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_i32_func_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_i32_func_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -9027,14 +9034,14 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, v0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 42
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_i32_func_i32 at abs32@hi
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_i32_func_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, v1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
+; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, v1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: global_store_dword v[40:41], v0, off
; GFX10-SCRATCH-NEXT: s_waitcnt_vscnt null, 0x0
@@ -9071,12 +9078,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_ubyte v0, v2, s[34:35]
; GFX9-NEXT: global_load_dword v1, v2, s[34:35] offset:4
; GFX9-NEXT: s_mov_b32 s35, external_void_func_struct_i8_i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_struct_i8_i32 at abs32@lo
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -9101,12 +9108,13 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_ubyte v0, v2, s[34:35]
; GFX10-NEXT: global_load_dword v1, v2, s[34:35] offset:4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_struct_i8_i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -9134,8 +9142,8 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v1, s[0:1]
@@ -9167,12 +9175,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: global_load_u8 v0, v1, s[0:1]
; GFX11-FAKE16-NEXT: global_load_b32 v1, v1, s[0:1] offset:4
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_struct_i8_i32 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_struct_i8_i32 at abs32@lo
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
@@ -9201,12 +9209,13 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v2, s[0:1]
; GFX10-SCRATCH-NEXT: global_load_dword v1, v2, s[0:1] offset:4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_struct_i8_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_struct_i8_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -9237,8 +9246,8 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_mov_b32_e32 v0, 3
; GFX9-NEXT: v_writelane_b32 v40, s34, 2
+; GFX9-NEXT: v_mov_b32_e32 v0, 3
; GFX9-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX9-NEXT: v_mov_b32_e32 v0, 8
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -9272,9 +9281,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_byval_struct_i8_i32 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:4
; GFX10-NEXT: v_lshrrev_b32_e64 v0, 5, s33
@@ -9304,9 +9313,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 3
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b8 off, v0, s33
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v1, s33 offset:4
@@ -9336,9 +9345,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b8 off, v0, s33
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v1, s33 offset:4
@@ -9370,9 +9379,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s33
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v1, s33 offset:4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, s33
@@ -9408,10 +9417,10 @@ define amdgpu_gfx void @test_call_external_void_func_sret_struct_i8_i32_byval_st
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 3
; GFX9-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX9-NEXT: v_mov_b32_e32 v0, 8
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4
; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, s33
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -9449,19 +9458,19 @@ define amdgpu_gfx void @test_call_external_void_func_sret_struct_i8_i32_byval_st
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_sret_struct_i8_i32_byval_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_sret_struct_i8_i32_byval_struct_i8_i32 at abs32@lo
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:4
; GFX10-NEXT: v_lshrrev_b32_e64 v0, 5, s33
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_lshrrev_b32_e64 v1, 5, s33
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: v_add_nc_u32_e32 v0, 8, v0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-NEXT: v_add_nc_u32_e32 v0, 8, v0
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: buffer_load_ubyte v0, off, s[0:3], s33 offset:8
@@ -9685,8 +9694,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: global_load_dwordx4 v[0:3], v0, s[34:35]
@@ -9736,8 +9745,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: global_load_b128 v[0:3], v0, s[0:1]
@@ -9784,8 +9793,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v0, s[0:1]
@@ -10112,13 +10121,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_inreg at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
-; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-NEXT: v_readlane_b32 s30, v40, 0
@@ -10141,15 +10150,14 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_inreg at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
-; GFX11-NEXT: scratch_store_b8 off, v0, s32
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: scratch_store_b8 off, v0, s32
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
@@ -10171,13 +10179,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
-; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-SCRATCH-NEXT: v_readlane_b32 s30, v40, 0
@@ -10234,11 +10242,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10264,11 +10272,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i8_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i8_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_movk_i32 s4, 0x7b
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10295,11 +10303,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10359,11 +10367,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10389,11 +10397,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_movk_i32 s4, 0x7b
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10420,11 +10428,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10484,11 +10492,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 42
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10514,11 +10522,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 42
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10545,11 +10553,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 42
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10612,11 +10620,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i64_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -10645,11 +10653,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i64_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_movk_i32 s4, 0x7b
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -10679,11 +10687,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -10753,9 +10761,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -10790,9 +10798,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -10828,9 +10836,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -10909,11 +10917,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -10948,11 +10956,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -10988,11 +10996,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -11074,9 +11082,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 8
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -11117,9 +11125,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 8
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -11161,9 +11169,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 8
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -11260,9 +11268,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -11309,9 +11317,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -11359,9 +11367,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -11444,11 +11452,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_movk_i32 s4, 0x4400
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -11474,11 +11482,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_movk_i32 s4, 0x4400
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11505,11 +11513,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x4400
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11569,11 +11577,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 4.0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -11599,11 +11607,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 4.0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11630,11 +11638,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 4.0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11697,11 +11705,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1.0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -11730,11 +11738,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1.0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -11764,11 +11772,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -11837,11 +11845,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 5
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1.0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -11873,11 +11881,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 5
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1.0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -11910,11 +11918,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 5
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -11992,11 +12000,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 7
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5f32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1.0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12034,11 +12042,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 7
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5f32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1.0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12077,11 +12085,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 7
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12156,11 +12164,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f64_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0x40100000
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -12189,11 +12197,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f64_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0x40100000
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -12223,11 +12231,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0x40100000
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -12299,11 +12307,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f64_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12338,11 +12346,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f64_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12378,11 +12386,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12466,11 +12474,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 8
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f64_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12511,11 +12519,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 8
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f64_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12557,11 +12565,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 8
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12636,11 +12644,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dword s4, s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i16_inreg at abs32@lo
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -12666,11 +12674,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b32 s4, s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i16_inreg at abs32@lo
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -12697,11 +12705,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i16_inreg at abs32@lo
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -12764,8 +12772,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16_inreg at abs32@hi
@@ -12796,8 +12804,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
@@ -12829,8 +12837,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
@@ -12898,8 +12906,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16_inreg at abs32@hi
@@ -12930,8 +12938,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
@@ -12963,8 +12971,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
@@ -13033,11 +13041,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0x20001
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 3
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13066,11 +13074,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0x20001
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 3
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13100,11 +13108,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 3
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13170,11 +13178,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0x40003c00
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_movk_i32 s5, 0x4400
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13203,11 +13211,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0x40003c00
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_movk_i32 s5, 0x4400
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13237,11 +13245,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x40003c00
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_movk_i32 s5, 0x4400
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13306,8 +13314,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16_inreg at abs32@hi
@@ -13338,8 +13346,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
@@ -13371,8 +13379,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
@@ -13441,11 +13449,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 0x20001
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0x40003
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13474,11 +13482,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 0x20001
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0x40003
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13508,11 +13516,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0x40003
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13575,11 +13583,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dword s4, s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f16_inreg at abs32@lo
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -13605,11 +13613,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b32 s4, s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f16_inreg at abs32@lo
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -13636,11 +13644,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f16_inreg at abs32@lo
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -13703,8 +13711,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32_inreg at abs32@hi
@@ -13735,8 +13743,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
@@ -13768,8 +13776,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
@@ -13838,11 +13846,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13871,11 +13879,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13905,11 +13913,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13978,11 +13986,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 5
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 3
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 4
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14014,11 +14022,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 5
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 3
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 4
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14051,11 +14059,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 5
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 4
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14130,11 +14138,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 3
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 4
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14169,11 +14177,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 3
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 4
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14209,11 +14217,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 4
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14288,8 +14296,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -14324,8 +14332,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -14361,8 +14369,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -14441,11 +14449,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14480,11 +14488,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14520,11 +14528,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14605,11 +14613,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 7
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14647,11 +14655,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 7
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14690,11 +14698,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 7
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14782,9 +14790,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -14828,9 +14836,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -14875,9 +14883,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -14978,11 +14986,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i32_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -15029,11 +15037,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i32_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, 1
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -15081,11 +15089,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -15198,9 +15206,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 18
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -15260,9 +15268,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 18
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -15323,9 +15331,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 18
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -15497,9 +15505,9 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 28
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -15604,11 +15612,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 28
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -15707,10 +15715,10 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 28
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -15928,9 +15936,9 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 28
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -16040,11 +16048,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 28
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s3, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -16147,10 +16155,10 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 28
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_add_i32 s3, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -16263,9 +16271,9 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s33 offset:4
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, stack_passed_f64_arg at abs32@hi
@@ -16296,10 +16304,11 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GFX10-NEXT: buffer_load_dword v33, off, s[0:3], s33 offset:4
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, stack_passed_f64_arg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, stack_passed_f64_arg at abs32@lo
@@ -16307,7 +16316,6 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-NEXT: buffer_store_dword v32, off, s[0:3], s32
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -16330,12 +16338,12 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:8 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: scratch_load_b64 v[32:33], off, s33
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: scratch_load_b64 v[32:33], off, s33
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, stack_passed_f64_arg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, stack_passed_f64_arg at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: scratch_store_b64 off, v[32:33], s32
@@ -16360,12 +16368,12 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: scratch_load_dwordx2 v[32:33], off, s33
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: scratch_load_dwordx2 v[32:33], off, s33
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, stack_passed_f64_arg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, stack_passed_f64_arg at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: scratch_store_dwordx2 off, v[32:33], s32
@@ -16395,13 +16403,13 @@ define amdgpu_gfx void @stack_12xv3i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 12
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: v_mov_b32_e32 v0, 14
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -16657,6 +16665,7 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 8
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -16671,7 +16680,6 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:20
; GFX9-NEXT: v_mov_b32_e32 v0, 14
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -16732,18 +16740,18 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 8
; GFX10-NEXT: v_mov_b32_e32 v1, 9
; GFX10-NEXT: v_mov_b32_e32 v2, 10
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_mov_b32_e32 v3, 14
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
; GFX10-NEXT: v_mov_b32_e32 v0, 11
; GFX10-NEXT: v_mov_b32_e32 v1, 12
; GFX10-NEXT: v_mov_b32_e32 v2, 13
-; GFX10-NEXT: v_mov_b32_e32 v3, 14
; GFX10-NEXT: v_mov_b32_e32 v4, 15
; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
@@ -16941,6 +16949,7 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41000000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -16955,7 +16964,6 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:20
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -17016,18 +17024,18 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0x41000000
; GFX10-NEXT: v_mov_b32_e32 v1, 0x41100000
; GFX10-NEXT: v_mov_b32_e32 v2, 0x41200000
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_mov_b32_e32 v3, 0x41600000
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
; GFX10-NEXT: v_mov_b32_e32 v0, 0x41300000
; GFX10-NEXT: v_mov_b32_e32 v1, 0x41400000
; GFX10-NEXT: v_mov_b32_e32 v2, 0x41500000
-; GFX10-NEXT: v_mov_b32_e32 v3, 0x41600000
; GFX10-NEXT: v_mov_b32_e32 v4, 0x41700000
; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
@@ -17258,10 +17266,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17285,10 +17293,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17313,10 +17321,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17372,10 +17380,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v1bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v1bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17399,10 +17407,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17427,10 +17435,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17486,10 +17494,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17513,10 +17521,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17541,10 +17549,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17600,10 +17608,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17627,10 +17635,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17655,10 +17663,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17714,10 +17722,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17741,10 +17749,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17769,10 +17777,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17828,10 +17836,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17855,10 +17863,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17883,10 +17891,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17942,10 +17950,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17969,10 +17977,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17997,10 +18005,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18056,10 +18064,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18083,10 +18091,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18111,10 +18119,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18170,10 +18178,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v1bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v1bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18197,10 +18205,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18225,10 +18233,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18284,10 +18292,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18311,10 +18319,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18339,10 +18347,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18398,10 +18406,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18425,10 +18433,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18453,10 +18461,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18512,10 +18520,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18539,10 +18547,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18567,10 +18575,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18626,10 +18634,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18653,10 +18661,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18681,10 +18689,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18740,10 +18748,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18767,10 +18775,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18795,10 +18803,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
index 124de7e00f020..77c34b69820ce 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
@@ -49,9 +49,9 @@ define amdgpu_gfx void @test_call_external_void_func_void_clobber_s30_s31_call_e
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, external_void_func_void at abs32@lo
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, external_void_func_void at abs32@hi
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -83,9 +83,9 @@ define amdgpu_gfx void @test_call_external_void_func_void_clobber_s30_s31_call_e
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, external_void_func_void at abs32@lo
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, external_void_func_void at abs32@hi
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -246,10 +246,10 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_s31(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: ;;#ASMSTART
@@ -283,10 +283,10 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_s31(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: ;;#ASMSTART
@@ -362,16 +362,16 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_v31(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 2
+; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s30, 0
+; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def v31
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: v_mov_b32_e32 v40, v31
-; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_mov_b32_e32 v31, v40
; GFX10-NEXT: ;;#ASMSTART
@@ -399,18 +399,18 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_v31(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 2
+; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s30, 0
+; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def v31
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: v_mov_b32_e32 v40, v31
-; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_mov_b32_e32 v31, v40
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; use v31
@@ -480,15 +480,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s33(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s33
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
-; GFX10-NEXT: s_mov_b32 s4, s33
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
+; GFX10-NEXT: s_mov_b32 s4, s33
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_mov_b32 s33, s4
@@ -517,15 +517,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s33(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s33
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
-; GFX11-NEXT: s_mov_b32 s4, s33
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: s_mov_b32 s4, s33
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_mov_b32 s33, s4
@@ -597,15 +597,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s34(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s34
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
-; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, s34
+; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_mov_b32 s34, s4
@@ -634,15 +634,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s34(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s34
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
-; GFX11-NEXT: s_mov_b32 s4, s34
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: s_mov_b32 s4, s34
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_mov_b32 s34, s4
@@ -712,15 +712,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_v40(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 2
+; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s30, 0
+; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def v40
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; use v40
@@ -747,15 +747,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_v40(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 2
+; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s30, 0
+; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def v40
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; use v40
@@ -870,10 +870,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s33() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, void_func_void_clobber_s33 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, void_func_void_clobber_s33 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -897,10 +897,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s33() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, void_func_void_clobber_s33 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, void_func_void_clobber_s33 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -955,10 +955,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s34() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, void_func_void_clobber_s34 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, void_func_void_clobber_s34 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -982,10 +982,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s34() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, void_func_void_clobber_s34 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, void_func_void_clobber_s34 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1049,15 +1049,15 @@ define amdgpu_gfx void @callee_saved_sgpr_kernel() #1 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s40
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
-; GFX10-NEXT: s_mov_b32 s4, s40
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
+; GFX10-NEXT: s_mov_b32 s4, s40
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
@@ -1085,15 +1085,15 @@ define amdgpu_gfx void @callee_saved_sgpr_kernel() #1 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s40
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
-; GFX11-NEXT: s_mov_b32 s4, s40
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: s_mov_b32 s4, s40
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
@@ -1172,11 +1172,12 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 3
+; GFX10-NEXT: v_writelane_b32 v41, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s4, 0
+; GFX10-NEXT: v_writelane_b32 v41, s30, 1
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s40
; GFX10-NEXT: ;;#ASMEND
@@ -1185,7 +1186,6 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX10-NEXT: ; def v32
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: v_mov_b32_e32 v40, v32
-; GFX10-NEXT: v_writelane_b32 v41, s30, 1
; GFX10-NEXT: v_writelane_b32 v41, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
@@ -1217,11 +1217,12 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 3
+; GFX11-NEXT: v_writelane_b32 v41, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s4, 0
+; GFX11-NEXT: v_writelane_b32 v41, s30, 1
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s40
; GFX11-NEXT: ;;#ASMEND
@@ -1230,7 +1231,6 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX11-NEXT: ; def v32
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: v_mov_b32_e32 v40, v32
-; GFX11-NEXT: v_writelane_b32 v41, s30, 1
; GFX11-NEXT: v_writelane_b32 v41, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
diff --git a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
index 58cd2f5bc11af..5a344c8ee37f9 100644
--- a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
@@ -9,26 +9,237 @@ define fastcc i32 @foo() {
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: $sgpr16 = S_MOV_B32 $sgpr33
; CHECK-NEXT: $sgpr33 = S_MOV_B32 $sgpr32
; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr17
- ; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr33, $vgpr40, 2, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
+ ; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
; CHECK-NEXT: BUNDLE implicit-def $sgpr16_sgpr17, implicit-def $sgpr16, implicit-def $scc, implicit-def $sgpr17 {
; CHECK-NEXT: $sgpr16_sgpr17 = S_GETPC_B64
; CHECK-NEXT: $sgpr16 = S_ADD_U32 internal $sgpr16, target-flags(amdgpu-gotprel32-lo) @bar + 4, implicit-def $scc
; CHECK-NEXT: $sgpr17 = S_ADDC_U32 internal $sgpr17, target-flags(amdgpu-gotprel32-hi) @bar + 12, implicit-def $scc, implicit internal $scc
; CHECK-NEXT: }
+ ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr40
+ ; CHECK-NEXT: renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM killed renamable $sgpr16_sgpr17, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
+ ; CHECK-NEXT: S_WAITCNT 49279
; CHECK-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
; CHECK-NEXT: BUFFER_GL1_INV implicit $exec
; CHECK-NEXT: BUFFER_GL0_INV implicit $exec
- ; CHECK-NEXT: renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM killed renamable $sgpr16_sgpr17, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
- ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr40
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr40
- ; CHECK-NEXT: S_WAITCNT 49279
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; CHECK-NEXT: $vcc_lo = S_MOV_B32 $exec_lo
; CHECK-NEXT: {{ $}}
@@ -46,6 +257,7 @@ define fastcc i32 @foo() {
; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr5
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = S_MOV_B32 killed $sgpr4
; CHECK-NEXT: S_WAITCNT 16240
; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit undef $vgpr0
diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
index a244a433a4efb..55f21d95bcac4 100644
--- a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
+++ b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
@@ -280,8 +280,217 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; CHECK-NEXT: $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 0
; CHECK-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; CHECK-NEXT: $vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr30, 0, $vgpr40
; CHECK-NEXT: $vgpr40 = SI_SPILL_S32_TO_VGPR $sgpr31, 1, $vgpr40
diff --git a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
index 5f0ca7bc42ae0..db80f5479d36b 100644
--- a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
@@ -109,15 +109,15 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MUBUF-NEXT: s_mov_b32 s5, s33
; MUBUF-NEXT: s_add_i32 s33, s32, 0x7ffc0
+; MUBUF-NEXT: s_mov_b32 s6, s34
; MUBUF-NEXT: s_and_b32 s33, s33, 0xfff80000
+; MUBUF-NEXT: s_mov_b32 s34, s32
; MUBUF-NEXT: v_lshrrev_b32_e64 v3, 6, s33
; MUBUF-NEXT: v_add_u32_e32 v3, 0x3000, v3
-; MUBUF-NEXT: s_mov_b32 s6, s34
; MUBUF-NEXT: v_add_u32_e32 v2, 64, v3
; MUBUF-NEXT: v_mov_b32_e32 v3, 0
; MUBUF-NEXT: v_mov_b32_e32 v4, 0x2000
; MUBUF-NEXT: s_mov_b32 s4, 0
-; MUBUF-NEXT: s_mov_b32 s34, s32
; MUBUF-NEXT: s_add_i32 s32, s32, 0x200000
; MUBUF-NEXT: buffer_store_dword v3, v4, s[0:3], s33 offen
; MUBUF-NEXT: s_waitcnt vmcnt(0)
@@ -145,11 +145,11 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; MUBUF-NEXT: s_waitcnt vmcnt(0)
; MUBUF-NEXT: s_mov_b32 s32, s34
; MUBUF-NEXT: s_mov_b32 s34, s6
-; MUBUF-NEXT: s_mov_b32 s33, s5
; MUBUF-NEXT: v_add_co_u32_e32 v2, vcc, v4, v6
; MUBUF-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v7, vcc
; MUBUF-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; MUBUF-NEXT: s_waitcnt vmcnt(0)
+; MUBUF-NEXT: s_mov_b32 s33, s5
; MUBUF-NEXT: s_setpc_b64 s[30:31]
;
; FLATSCR-LABEL: func_local_stack_offset_uses_sp:
@@ -157,8 +157,8 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s2, s33
; FLATSCR-NEXT: s_add_i32 s33, s32, 0x1fff
-; FLATSCR-NEXT: s_and_b32 s33, s33, 0xffffe000
; FLATSCR-NEXT: s_mov_b32 s3, s34
+; FLATSCR-NEXT: s_and_b32 s33, s33, 0xffffe000
; FLATSCR-NEXT: s_mov_b32 s34, s32
; FLATSCR-NEXT: s_add_i32 s32, s32, 0x8000
; FLATSCR-NEXT: v_mov_b32_e32 v2, 0
@@ -186,11 +186,11 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; FLATSCR-NEXT: s_waitcnt vmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s32, s34
; FLATSCR-NEXT: s_mov_b32 s34, s3
-; FLATSCR-NEXT: s_mov_b32 s33, s2
; FLATSCR-NEXT: v_add_co_u32_e32 v2, vcc, v2, v4
; FLATSCR-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v5, vcc
; FLATSCR-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; FLATSCR-NEXT: s_waitcnt vmcnt(0)
+; FLATSCR-NEXT: s_mov_b32 s33, s2
; FLATSCR-NEXT: s_setpc_b64 s[30:31]
entry:
%pin.low = alloca i32, align 8192, addrspace(5)
diff --git a/llvm/test/CodeGen/AMDGPU/nested-calls.ll b/llvm/test/CodeGen/AMDGPU/nested-calls.ll
index ccaf0ac5377e4..94e997cf49ddb 100644
--- a/llvm/test/CodeGen/AMDGPU/nested-calls.ll
+++ b/llvm/test/CodeGen/AMDGPU/nested-calls.ll
@@ -18,8 +18,8 @@ define void @test_func_call_external_void_func_i32_imm() #0 {
; GCN-NEXT: s_or_saveexec_b64 s[18:19], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[18:19]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s16, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, external_void_func_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, external_void_func_i32 at gotpcrel32@hi+12
@@ -52,8 +52,8 @@ define void @test_func_call_external_void_func_i32_imm_stack_use() #0 {
; GCN-NEXT: s_or_saveexec_b64 s[18:19], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[18:19]
-; GCN-NEXT: s_addk_i32 s32, 0x1400
; GCN-NEXT: v_writelane_b32 v40, s16, 2
+; GCN-NEXT: s_addk_i32 s32, 0x1400
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, external_void_func_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, external_void_func_i32 at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll b/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
index e6243f0e41826..7155c8e085470 100644
--- a/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
+++ b/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
@@ -12,13 +12,224 @@ define hidden void @_ZL3barv() #0 !dbg !1644 {
; CHECK-NEXT: .cfi_sections .debug_frame
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0: ; %entry
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 2565
+; CHECK-NEXT: .cfi_undefined 2566
+; CHECK-NEXT: .cfi_undefined 2567
+; CHECK-NEXT: .cfi_undefined 2568
+; CHECK-NEXT: .cfi_undefined 2569
+; CHECK-NEXT: .cfi_undefined 2570
+; CHECK-NEXT: .cfi_undefined 2571
+; CHECK-NEXT: .cfi_undefined 2572
+; CHECK-NEXT: .cfi_undefined 2573
+; CHECK-NEXT: .cfi_undefined 2574
+; CHECK-NEXT: .cfi_undefined 2575
+; CHECK-NEXT: .cfi_undefined 2576
+; CHECK-NEXT: .cfi_undefined 2577
+; CHECK-NEXT: .cfi_undefined 2578
+; CHECK-NEXT: .cfi_undefined 2579
+; CHECK-NEXT: .cfi_undefined 2580
+; CHECK-NEXT: .cfi_undefined 2581
+; CHECK-NEXT: .cfi_undefined 2582
+; CHECK-NEXT: .cfi_undefined 2583
+; CHECK-NEXT: .cfi_undefined 2584
+; CHECK-NEXT: .cfi_undefined 2585
+; CHECK-NEXT: .cfi_undefined 2586
+; CHECK-NEXT: .cfi_undefined 2587
+; CHECK-NEXT: .cfi_undefined 2588
+; CHECK-NEXT: .cfi_undefined 2589
+; CHECK-NEXT: .cfi_undefined 2590
+; CHECK-NEXT: .cfi_undefined 2591
+; CHECK-NEXT: .cfi_undefined 2592
+; CHECK-NEXT: .cfi_undefined 2593
+; CHECK-NEXT: .cfi_undefined 2594
+; CHECK-NEXT: .cfi_undefined 2595
+; CHECK-NEXT: .cfi_undefined 2596
+; CHECK-NEXT: .cfi_undefined 2597
+; CHECK-NEXT: .cfi_undefined 2598
+; CHECK-NEXT: .cfi_undefined 2599
+; CHECK-NEXT: .cfi_undefined 2608
+; CHECK-NEXT: .cfi_undefined 2609
+; CHECK-NEXT: .cfi_undefined 2610
+; CHECK-NEXT: .cfi_undefined 2611
+; CHECK-NEXT: .cfi_undefined 2612
+; CHECK-NEXT: .cfi_undefined 2613
+; CHECK-NEXT: .cfi_undefined 2614
+; CHECK-NEXT: .cfi_undefined 2615
+; CHECK-NEXT: .cfi_undefined 2624
+; CHECK-NEXT: .cfi_undefined 2625
+; CHECK-NEXT: .cfi_undefined 2626
+; CHECK-NEXT: .cfi_undefined 2627
+; CHECK-NEXT: .cfi_undefined 2628
+; CHECK-NEXT: .cfi_undefined 2629
+; CHECK-NEXT: .cfi_undefined 2630
+; CHECK-NEXT: .cfi_undefined 2631
+; CHECK-NEXT: .cfi_undefined 2640
+; CHECK-NEXT: .cfi_undefined 2641
+; CHECK-NEXT: .cfi_undefined 2642
+; CHECK-NEXT: .cfi_undefined 2643
+; CHECK-NEXT: .cfi_undefined 2644
+; CHECK-NEXT: .cfi_undefined 2645
+; CHECK-NEXT: .cfi_undefined 2646
+; CHECK-NEXT: .cfi_undefined 2647
+; CHECK-NEXT: .cfi_undefined 2656
+; CHECK-NEXT: .cfi_undefined 2657
+; CHECK-NEXT: .cfi_undefined 2658
+; CHECK-NEXT: .cfi_undefined 2659
+; CHECK-NEXT: .cfi_undefined 2660
+; CHECK-NEXT: .cfi_undefined 2661
+; CHECK-NEXT: .cfi_undefined 2662
+; CHECK-NEXT: .cfi_undefined 2663
+; CHECK-NEXT: .cfi_undefined 2672
+; CHECK-NEXT: .cfi_undefined 2673
+; CHECK-NEXT: .cfi_undefined 2674
+; CHECK-NEXT: .cfi_undefined 2675
+; CHECK-NEXT: .cfi_undefined 2676
+; CHECK-NEXT: .cfi_undefined 2677
+; CHECK-NEXT: .cfi_undefined 2678
+; CHECK-NEXT: .cfi_undefined 2679
+; CHECK-NEXT: .cfi_undefined 2688
+; CHECK-NEXT: .cfi_undefined 2689
+; CHECK-NEXT: .cfi_undefined 2690
+; CHECK-NEXT: .cfi_undefined 2691
+; CHECK-NEXT: .cfi_undefined 2692
+; CHECK-NEXT: .cfi_undefined 2693
+; CHECK-NEXT: .cfi_undefined 2694
+; CHECK-NEXT: .cfi_undefined 2695
+; CHECK-NEXT: .cfi_undefined 2704
+; CHECK-NEXT: .cfi_undefined 2705
+; CHECK-NEXT: .cfi_undefined 2706
+; CHECK-NEXT: .cfi_undefined 2707
+; CHECK-NEXT: .cfi_undefined 2708
+; CHECK-NEXT: .cfi_undefined 2709
+; CHECK-NEXT: .cfi_undefined 2710
+; CHECK-NEXT: .cfi_undefined 2711
+; CHECK-NEXT: .cfi_undefined 2720
+; CHECK-NEXT: .cfi_undefined 2721
+; CHECK-NEXT: .cfi_undefined 2722
+; CHECK-NEXT: .cfi_undefined 2723
+; CHECK-NEXT: .cfi_undefined 2724
+; CHECK-NEXT: .cfi_undefined 2725
+; CHECK-NEXT: .cfi_undefined 2726
+; CHECK-NEXT: .cfi_undefined 2727
+; CHECK-NEXT: .cfi_undefined 2736
+; CHECK-NEXT: .cfi_undefined 2737
+; CHECK-NEXT: .cfi_undefined 2738
+; CHECK-NEXT: .cfi_undefined 2739
+; CHECK-NEXT: .cfi_undefined 2740
+; CHECK-NEXT: .cfi_undefined 2741
+; CHECK-NEXT: .cfi_undefined 2742
+; CHECK-NEXT: .cfi_undefined 2743
+; CHECK-NEXT: .cfi_undefined 2752
+; CHECK-NEXT: .cfi_undefined 2753
+; CHECK-NEXT: .cfi_undefined 2754
+; CHECK-NEXT: .cfi_undefined 2755
+; CHECK-NEXT: .cfi_undefined 2756
+; CHECK-NEXT: .cfi_undefined 2757
+; CHECK-NEXT: .cfi_undefined 2758
+; CHECK-NEXT: .cfi_undefined 2759
+; CHECK-NEXT: .cfi_undefined 2768
+; CHECK-NEXT: .cfi_undefined 2769
+; CHECK-NEXT: .cfi_undefined 2770
+; CHECK-NEXT: .cfi_undefined 2771
+; CHECK-NEXT: .cfi_undefined 2772
+; CHECK-NEXT: .cfi_undefined 2773
+; CHECK-NEXT: .cfi_undefined 2774
+; CHECK-NEXT: .cfi_undefined 2775
+; CHECK-NEXT: .cfi_undefined 2784
+; CHECK-NEXT: .cfi_undefined 2785
+; CHECK-NEXT: .cfi_undefined 2786
+; CHECK-NEXT: .cfi_undefined 2787
+; CHECK-NEXT: .cfi_undefined 2788
+; CHECK-NEXT: .cfi_undefined 2789
+; CHECK-NEXT: .cfi_undefined 2790
+; CHECK-NEXT: .cfi_undefined 2791
+; CHECK-NEXT: .cfi_undefined 2800
+; CHECK-NEXT: .cfi_undefined 2801
+; CHECK-NEXT: .cfi_undefined 2802
+; CHECK-NEXT: .cfi_undefined 2803
+; CHECK-NEXT: .cfi_undefined 2804
+; CHECK-NEXT: .cfi_undefined 2805
+; CHECK-NEXT: .cfi_undefined 2806
+; CHECK-NEXT: .cfi_undefined 2807
+; CHECK-NEXT: .cfi_undefined 32
+; CHECK-NEXT: .cfi_undefined 33
+; CHECK-NEXT: .cfi_undefined 34
+; CHECK-NEXT: .cfi_undefined 35
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
+; CHECK-NEXT: .cfi_undefined 38
+; CHECK-NEXT: .cfi_undefined 39
+; CHECK-NEXT: .cfi_undefined 40
+; CHECK-NEXT: .cfi_undefined 41
+; CHECK-NEXT: .cfi_undefined 42
+; CHECK-NEXT: .cfi_undefined 43
+; CHECK-NEXT: .cfi_undefined 44
+; CHECK-NEXT: .cfi_undefined 45
+; CHECK-NEXT: .cfi_undefined 46
+; CHECK-NEXT: .cfi_undefined 47
+; CHECK-NEXT: .cfi_undefined 48
+; CHECK-NEXT: .cfi_undefined 49
+; CHECK-NEXT: .cfi_undefined 50
+; CHECK-NEXT: .cfi_undefined 51
+; CHECK-NEXT: .cfi_undefined 52
+; CHECK-NEXT: .cfi_undefined 53
+; CHECK-NEXT: .cfi_undefined 54
+; CHECK-NEXT: .cfi_undefined 55
+; CHECK-NEXT: .cfi_undefined 56
+; CHECK-NEXT: .cfi_undefined 57
+; CHECK-NEXT: .cfi_undefined 58
+; CHECK-NEXT: .cfi_undefined 59
+; CHECK-NEXT: .cfi_undefined 60
+; CHECK-NEXT: .cfi_undefined 61
+; CHECK-NEXT: .cfi_undefined 72
+; CHECK-NEXT: .cfi_undefined 73
+; CHECK-NEXT: .cfi_undefined 74
+; CHECK-NEXT: .cfi_undefined 75
+; CHECK-NEXT: .cfi_undefined 76
+; CHECK-NEXT: .cfi_undefined 77
+; CHECK-NEXT: .cfi_undefined 78
+; CHECK-NEXT: .cfi_undefined 79
+; CHECK-NEXT: .cfi_undefined 88
+; CHECK-NEXT: .cfi_undefined 89
+; CHECK-NEXT: .cfi_undefined 90
+; CHECK-NEXT: .cfi_undefined 91
+; CHECK-NEXT: .cfi_undefined 92
+; CHECK-NEXT: .cfi_undefined 93
+; CHECK-NEXT: .cfi_undefined 94
+; CHECK-NEXT: .cfi_undefined 95
+; CHECK-NEXT: .cfi_undefined 1096
+; CHECK-NEXT: .cfi_undefined 1097
+; CHECK-NEXT: .cfi_undefined 1098
+; CHECK-NEXT: .cfi_undefined 1099
+; CHECK-NEXT: .cfi_undefined 1100
+; CHECK-NEXT: .cfi_undefined 1101
+; CHECK-NEXT: .cfi_undefined 1102
+; CHECK-NEXT: .cfi_undefined 1103
+; CHECK-NEXT: .cfi_undefined 1112
+; CHECK-NEXT: .cfi_undefined 1113
+; CHECK-NEXT: .cfi_undefined 1114
+; CHECK-NEXT: .cfi_undefined 1115
+; CHECK-NEXT: .cfi_undefined 1116
+; CHECK-NEXT: .cfi_undefined 1117
+; CHECK-NEXT: .cfi_undefined 1118
+; CHECK-NEXT: .cfi_undefined 1119
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s16, s33
; CHECK-NEXT: s_mov_b32 s33, s32
; CHECK-NEXT: s_or_saveexec_b64 s[18:19], -1
; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; CHECK-NEXT: .cfi_offset 2600, 0
; CHECK-NEXT: s_mov_b64 exec, s[18:19]
; CHECK-NEXT: v_writelane_b32 v40, s16, 2
+; CHECK-NEXT: .cfi_llvm_vector_registers 65, 2600, 2, 32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: s_add_i32 s32, s32, 0x400
; CHECK-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-NEXT: v_writelane_b32 v40, s31, 1
@@ -43,6 +254,7 @@ define hidden void @_ZL3barv() #0 !dbg !1644 {
; CHECK-NEXT: s_or_saveexec_b64 s[6:7], -1
; CHECK-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
; CHECK-NEXT: s_mov_b64 exec, s[6:7]
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s4
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll b/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
index c1f52173c7451..a2c86bd09404a 100644
--- a/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
+++ b/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
@@ -215,8 +215,8 @@ define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i3
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MUBUF-NEXT: s_mov_b32 s7, s33
-; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_mov_b32 s33, s32
+; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_addk_i32 s32, 0x400
; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc
; MUBUF-NEXT: s_cbranch_execz .LBB2_3
@@ -250,8 +250,8 @@ define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i3
; FLATSCR: ; %bb.0: ; %entry
; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s3, s33
-; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_mov_b32 s33, s32
+; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc
; FLATSCR-NEXT: s_cbranch_execz .LBB2_3
@@ -313,9 +313,9 @@ define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i
; MUBUF-NEXT: s_mov_b32 s7, s33
; MUBUF-NEXT: s_add_i32 s33, s32, 0xfc0
; MUBUF-NEXT: s_mov_b32 s8, s34
-; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_and_b32 s33, s33, 0xfffff000
; MUBUF-NEXT: s_mov_b32 s34, s32
+; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_addk_i32 s32, 0x2000
; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc
; MUBUF-NEXT: s_cbranch_execz .LBB3_2
@@ -350,9 +350,9 @@ define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i
; FLATSCR-NEXT: s_mov_b32 s3, s33
; FLATSCR-NEXT: s_add_i32 s33, s32, 63
; FLATSCR-NEXT: s_mov_b32 s4, s34
-; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_andn2_b32 s33, s33, 63
; FLATSCR-NEXT: s_mov_b32 s34, s32
+; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_addk_i32 s32, 0x80
; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc
; FLATSCR-NEXT: s_cbranch_execz .LBB3_2
diff --git a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
index bb248fe0444db..c61241c65b326 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
@@ -36,6 +36,114 @@ body: |
; GCN-LABEL: name: preserve_active_lanes_above_args
; GCN: liveins: $sgpr0, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: SCRATCH_STORE_DWORD_ST killed $vgpr10, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; GCN-NEXT: renamable $vgpr10 = V_MOV_B32_e32 10, implicit $exec
; GCN-NEXT: $vgpr8 = COPY killed renamable $vgpr10
@@ -69,8 +177,125 @@ body: |
; GCN-LABEL: name: preserve_all_lanes_wwm_above_args
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr10, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr10, 0
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr10 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr10
@@ -112,6 +337,122 @@ body: |
; GCN-LABEL: name: dont_preserve_args
; GCN: liveins: $sgpr0, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
@@ -143,8 +484,125 @@ body: |
; GCN-LABEL: name: preserve_inactive_lanes_wwm_args
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr9, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr9, 0
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
@@ -186,6 +644,17 @@ body: |
; GCN-LABEL: name: dont_preserve_if_no_chain_calls
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
@@ -222,6 +691,116 @@ body: |
; GCN-LABEL: name: dont_preserve_v0_v7
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
@@ -260,6 +839,114 @@ body: |
; GCN-LABEL: name: dont_preserve_sgpr
; GCN: liveins: $sgpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
; GCN-NEXT: $sgpr0 = COPY killed renamable $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
index 4aea915936ffc..b4f4412373509 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
@@ -37,9 +37,127 @@ body: |
; GCN-LABEL: name: preserve_inactive_wwm
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr8, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr8, 0
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr9, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr9, 128
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
@@ -73,6 +191,18 @@ body: |
; GCN-LABEL: name: dont_preserve_wwm_if_no_chain_calls
; GCN: liveins: $sgpr35, $vgpr8
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
@@ -106,6 +236,114 @@ body: |
; GCN-LABEL: name: dont_preserve_wwm_if_init_whole_wave
; GCN: liveins: $sgpr0, $sgpr35
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr1
@@ -131,6 +369,116 @@ body: |
; GCN-LABEL: name: dont_preserve_non_wwm
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr16
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $vgpr16 = V_MOV_B32_e32 16, implicit $exec
; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 8, implicit $exec
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
@@ -162,6 +510,118 @@ body: |
; GCN-LABEL: name: dont_preserve_v0_v7
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr7, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
@@ -200,6 +660,114 @@ body: |
; GCN-LABEL: name: dont_preserve_sgpr
; GCN: liveins: $sgpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
; GCN-NEXT: $sgpr0 = COPY killed renamable $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir b/llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
index 4b4e9f1d81ec6..fa52c2f2bba71 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
@@ -20,7 +20,10 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v1
- ; MUBUF: $vgpr0 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-NEXT: S_ENDPGM 0
@@ -28,13 +31,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v1
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v1
- ; FLATSCR: $vgpr0 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -42,13 +52,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v1
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v1
- ; MUBUF-GFX90A: $vgpr0 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: S_ENDPGM 0
@@ -56,13 +73,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v1
; MUBUF-GFX90A-V2A: liveins: $agpr0
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v1
- ; FLATSCR-GFX90A: $vgpr0 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -70,6 +94,10 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v1
; FLATSCR-GFX90A-V2A: liveins: $agpr0
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
@@ -93,7 +121,11 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v2
- ; MUBUF: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -103,6 +135,12 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v2
; MUBUF-V2A: liveins: $agpr0, $agpr1
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -111,7 +149,11 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v2
- ; FLATSCR: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -119,6 +161,12 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v2
; FLATSCR-V2A: liveins: $agpr0, $agpr1
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -127,7 +175,11 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v2
- ; MUBUF-GFX90A: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -137,6 +189,12 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v2
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -145,7 +203,11 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v2
- ; FLATSCR-GFX90A: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -153,6 +215,12 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v2
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -178,7 +246,12 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v3
- ; MUBUF: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -190,6 +263,14 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v3
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; MUBUF-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -200,7 +281,12 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v3
- ; FLATSCR: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -208,6 +294,14 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v3
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2
@@ -218,7 +312,12 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v3
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -230,6 +329,14 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v3
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; MUBUF-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -240,7 +347,12 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v3
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -248,6 +360,14 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v3
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2
@@ -275,7 +395,13 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v4
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -289,6 +415,16 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v4
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -301,7 +437,13 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v4
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -309,6 +451,16 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v4
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -321,7 +473,13 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v4
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -335,6 +493,16 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v4
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; MUBUF-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -347,7 +515,13 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v4
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -355,6 +529,16 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v4
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -384,7 +568,14 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v5
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -400,6 +591,18 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v5
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; MUBUF-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -414,7 +617,14 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v5
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -424,6 +634,18 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v5
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -438,7 +660,14 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v5
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -454,6 +683,18 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v5
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; MUBUF-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -468,7 +709,14 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v5
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -478,6 +726,18 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v5
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -509,7 +769,15 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v6
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -527,6 +795,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v6
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -543,7 +825,15 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v6
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr4_vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -553,6 +843,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v6
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -569,7 +873,15 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v6
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -587,6 +899,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v6
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; MUBUF-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -603,7 +929,15 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v6
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr4_vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -613,6 +947,20 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v6
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -646,7 +994,16 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v7
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -666,6 +1023,22 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v7
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
; MUBUF-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -684,7 +1057,16 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v7
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr4_vgpr5_vgpr6, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s96) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -694,6 +1076,22 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v7
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
; FLATSCR-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
@@ -712,7 +1110,16 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v7
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -732,6 +1139,22 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v7
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
; MUBUF-GFX90A-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -750,7 +1173,16 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v7
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr4_vgpr5_vgpr6, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (store (s96) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -760,6 +1192,22 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v7
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
; FLATSCR-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6
@@ -795,7 +1243,17 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v8
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -817,6 +1275,24 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v8
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; MUBUF-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -837,7 +1313,17 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v8
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -847,6 +1333,24 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v8
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; FLATSCR-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -867,7 +1371,17 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v8
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -889,6 +1403,24 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v8
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; MUBUF-GFX90A-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -909,7 +1441,17 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v8
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -919,6 +1461,24 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v8
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; FLATSCR-GFX90A-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -956,7 +1516,25 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v16
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -994,6 +1572,40 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v16
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; MUBUF-V2A-NEXT: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1030,7 +1642,25 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v16
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1044,6 +1674,40 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v16
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; FLATSCR-V2A-NEXT: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
@@ -1080,7 +1744,25 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v16
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1118,6 +1800,40 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v16
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; MUBUF-GFX90A-V2A-NEXT: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1154,7 +1870,25 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v16
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1168,6 +1902,40 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v16
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; FLATSCR-GFX90A-V2A-NEXT: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
@@ -1221,7 +1989,41 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_v32
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1291,6 +2093,72 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_v32
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; MUBUF-V2A-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1359,7 +2227,41 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_v32
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1381,6 +2283,72 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_v32
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; FLATSCR-V2A-NEXT: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -1449,7 +2417,41 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_v32
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1519,6 +2521,72 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_v32
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; MUBUF-GFX90A-V2A-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1587,7 +2655,41 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_v32
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1609,6 +2711,72 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_v32
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; FLATSCR-GFX90A-V2A-NEXT: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -1694,7 +2862,10 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a1
- ; MUBUF: $agpr0 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
@@ -1704,13 +2875,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a1
; MUBUF-V2A: liveins: $vgpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a1
- ; FLATSCR: $agpr0 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
@@ -1720,13 +2898,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a1
; FLATSCR-V2A: liveins: $vgpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a1
- ; MUBUF-GFX90A: $agpr0 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: $agpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: S_ENDPGM 0
@@ -1734,13 +2919,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a1
; MUBUF-GFX90A-V2A: liveins: $vgpr0
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a1
- ; FLATSCR-GFX90A: $agpr0 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $agpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1748,6 +2940,10 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a1
; FLATSCR-GFX90A-V2A: liveins: $vgpr0
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
@@ -1771,7 +2967,11 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a2
- ; MUBUF: $agpr0_agpr1 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -1785,6 +2985,12 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a2
; MUBUF-V2A: liveins: $vgpr0, $vgpr1
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1793,7 +2999,11 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a2
- ; FLATSCR: $agpr0_agpr1 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -1807,6 +3017,12 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a2
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1815,7 +3031,11 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a2
- ; MUBUF-GFX90A: $agpr0_agpr1 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $agpr0_agpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: $agpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -1825,6 +3045,12 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a2
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1833,7 +3059,11 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a2
- ; FLATSCR-GFX90A: $agpr0_agpr1 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr0_agpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1841,6 +3071,12 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a2
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1
@@ -1866,7 +3102,12 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a3
- ; MUBUF: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1884,6 +3125,14 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a3
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1894,7 +3143,12 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a3
- ; FLATSCR: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1912,6 +3166,14 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a3
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1922,7 +3184,12 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a3
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1934,6 +3201,14 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a3
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1944,7 +3219,12 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a3
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr0_agpr1_agpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1952,6 +3232,14 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a3
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2
@@ -1979,7 +3267,13 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a4
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2001,6 +3295,16 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a4
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2013,7 +3317,13 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a4
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2035,6 +3345,16 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a4
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2047,7 +3367,13 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a4
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2061,6 +3387,16 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a4
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2073,7 +3409,13 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a4
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -2081,6 +3423,16 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a4
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
@@ -2110,7 +3462,14 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a5
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2136,6 +3495,18 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a5
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2150,7 +3521,14 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a5
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2176,6 +3554,18 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a5
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2190,7 +3580,14 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a5
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2206,6 +3603,18 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a5
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2220,7 +3629,14 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a5
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $agpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2230,6 +3646,18 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a5
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
@@ -2261,7 +3689,15 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a6
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2291,6 +3727,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a6
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2307,7 +3757,15 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a6
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2337,6 +3795,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a6
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2353,7 +3825,15 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a6
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2371,6 +3851,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a6
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2387,7 +3881,15 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a6
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr4_agpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2397,6 +3899,20 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a6
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
@@ -2430,7 +3946,16 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a7
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2464,6 +3989,22 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a7
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; MUBUF-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2482,7 +4023,16 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a7
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2516,6 +4066,22 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a7
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; FLATSCR-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2534,7 +4100,16 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a7
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2554,6 +4129,22 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a7
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; MUBUF-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2572,7 +4163,16 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a7
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr4_agpr5_agpr6, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (store (s96) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2582,6 +4182,22 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a7
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
; FLATSCR-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6
@@ -2617,7 +4233,17 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a8
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2655,6 +4281,24 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a8
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2675,7 +4319,17 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a8
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2713,6 +4367,24 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a8
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2733,7 +4405,17 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a8
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2755,6 +4437,24 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a8
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-GFX90A-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2775,7 +4475,17 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a8
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2785,6 +4495,24 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a8
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
@@ -2822,7 +4550,18 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a9
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2864,6 +4603,26 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a9
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; MUBUF-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2886,7 +4645,18 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a9
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2928,6 +4698,26 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a9
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; FLATSCR-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2950,7 +4740,18 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a9
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2974,6 +4775,26 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a9
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; MUBUF-GFX90A-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2996,7 +4817,18 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a9
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $agpr8, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 :: (store (s32) into %stack.0 + 32, addrspace 5)
@@ -3008,6 +4840,26 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a9
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; FLATSCR-GFX90A-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
@@ -3047,7 +4899,19 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a10
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3093,6 +4957,28 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a10
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; MUBUF-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3117,7 +5003,19 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a10
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3163,6 +5061,28 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a10
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; FLATSCR-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3187,7 +5107,19 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a10
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -3213,6 +5145,28 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a10
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; MUBUF-GFX90A-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3237,7 +5191,19 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a10
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr8_agpr9, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 :: (store (s64) into %stack.0 + 32, align 4, addrspace 5)
@@ -3249,6 +5215,28 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a10
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; FLATSCR-GFX90A-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
@@ -3290,7 +5278,20 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a11
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3340,6 +5341,30 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a11
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; MUBUF-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3366,7 +5391,20 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a11
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3416,6 +5454,30 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a11
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; FLATSCR-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3442,7 +5504,20 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a11
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -3470,6 +5545,30 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a11
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; MUBUF-GFX90A-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3496,7 +5595,20 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a11
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr8_agpr9_agpr10, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 :: (store (s96) into %stack.0 + 32, align 4, addrspace 5)
@@ -3508,6 +5620,30 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a11
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; FLATSCR-GFX90A-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
@@ -3551,7 +5687,21 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a12
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3605,6 +5755,32 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a12
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr11 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; MUBUF-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3633,7 +5809,21 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a12
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3687,6 +5877,32 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a12
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr11 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; FLATSCR-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3715,7 +5931,21 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a12
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -3745,6 +5975,32 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a12
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr11 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; MUBUF-GFX90A-V2A-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3773,7 +6029,21 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a12
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr8_agpr9_agpr10_agpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -3785,6 +6055,32 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a12
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; FLATSCR-GFX90A-V2A-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
@@ -3830,7 +6126,25 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a16
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3900,6 +6214,40 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a16
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3936,7 +6284,25 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a16
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4006,6 +6372,40 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a16
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4042,7 +6442,25 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a16
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -4080,6 +6498,40 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a16
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-GFX90A-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4116,7 +6568,25 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a16
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr8_agpr9_agpr10_agpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -4130,6 +6600,40 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a16
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr12 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-GFX90A-V2A-NEXT: $vgpr13 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
@@ -4183,7 +6687,41 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_av_a32
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4317,6 +6855,72 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_av_a32
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4385,7 +6989,41 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_av_a32
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4519,6 +7157,72 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_av_a32
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4587,7 +7291,41 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_av_a32
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -4657,6 +7395,72 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_av_a32
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-GFX90A-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -4725,7 +7529,41 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_av_a32
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr8_agpr9_agpr10_agpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -4747,6 +7585,72 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_av_a32
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr28 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-GFX90A-V2A-NEXT: $vgpr29 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
diff --git a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
index c9208bfa15c63..55914bacb0dc1 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
@@ -59,6 +59,10 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v2_partial_agpr
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; MUBUF-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -69,6 +73,10 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v2_partial_agpr
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
@@ -96,6 +104,11 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v3_partial_agpr
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -108,6 +121,11 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v3_partial_agpr
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -135,6 +153,12 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v4_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -149,6 +173,12 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v4_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -180,6 +210,13 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v5_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -196,6 +233,13 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v5_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -227,6 +271,14 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v6_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -245,6 +297,14 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v6_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -280,6 +340,16 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v8_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -302,6 +372,16 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v8_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr7, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -335,6 +415,24 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v16_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -373,6 +471,24 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v16_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/pei-build-spill.mir b/llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
index 2fbe08300af57..94518c6ae455f 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
@@ -20,7 +20,10 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v1
- ; MUBUF: $vgpr0 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-NEXT: S_ENDPGM 0
@@ -28,13 +31,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v1
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v1
- ; FLATSCR: $vgpr0 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -42,13 +52,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v1
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v1
- ; MUBUF-GFX90A: $vgpr0 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: S_ENDPGM 0
@@ -56,13 +73,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v1
; MUBUF-GFX90A-V2A: liveins: $agpr0
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v1
- ; FLATSCR-GFX90A: $vgpr0 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -70,6 +94,10 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v1
; FLATSCR-GFX90A-V2A: liveins: $agpr0
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
@@ -93,7 +121,11 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v2
- ; MUBUF: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -103,6 +135,12 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v2
; MUBUF-V2A: liveins: $agpr0, $agpr1
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -111,7 +149,11 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v2
- ; FLATSCR: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -119,6 +161,12 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v2
; FLATSCR-V2A: liveins: $agpr0, $agpr1
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -127,7 +175,11 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v2
- ; MUBUF-GFX90A: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -137,6 +189,12 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v2
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -145,7 +203,11 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v2
- ; FLATSCR-GFX90A: $vgpr0_vgpr1 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -153,6 +215,12 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v2
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -178,7 +246,12 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v3
- ; MUBUF: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -190,6 +263,14 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v3
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; MUBUF-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -200,7 +281,12 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v3
- ; FLATSCR: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -208,6 +294,14 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v3
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2
@@ -218,7 +312,12 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v3
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -230,6 +329,14 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v3
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; MUBUF-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -240,7 +347,12 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v3
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -248,6 +360,14 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v3
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2
@@ -275,7 +395,13 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v4
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -289,6 +415,16 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v4
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -301,7 +437,13 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v4
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: S_ENDPGM 0
@@ -309,6 +451,16 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v4
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -321,7 +473,13 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v4
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -335,6 +493,16 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v4
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; MUBUF-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -347,7 +515,13 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v4
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -355,6 +529,16 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v4
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -384,7 +568,14 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v5
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -400,6 +591,18 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v5
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; MUBUF-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -414,7 +617,14 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v5
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -424,6 +634,18 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v5
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -438,7 +660,14 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v5
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -454,6 +683,18 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v5
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; MUBUF-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -468,7 +709,14 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v5
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -478,6 +726,18 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v5
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -509,7 +769,15 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v6
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -527,6 +795,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v6
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -543,7 +825,15 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v6
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr4_vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -553,6 +843,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v6
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -569,7 +873,15 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v6
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -587,6 +899,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v6
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; MUBUF-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -603,7 +929,15 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v6
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr4_vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -613,6 +947,20 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v6
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-GFX90A-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -646,7 +994,17 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v8
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -668,6 +1026,24 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v8
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; MUBUF-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -688,7 +1064,17 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v8
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -698,6 +1084,24 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v8
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; FLATSCR-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -718,7 +1122,17 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v8
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -740,6 +1154,24 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v8
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; MUBUF-GFX90A-V2A-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -760,7 +1192,17 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v8
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -770,6 +1212,24 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v8
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; FLATSCR-GFX90A-V2A-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -807,7 +1267,25 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v16
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -845,6 +1323,40 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v16
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; MUBUF-V2A-NEXT: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -881,7 +1393,25 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v16
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -895,6 +1425,40 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v16
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; FLATSCR-V2A-NEXT: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
@@ -931,7 +1495,25 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v16
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -969,6 +1551,40 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v16
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; MUBUF-GFX90A-V2A-NEXT: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1005,7 +1621,25 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v16
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1019,6 +1653,40 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v16
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; FLATSCR-GFX90A-V2A-NEXT: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
@@ -1072,7 +1740,41 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_v32
- ; MUBUF: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1142,6 +1844,72 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v32
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; MUBUF-V2A-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1210,7 +1978,41 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_v32
- ; FLATSCR: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1232,6 +2034,72 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v32
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; FLATSCR-V2A-NEXT: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -1300,7 +2168,41 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_v32
- ; MUBUF-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1370,6 +2272,72 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_v32
; MUBUF-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; MUBUF-GFX90A-V2A-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -1438,7 +2406,41 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_v32
- ; FLATSCR-GFX90A: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr8_vgpr9_vgpr10_vgpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -1460,6 +2462,72 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_v32
; FLATSCR-GFX90A-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4, $agpr5, $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29, $agpr30, $agpr31
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
; FLATSCR-GFX90A-V2A-NEXT: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
@@ -1545,7 +2613,10 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a1
- ; MUBUF: $agpr0 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
@@ -1555,13 +2626,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a1
; MUBUF-V2A: liveins: $vgpr0
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a1
- ; FLATSCR: $agpr0 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
@@ -1571,13 +2649,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a1
; FLATSCR-V2A: liveins: $vgpr0
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a1
- ; MUBUF-GFX90A: $agpr0 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: $agpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: S_ENDPGM 0
@@ -1585,13 +2670,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a1
; MUBUF-GFX90A-V2A: liveins: $vgpr0
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a1
- ; FLATSCR-GFX90A: $agpr0 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $agpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1599,6 +2691,10 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a1
; FLATSCR-GFX90A-V2A: liveins: $vgpr0
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; FLATSCR-GFX90A-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
@@ -1622,7 +2718,11 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a2
- ; MUBUF: $agpr0_agpr1 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -1636,6 +2736,12 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a2
; MUBUF-V2A: liveins: $vgpr0, $vgpr1
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1644,7 +2750,11 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a2
- ; FLATSCR: $agpr0_agpr1 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -1658,6 +2768,12 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a2
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1666,7 +2782,11 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a2
- ; MUBUF-GFX90A: $agpr0_agpr1 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $agpr0_agpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: $agpr0 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1 :: (load (s32) from %stack.0, addrspace 5)
@@ -1676,6 +2796,12 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a2
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; MUBUF-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -1684,7 +2810,11 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a2
- ; FLATSCR-GFX90A: $agpr0_agpr1 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr0_agpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1 = SCRATCH_LOAD_DWORDX2_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1692,6 +2822,12 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a2
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1
@@ -1717,7 +2853,12 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a3
- ; MUBUF: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1735,6 +2876,14 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a3
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1745,7 +2894,12 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a3
- ; FLATSCR: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1763,6 +2917,14 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a3
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1773,7 +2935,12 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a3
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec, implicit killed $agpr0_agpr1_agpr2 :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1785,6 +2952,14 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a3
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; MUBUF-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1795,7 +2970,12 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a3
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr0_agpr1_agpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s96) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2 = SCRATCH_LOAD_DWORDX3_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s96) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1803,6 +2983,14 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a3
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2
@@ -1830,7 +3018,13 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a4
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1852,6 +3046,16 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a4
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1864,7 +3068,13 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a4
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1886,6 +3096,16 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a4
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1898,7 +3118,13 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a4
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -1912,6 +3138,16 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a4
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; MUBUF-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1924,7 +3160,13 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a4
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s128) from %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: S_ENDPGM 0
@@ -1932,6 +3174,16 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a4
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
@@ -1961,7 +3213,14 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a5
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1987,6 +3246,18 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a5
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2001,7 +3272,14 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a5
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2027,6 +3305,18 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a5
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2041,7 +3331,14 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a5
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2057,6 +3354,18 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a5
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; MUBUF-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2071,7 +3380,14 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a5
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $agpr4, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4 :: (store (s32) into %stack.0 + 16, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2081,6 +3397,18 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a5
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; FLATSCR-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
@@ -2112,7 +3440,15 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a6
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2142,6 +3478,20 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a6
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2158,7 +3508,15 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a6
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2188,6 +3546,20 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a6
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2204,7 +3576,15 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a6
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2222,6 +3602,20 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a6
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; MUBUF-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2238,7 +3632,15 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a6
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr4_agpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (store (s64) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2248,6 +3650,20 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a6
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; FLATSCR-GFX90A-V2A-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
@@ -2281,7 +3697,17 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a8
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2319,6 +3745,24 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a8
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2339,7 +3783,17 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a8
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2377,6 +3831,24 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a8
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2397,7 +3869,17 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a8
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2419,6 +3901,24 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a8
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; MUBUF-GFX90A-V2A-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2439,7 +3939,17 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a8
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3 = SCRATCH_LOAD_DWORDX4_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 :: (load (s128) from %stack.0, align 4, addrspace 5)
@@ -2449,6 +3959,24 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a8
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; FLATSCR-GFX90A-V2A-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
@@ -2486,7 +4014,25 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a16
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2556,6 +4102,40 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a16
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2592,7 +4172,25 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a16
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2662,6 +4260,40 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a16
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2698,7 +4330,25 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a16
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -2736,6 +4386,40 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a16
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; MUBUF-GFX90A-V2A-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2772,7 +4456,25 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a16
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr8_agpr9_agpr10_agpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -2786,6 +4488,40 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a16
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr12 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; FLATSCR-GFX90A-V2A-NEXT: $vgpr13 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
@@ -2839,7 +4575,41 @@ machineFunctionInfo:
body: |
bb.0.entry:
; MUBUF-LABEL: name: test_spill_a32
- ; MUBUF: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; MUBUF: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; MUBUF-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -2973,6 +4743,72 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_a32
; MUBUF-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; MUBUF-V2A-NEXT: {{ $}}
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3041,7 +4877,41 @@ body: |
; MUBUF-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-LABEL: name: test_spill_a32
- ; FLATSCR: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; FLATSCR: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; FLATSCR-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; FLATSCR-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3175,6 +5045,72 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_a32
; FLATSCR-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; FLATSCR-V2A-NEXT: {{ $}}
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3243,7 +5179,41 @@ body: |
; FLATSCR-V2A-NEXT: S_ENDPGM 0
;
; MUBUF-GFX90A-LABEL: name: test_spill_a32
- ; MUBUF-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; MUBUF-GFX90A: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; MUBUF-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; MUBUF-GFX90A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -3313,6 +5283,72 @@ body: |
; MUBUF-GFX90A-V2A-LABEL: name: test_spill_a32
; MUBUF-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; MUBUF-GFX90A-V2A-NEXT: {{ $}}
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; MUBUF-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; MUBUF-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; MUBUF-GFX90A-V2A-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; MUBUF-GFX90A-V2A-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -3381,7 +5417,41 @@ body: |
; MUBUF-GFX90A-V2A-NEXT: S_ENDPGM 0
;
; FLATSCR-GFX90A-LABEL: name: test_spill_a32
- ; FLATSCR-GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
+ ; FLATSCR-GFX90A: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
+ ; FLATSCR-GFX90A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr0_agpr1_agpr2_agpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr4_agpr5_agpr6_agpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
; FLATSCR-GFX90A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $agpr8_agpr9_agpr10_agpr11, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 32, align 4, addrspace 5)
@@ -3403,6 +5473,72 @@ body: |
; FLATSCR-GFX90A-V2A-LABEL: name: test_spill_a32
; FLATSCR-GFX90A-V2A: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; FLATSCR-GFX90A-V2A-NEXT: {{ $}}
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; FLATSCR-GFX90A-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; FLATSCR-GFX90A-V2A-NEXT: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; FLATSCR-GFX90A-V2A-NEXT: $vgpr28 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; FLATSCR-GFX90A-V2A-NEXT: $vgpr29 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
diff --git a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
index 05cbd4c2a010d..71e7ca11a86cd 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
@@ -29,11 +29,43 @@ body: |
; CHECK-LABEL: name: scavenge_sgpr_pei_no_sgprs
; CHECK: liveins: $sgpr40, $sgpr41, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; CHECK-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; CHECK-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; CHECK-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; CHECK-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; CHECK-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; CHECK-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -45,6 +77,7 @@ body: |
; CHECK-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31
; CHECK-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; CHECK-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; CHECK-NEXT: S_ENDPGM 0, implicit $vcc
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
@@ -77,11 +110,42 @@ body: |
; CHECK-LABEL: name: scavenge_sgpr_pei_one_sgpr
; CHECK: liveins: $sgpr29, $sgpr40, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
; CHECK-NEXT: $sgpr29 = frame-setup COPY $sgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr29
; CHECK-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; CHECK-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; CHECK-NEXT: $sgpr40 = frame-setup COPY $sgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr40
; CHECK-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; CHECK-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -93,6 +157,7 @@ body: |
; CHECK-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr31
; CHECK-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; CHECK-NEXT: $sgpr34 = frame-destroy COPY $sgpr40
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = frame-destroy COPY $sgpr29
; CHECK-NEXT: S_ENDPGM 0, implicit $vcc
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
@@ -125,11 +190,41 @@ body: |
; CHECK-LABEL: name: scavenge_sgpr_pei_one_sgpr_64
; CHECK: liveins: $sgpr28, $sgpr29, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
; CHECK-NEXT: $sgpr28 = frame-setup COPY $sgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr28
; CHECK-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; CHECK-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; CHECK-NEXT: $sgpr29 = frame-setup COPY $sgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr29
; CHECK-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; CHECK-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -141,6 +236,7 @@ body: |
; CHECK-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr31
; CHECK-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; CHECK-NEXT: $sgpr34 = frame-destroy COPY $sgpr29
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = frame-destroy COPY $sgpr28
; CHECK-NEXT: S_ENDPGM 0, implicit $vcc
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
@@ -172,11 +268,41 @@ body: |
; CHECK-LABEL: name: scavenge_sgpr_pei_prefer_vcc
; CHECK: liveins: $sgpr28, $sgpr29, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
; CHECK-NEXT: $sgpr28 = frame-setup COPY $sgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr28
; CHECK-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; CHECK-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; CHECK-NEXT: $sgpr29 = frame-setup COPY $sgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr29
; CHECK-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; CHECK-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr30, implicit-def $sgpr31
; CHECK-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -188,6 +314,7 @@ body: |
; CHECK-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr31
; CHECK-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; CHECK-NEXT: $sgpr34 = frame-destroy COPY $sgpr29
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = frame-destroy COPY $sgpr28
; CHECK-NEXT: S_ENDPGM 0
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr30, implicit-def $sgpr31
diff --git a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
index 4f1c9a20fddc3..7c4e03fd0e6df 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
@@ -25,11 +25,43 @@ body: |
; MUBUF-LABEL: name: scavenge_sgpr_pei_no_sgprs
; MUBUF: liveins: $sgpr40, $sgpr41, $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; MUBUF-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; MUBUF-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; MUBUF-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; MUBUF-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; MUBUF-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; MUBUF-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; MUBUF-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; MUBUF-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -39,17 +71,50 @@ body: |
; MUBUF-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31
; MUBUF-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; MUBUF-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; MUBUF-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; MUBUF-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; MUBUF-NEXT: S_ENDPGM 0, implicit $vcc
;
; FLATSCR-LABEL: name: scavenge_sgpr_pei_no_sgprs
; FLATSCR: liveins: $sgpr40, $sgpr41, $vgpr1
; FLATSCR-NEXT: {{ $}}
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; FLATSCR-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; FLATSCR-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; FLATSCR-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; FLATSCR-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; FLATSCR-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCR-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; FLATSCR-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; FLATSCR-NEXT: $sgpr42 = S_ADD_I32 $sgpr33, 8192, implicit-def $scc
@@ -58,6 +123,7 @@ body: |
; FLATSCR-NEXT: $vgpr0 = V_OR_B32_e32 killed $sgpr42, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31
; FLATSCR-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; FLATSCR-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; FLATSCR-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCR-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; FLATSCR-NEXT: S_ENDPGM 0, implicit $vcc
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
index 480859a09a347..cd335321e2156 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
@@ -24,11 +24,43 @@ body: |
; CHECK-LABEL: name: scavenge_sgpr_pei
; CHECK: liveins: $sgpr40, $sgpr41, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; CHECK-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; CHECK-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 262080, implicit-def $scc
; CHECK-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294705152, implicit-def dead $scc
; CHECK-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; CHECK-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 786432, implicit-def dead $scc
; CHECK-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
; CHECK-NEXT: $vgpr2 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
@@ -37,6 +69,7 @@ body: |
; CHECK-NEXT: $vgpr0 = V_OR_B32_e32 killed $vgpr2, $vgpr1, implicit $exec, implicit $sgpr4, implicit $sgpr5, implicit $sgpr6, implicit $sgpr7, implicit $sgpr8, implicit $sgpr9, implicit $sgpr10, implicit $sgpr11, implicit $sgpr12, implicit $sgpr13, implicit $sgpr14, implicit $sgpr15, implicit $sgpr16, implicit $sgpr17, implicit $sgpr18, implicit $sgpr19, implicit $sgpr20, implicit $sgpr21, implicit $sgpr22, implicit $sgpr23, implicit $sgpr24, implicit $sgpr25, implicit $sgpr26, implicit $sgpr27, implicit $sgpr28, implicit $sgpr29, implicit $sgpr30, implicit $sgpr31
; CHECK-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; CHECK-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; CHECK-NEXT: S_ENDPGM 0, implicit $vcc
S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
index 63a4759d8e740..fb3e8116d86a4 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
@@ -26,16 +26,85 @@ body: |
; GFX8-LABEL: name: pei_scavenge_vgpr_spill
; GFX8: liveins: $vgpr2, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX8-NEXT: {{ $}}
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX8-NEXT: $sgpr4 = COPY $sgpr33
; GFX8-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX8-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX8-NEXT: $sgpr6_sgpr7 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GFX8-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 1048832, implicit-def dead $scc
; GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr5, 0, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 1048832
; GFX8-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
; GFX8-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, undef $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr33, $vgpr2, 0, 32
; GFX8-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr34, 1, undef $vgpr2
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr34, $vgpr2, 1, 32
; GFX8-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX8-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX8-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX8-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX8-NEXT: $vcc_lo = S_MOV_B32 8192
@@ -51,22 +120,92 @@ body: |
; GFX8-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 1048832, implicit-def dead $scc
; GFX8-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr5, 0, 0, 0, implicit $exec :: (load (s32) from %stack.3, addrspace 5)
; GFX8-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
+ ; GFX8-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX8-NEXT: $sgpr33 = COPY $sgpr4
; GFX8-NEXT: S_ENDPGM 0, amdgpu_allvgprs
;
; GFX9-LABEL: name: pei_scavenge_vgpr_spill
; GFX9: liveins: $vgpr2, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX9-NEXT: {{ $}}
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-NEXT: $sgpr4 = COPY $sgpr33
; GFX9-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; GFX9-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; GFX9-NEXT: $sgpr6_sgpr7 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GFX9-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 1048832, implicit-def dead $scc
; GFX9-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr5, 0, 0, 0, implicit $exec :: (store (s32) into %stack.3, addrspace 5)
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 1048832
; GFX9-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
; GFX9-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, undef $vgpr2
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr33, $vgpr2, 0, 32
; GFX9-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr34, 1, undef $vgpr2
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr34, $vgpr2, 1, 32
; GFX9-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX9-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; GFX9-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 2097152, implicit-def dead $scc
; GFX9-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr33, implicit $exec
; GFX9-NEXT: $vgpr0 = V_ADD_U32_e32 8192, killed $vgpr0, implicit $exec
@@ -80,22 +219,92 @@ body: |
; GFX9-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 1048832, implicit-def dead $scc
; GFX9-NEXT: $vgpr2 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, killed $sgpr5, 0, 0, 0, implicit $exec :: (load (s32) from %stack.3, addrspace 5)
; GFX9-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
+ ; GFX9-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; GFX9-NEXT: $sgpr33 = COPY $sgpr4
; GFX9-NEXT: S_ENDPGM 0, amdgpu_allvgprs
;
; GFX9-FLATSCR-LABEL: name: pei_scavenge_vgpr_spill
; GFX9-FLATSCR: liveins: $vgpr2, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: $sgpr4 = COPY $sgpr33
; GFX9-FLATSCR-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; GFX9-FLATSCR-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; GFX9-FLATSCR-NEXT: $sgpr6_sgpr7 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GFX9-FLATSCR-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 16388, implicit-def dead $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr2, killed $sgpr5, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 1048832
; GFX9-FLATSCR-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
; GFX9-FLATSCR-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, undef $vgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr33, $vgpr2, 0, 32
; GFX9-FLATSCR-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr34, 1, undef $vgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr34, $vgpr2, 1, 32
; GFX9-FLATSCR-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX9-FLATSCR-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 32768, implicit-def dead $scc
; GFX9-FLATSCR-NEXT: $sgpr4 = S_ADD_I32 $sgpr33, 8192, implicit-def $scc
; GFX9-FLATSCR-NEXT: $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec
@@ -108,6 +317,7 @@ body: |
; GFX9-FLATSCR-NEXT: $sgpr5 = S_ADD_I32 $sgpr33, 16388, implicit-def dead $scc
; GFX9-FLATSCR-NEXT: $vgpr2 = SCRATCH_LOAD_DWORD_SADDR killed $sgpr5, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.3, addrspace 5)
; GFX9-FLATSCR-NEXT: $exec = S_MOV_B64 killed $sgpr6_sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; GFX9-FLATSCR-NEXT: $sgpr33 = COPY $sgpr4
; GFX9-FLATSCR-NEXT: S_ENDPGM 0, amdgpu_allvgprs
$vgpr0 = V_MOV_B32_e32 %stack.0, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir b/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
index bfca9331a5d25..023bcc563cdcd 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,+wavefrontsize32,-wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,W32
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,-wavefrontsize32,+wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,W64
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,+wavefrontsize32,-wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=W32
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,-wavefrontsize32,+wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=W64
--- |
define void @one_block() { ret void }
@@ -23,15 +23,61 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; CHECK-LABEL: name: one_block
- ; CHECK: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 9
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; CHECK-NEXT: $m0 = S_MOV_B32 9
- ; CHECK-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: one_block
+ ; W32: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: $m0 = S_MOV_B32 9
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; W32-NEXT: $m0 = S_MOV_B32 9
+ ; W32-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: one_block
+ ; W64: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: $m0 = S_MOV_B32 9
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; W64-NEXT: $m0 = S_MOV_B32 9
+ ; W64-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -47,15 +93,61 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; CHECK-LABEL: name: one_block_csr_only
- ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 16711935
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
- ; CHECK-NEXT: $m0 = S_MOV_B32 16711935
- ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: one_block_csr_only
+ ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: $m0 = S_MOV_B32 16711935
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
+ ; W32-NEXT: $m0 = S_MOV_B32 16711935
+ ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: one_block_csr_only
+ ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: $m0 = S_MOV_B32 16711935
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
+ ; W64-NEXT: $m0 = S_MOV_B32 16711935
+ ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -75,23 +167,125 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; CHECK-LABEL: name: multiple_blocks
- ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 3
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 65
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 1
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
- ; CHECK-NEXT: $m0 = S_MOV_B32 1
- ; CHECK-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 65
- ; CHECK-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 3
- ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: multiple_blocks
+ ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; W32-NEXT: $m0 = S_MOV_B32 3
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 65
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 1
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
+ ; W32-NEXT: $m0 = S_MOV_B32 1
+ ; W32-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 65
+ ; W32-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 3
+ ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: multiple_blocks
+ ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
+ ; W64-NEXT: $m0 = S_MOV_B32 3
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 65
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 1
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
+ ; W64-NEXT: $m0 = S_MOV_B32 1
+ ; W64-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 65
+ ; W64-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 3
+ ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -109,19 +303,101 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; CHECK-LABEL: name: reg_tuples
- ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 7
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 3
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
- ; CHECK-NEXT: $m0 = S_MOV_B32 3
- ; CHECK-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; CHECK-NEXT: $m0 = S_MOV_B32 7
- ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: reg_tuples
+ ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; W32-NEXT: $m0 = S_MOV_B32 7
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 3
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
+ ; W32-NEXT: $m0 = S_MOV_B32 3
+ ; W32-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; W32-NEXT: $m0 = S_MOV_B32 7
+ ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: reg_tuples
+ ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
+ ; W64-NEXT: $m0 = S_MOV_B32 7
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 3
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
+ ; W64-NEXT: $m0 = S_MOV_B32 3
+ ; W64-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; W64-NEXT: $m0 = S_MOV_B32 7
+ ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -145,17 +421,65 @@ stack:
body: |
bb.0:
liveins: $sgpr30_sgpr31, $vgpr48
- ; CHECK-LABEL: name: locals
- ; CHECK: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 1
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40
- ; CHECK-NEXT: $m0 = S_MOV_B32 1
- ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: locals
+ ; W32: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: $m0 = S_MOV_B32 1
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; W32-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; W32-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr40
+ ; W32-NEXT: $m0 = S_MOV_B32 1
+ ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: locals
+ ; W64: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: $m0 = S_MOV_B32 1
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; W64-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; W64-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr40
+ ; W64-NEXT: $m0 = S_MOV_B32 1
+ ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
SCRATCH_STORE_DWORD_SADDR $vgpr48, %stack.0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
SCRATCH_STORE_DWORD_SADDR $vgpr48, %stack.1, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
S_NOP 0, implicit-def $vgpr40
@@ -182,10 +506,32 @@ body: |
; W32-LABEL: name: other_regs
; W32: liveins: $sgpr48, $sgpr30_sgpr31, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23, $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
; W32-NEXT: $sgpr0 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 512
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 640
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr44, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr44, 768
; W32-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
; W32-NEXT: $m0 = S_MOV_B32 9
; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.4, align 4, addrspace 5)
@@ -205,10 +551,32 @@ body: |
; W64-LABEL: name: other_regs
; W64: liveins: $sgpr48, $sgpr30_sgpr31, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23, $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
; W64-NEXT: $sgpr0_sgpr1 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 1024
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 1280
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr44, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr44, 1536
; W64-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
; W64-NEXT: $m0 = S_MOV_B32 9
; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.4, align 4, addrspace 5)
@@ -240,11 +608,27 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; CHECK-LABEL: name: entry_func
- ; CHECK: liveins: $sgpr30_sgpr31
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: entry_func
+ ; W32: liveins: $sgpr30_sgpr31
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr42
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr45
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: entry_func
+ ; W64: liveins: $sgpr30_sgpr31
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr42
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr45
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -255,29 +639,89 @@ tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
- ; CHECK-LABEL: name: multiple_basic_blocks
- ; CHECK: bb.0:
- ; CHECK-NEXT: successors: %bb.1(0x80000000)
- ; CHECK-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 11
- ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; CHECK-NEXT: S_BRANCH %bb.1
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.1:
- ; CHECK-NEXT: successors: %bb.2(0x80000000)
- ; CHECK-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
- ; CHECK-NEXT: S_BRANCH %bb.2
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: bb.2:
- ; CHECK-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: $m0 = S_MOV_B32 11
- ; CHECK-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; W32-LABEL: name: multiple_basic_blocks
+ ; W32: bb.0:
+ ; W32-NEXT: successors: %bb.1(0x80000000)
+ ; W32-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W32-NEXT: $m0 = S_MOV_B32 11
+ ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; W32-NEXT: S_BRANCH %bb.1
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: bb.1:
+ ; W32-NEXT: successors: %bb.2(0x80000000)
+ ; W32-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
+ ; W32-NEXT: S_BRANCH %bb.2
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: bb.2:
+ ; W32-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W32-NEXT: {{ $}}
+ ; W32-NEXT: $m0 = S_MOV_B32 11
+ ; W32-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ;
+ ; W64-LABEL: name: multiple_basic_blocks
+ ; W64: bb.0:
+ ; W64-NEXT: successors: %bb.1(0x80000000)
+ ; W64-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
+ ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
+ ; W64-NEXT: $m0 = S_MOV_B32 11
+ ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; W64-NEXT: S_BRANCH %bb.1
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: bb.1:
+ ; W64-NEXT: successors: %bb.2(0x80000000)
+ ; W64-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
+ ; W64-NEXT: S_BRANCH %bb.2
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: bb.2:
+ ; W64-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; W64-NEXT: {{ $}}
+ ; W64-NEXT: $m0 = S_MOV_B32 11
+ ; W64-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
bb.0:
liveins: $sgpr30_sgpr31, $vgpr44
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
diff --git a/llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir b/llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir
index 168d63d3a95b9..37c8788d8d691 100644
--- a/llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir
+++ b/llvm/test/CodeGen/AMDGPU/preserve-only-inactive-lane.mir
@@ -20,6 +20,9 @@ body: |
; GCN-LABEL: name: preserve_scratch_vgpr_inactive_lanes
; GCN: liveins: $sgpr35, $vgpr0, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
diff --git a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
index 75638c5fa8476..fb3042e678ee5 100644
--- a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
+++ b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
@@ -17,6 +17,9 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
; GFX906-NEXT: s_mov_b64 exec, -1
; GFX906-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill
; GFX906-NEXT: s_mov_b64 exec, s[18:19]
+; GFX906-NEXT: v_writelane_b32 v41, s16, 4
+; GFX906-NEXT: v_writelane_b32 v41, s34, 2
+; GFX906-NEXT: v_writelane_b32 v41, s35, 3
; GFX906-NEXT: s_mov_b32 s21, s15
; GFX906-NEXT: ; implicit-def: $vgpr39 : SGPR spill to VGPR lane
; GFX906-NEXT: s_mov_b32 s22, s14
@@ -30,11 +33,8 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
; GFX906-NEXT: v_writelane_b32 v39, s26, 4
; GFX906-NEXT: v_writelane_b32 v39, s27, 5
; GFX906-NEXT: v_writelane_b32 v39, s8, 6
-; GFX906-NEXT: v_writelane_b32 v41, s16, 4
; GFX906-NEXT: v_writelane_b32 v39, s9, 7
-; GFX906-NEXT: v_writelane_b32 v41, s34, 2
; GFX906-NEXT: v_writelane_b32 v39, s6, 8
-; GFX906-NEXT: v_writelane_b32 v41, s35, 3
; GFX906-NEXT: v_writelane_b32 v39, s7, 9
; GFX906-NEXT: v_writelane_b32 v41, s30, 0
; GFX906-NEXT: v_writelane_b32 v39, s4, 10
diff --git a/llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll b/llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
index bf417b211826a..ba460fc7b4266 100644
--- a/llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
+++ b/llvm/test/CodeGen/AMDGPU/prologue-epilogue-markers.ll
@@ -14,6 +14,8 @@ define hidden void @_Z9base_casev() #0 !dbg !6 {
; CHECK-NEXT: .cfi_sections .debug_frame
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0: ; %entry
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: .loc 0 7 3 prologue_end ; file.cpp:7:3
diff --git a/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll b/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll
index e29f09dcac024..072f679390e3c 100644
--- a/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll
+++ b/llvm/test/CodeGen/AMDGPU/ptr-arg-dbg-value.ll
@@ -14,6 +14,9 @@ define hidden void @ptr_arg_split_subregs(ptr %arg1) #0 !dbg !9 {
; CHECK-NEXT: .cfi_sections .debug_frame
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2562
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_subregs:a <- [DW_OP_LLVM_fragment 32 32] [$vgpr1+0]
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_subregs:a <- [DW_OP_LLVM_fragment 0 32] [$vgpr0+0]
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -43,6 +46,10 @@ define hidden void @ptr_arg_split_reg_mem(<30 x i32>, ptr %arg2) #0 !dbg !25 {
; CHECK-NEXT: .loc 1 10 0 ; example.cpp:10:0
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2591
; CHECK-NEXT: ;DEBUG_VALUE: ptr_arg_split_reg_mem:b <- [$vgpr30+0]
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_load_dword v31, off, s[0:3], s32
@@ -69,6 +76,11 @@ define hidden void @ptr_arg_in_memory(<32 x i32>, ptr %arg3) #0 !dbg !31 {
; CHECK-NEXT: .loc 1 15 0 ; example.cpp:15:0
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: buffer_load_dword v1, off, s[0:3], s32 offset:8
; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s32 offset:4
diff --git a/llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir b/llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
index 592e0f0cf0c24..9b226df530eec 100644
--- a/llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir
@@ -15,6 +15,12 @@ body: |
; CHECK-LABEL: name: same_slot_agpr_sgpr
; CHECK: liveins: $agpr0, $agpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; CHECK-NEXT: $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; CHECK-NEXT: $sgpr4_sgpr5 = IMPLICIT_DEF
@@ -48,6 +54,12 @@ body: |
; CHECK-LABEL: name: diff_slot_agpr_sgpr
; CHECK: liveins: $agpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; CHECK-NEXT: $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; CHECK-NEXT: $sgpr4_sgpr5 = IMPLICIT_DEF
@@ -79,6 +91,10 @@ body: |
; CHECK-LABEL: name: dead_vgpr_slot
; CHECK: liveins: $agpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; CHECK-NEXT: $vgpr0 = IMPLICIT_DEF
; CHECK-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; CHECK-NEXT: S_ENDPGM 0
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
index 925984b15367d..9e61fa0e681cc 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
@@ -30,15 +30,65 @@ body: |
; GCN-NEXT: successors: %bb.1(0x80000000)
; GCN-NEXT: liveins: $vcc_hi, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $sgpr102, $sgpr103, $vgpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GCN-NEXT: $vcc_hi = frame-setup COPY $sgpr33
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, <badreg>
; GCN-NEXT: $sgpr33 = frame-setup COPY $sgpr32
; GCN-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.69, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr1, 0
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.70, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 128
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr33, 8, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.71, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr3, 256
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr33, 12, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.72, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr4, 384
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr5, $sgpr33, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.73, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr5, 512
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
; GCN-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24, implicit-def dead $scc
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, $vgpr2
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, $vgpr2
@@ -206,6 +256,7 @@ body: |
; GCN-NEXT: $vgpr4 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 12, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.72, addrspace 5)
; GCN-NEXT: $vgpr5 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 16, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.73, addrspace 5)
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
+ ; GCN-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
; GCN-NEXT: $sgpr33 = frame-destroy COPY $vcc_hi
; GCN-NEXT: S_ENDPGM 0
bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
index 59c4b715dd12e..09e25075e51c5 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber.mir
@@ -23,6 +23,8 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $sgpr8
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1, implicit-def $vgpr0
@@ -73,6 +75,8 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $sgpr8_sgpr9
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 3, implicit-def $vgpr0
@@ -122,6 +126,9 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1, implicit-def $vgpr0
@@ -170,6 +177,10 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 3, implicit-def $vgpr0
@@ -220,6 +231,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $sgpr8
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1
@@ -273,6 +348,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1
@@ -329,6 +468,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $sgpr8_sgpr9
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 3
@@ -383,6 +586,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 3
@@ -443,6 +710,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255, $sgpr8, $sgpr9
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1
@@ -507,6 +838,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; VMEM-GFX8-NEXT: $exec = S_MOV_B64 1
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
index cac9c85130a7b..a1fc683679f9d 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-vmem-large-frame.mir
@@ -25,6 +25,9 @@ body: |
; CHECK-LABEL: name: test
; CHECK: liveins: $sgpr10, $sgpr11, $sgpr30_sgpr31
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
; CHECK-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; CHECK-NEXT: $sgpr4_sgpr5 = S_MOV_B64 $exec
; CHECK-NEXT: $exec = S_MOV_B64 1, implicit-def $vgpr1
diff --git a/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll
index 761ff7786b98e..3419cb3d76320 100644
--- a/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.ll
@@ -9,6 +9,15 @@ define void @__omp_offloading_35_36570d3__ZN6openmc31process_advance_particle_ev
; GCN-NEXT: .cfi_sections .debug_frame
; GCN-NEXT: .cfi_startproc
; GCN-NEXT: ; %bb.0: ; %bb
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GCN-NEXT: .cfi_undefined 2560
+; GCN-NEXT: .cfi_undefined 2561
+; GCN-NEXT: .cfi_undefined 2562
+; GCN-NEXT: .cfi_undefined 2563
+; GCN-NEXT: .cfi_undefined 2564
+; GCN-NEXT: .cfi_undefined 36
+; GCN-NEXT: .cfi_undefined 37
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v1, 0
; GCN-NEXT: v_mov_b32_e32 v2, 0
diff --git a/llvm/test/CodeGen/AMDGPU/sibling-call.ll b/llvm/test/CodeGen/AMDGPU/sibling-call.ll
index 00214ef36e1f0..3c3a2f11fc96a 100644
--- a/llvm/test/CodeGen/AMDGPU/sibling-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/sibling-call.ll
@@ -231,8 +231,8 @@ define fastcc i32 @sibling_call_i32_fastcc_i32_byval_i32_byval_parent(i32 %a, pt
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s33
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s33
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: s_getpc_b64 s[4:5]
@@ -382,8 +382,8 @@ define fastcc i32 @no_sibling_call_callee_more_stack_space(i32 %a, i32 %b) #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, i32_fastcc_i32_i32_a32i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, i32_fastcc_i32_i32_a32i32 at gotpcrel32@hi+12
@@ -450,8 +450,8 @@ define fastcc i32 @sibling_call_i32_fastcc_i32_i32_other_call(i32 %a, i32 %b, i3
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v42, s4, 2
+; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, i32_fastcc_i32_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, i32_fastcc_i32_i32 at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir b/llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
index 9d25df4738709..cfa0ee97e83d0 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
@@ -17,6 +17,8 @@ body: |
; CHECK-LABEL: name: spill_a64_kill
; CHECK: liveins: $agpr0_agpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -42,6 +44,8 @@ body: |
; CHECK-LABEL: name: spill_a64_undef_sub1_killed
; CHECK: liveins: $agpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -65,6 +69,8 @@ body: |
; CHECK-LABEL: name: spill_a64_undef_sub0_killed
; CHECK: liveins: $agpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit $agpr0_agpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1
@@ -84,7 +90,9 @@ machineFunctionInfo:
body: |
bb.0:
; CHECK-LABEL: name: spill_a32_undef
- ; CHECK: S_ENDPGM 0
+ ; CHECK: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: S_ENDPGM 0
SI_SPILL_A32_SAVE undef $agpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
S_ENDPGM 0
...
@@ -101,7 +109,9 @@ machineFunctionInfo:
body: |
bb.0:
; CHECK-LABEL: name: spill_a64_undef
- ; CHECK: S_ENDPGM 0
+ ; CHECK: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: S_ENDPGM 0
SI_SPILL_A64_SAVE undef $agpr0_agpr1, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, addrspace 5)
S_ENDPGM 0
...
diff --git a/llvm/test/CodeGen/AMDGPU/spill-agpr.mir b/llvm/test/CodeGen/AMDGPU/spill-agpr.mir
index 3f6956b83ae92..d4241fb0c53f1 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-agpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-agpr.mir
@@ -38,6 +38,12 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
; GFX908-EXPANDED-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
@@ -82,6 +88,12 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
; GFX90A-EXPANDED-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
@@ -141,6 +153,12 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1
; GFX908-EXPANDED-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; GFX908-EXPANDED-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -181,6 +199,12 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1
; GFX90A-EXPANDED-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $agpr0_agpr1
; GFX90A-EXPANDED-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit killed $agpr0_agpr1
@@ -253,6 +277,9 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
; GFX908-EXPANDED-NEXT: $vgpr63 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX908-EXPANDED-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr63, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
@@ -319,6 +346,9 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0
; GFX90A-EXPANDED-NEXT: BUFFER_STORE_DWORD_OFFSET killed $agpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; GFX90A-EXPANDED-NEXT: S_CBRANCH_SCC1 %bb.1, implicit undef $scc
@@ -402,6 +432,14 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2
; GFX908-EXPANDED-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; GFX908-EXPANDED-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -444,6 +482,14 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2
; GFX90A-EXPANDED-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2
; GFX90A-EXPANDED-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -503,6 +549,16 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3
; GFX908-EXPANDED-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GFX908-EXPANDED-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -547,6 +603,16 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3
; GFX90A-EXPANDED-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A-EXPANDED-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -608,6 +674,18 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4
; GFX908-EXPANDED-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; GFX908-EXPANDED-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -654,6 +732,18 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4
; GFX90A-EXPANDED-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4, implicit $agpr0_agpr1_agpr2_agpr3_agpr4
; GFX90A-EXPANDED-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -717,6 +807,20 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; GFX908-EXPANDED-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; GFX908-EXPANDED-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -765,6 +869,20 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; GFX90A-EXPANDED-NEXT: $vgpr5 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; GFX90A-EXPANDED-NEXT: $vgpr4 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -830,6 +948,24 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX908-EXPANDED-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX908-EXPANDED-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -882,6 +1018,24 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX90A-EXPANDED-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX90A-EXPANDED-NEXT: $vgpr6 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -951,6 +1105,26 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; GFX908-EXPANDED-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; GFX908-EXPANDED-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1005,6 +1179,26 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; GFX90A-EXPANDED-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8
; GFX90A-EXPANDED-NEXT: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1076,6 +1270,28 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; GFX908-EXPANDED-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; GFX908-EXPANDED-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1132,6 +1348,28 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; GFX90A-EXPANDED-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9
; GFX90A-EXPANDED-NEXT: $vgpr8 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1205,6 +1443,30 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; GFX908-EXPANDED-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; GFX908-EXPANDED-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1263,6 +1525,30 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; GFX90A-EXPANDED-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10
; GFX90A-EXPANDED-NEXT: $vgpr9 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1338,6 +1624,32 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; GFX908-EXPANDED-NEXT: $vgpr11 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; GFX908-EXPANDED-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1398,6 +1710,32 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; GFX90A-EXPANDED-NEXT: $vgpr11 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11
; GFX90A-EXPANDED-NEXT: $vgpr10 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1475,6 +1813,40 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX908-EXPANDED-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX908-EXPANDED-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1543,6 +1915,40 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A-EXPANDED-NEXT: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A-EXPANDED-NEXT: $vgpr14 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1628,6 +2034,72 @@ body: |
; GFX908-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX908-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; GFX908-EXPANDED-NEXT: {{ $}}
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX908-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; GFX908-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; GFX908-EXPANDED-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; GFX908-EXPANDED-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
@@ -1728,6 +2200,72 @@ body: |
; GFX90A-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; GFX90A-EXPANDED-NEXT: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31
; GFX90A-EXPANDED-NEXT: {{ $}}
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX90A-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; GFX90A-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; GFX90A-EXPANDED-NEXT: $vgpr31 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; GFX90A-EXPANDED-NEXT: $vgpr30 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir b/llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
index f4edafd9443ab..be5295cf2affd 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-reg-tuple-super-reg-use.mir
@@ -22,8 +22,17 @@ body: |
; GCN-LABEL: name: spill_sgpr128_use_subreg
; GCN: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $vgpr0, $vgpr1, $vgpr2, $vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
; GCN-NEXT: $sgpr8_sgpr9 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr8_sgpr9
; GCN-NEXT: renamable $sgpr1 = COPY $sgpr2
; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
@@ -60,8 +69,16 @@ body: |
; GCN-LABEL: name: spill_sgpr128_use_kill
; GCN: liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $vgpr0, $vgpr1, $vgpr2, $vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
; GCN-NEXT: $sgpr8_sgpr9 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr8_sgpr9
; GCN-NEXT: renamable $sgpr1 = COPY $sgpr2
; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
@@ -95,6 +112,10 @@ body: |
; GCN-LABEL: name: spill_vgpr128_use_subreg
; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
; GCN-NEXT: renamable $vgpr1 = COPY $vgpr2, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -125,6 +146,9 @@ body: |
; GCN-LABEL: name: spill_vgpr128_use_kill
; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; GCN-NEXT: renamable $vgpr1 = COPY $vgpr2, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr100_sgpr101_sgpr102_sgpr103, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir b/llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
index 6e8a5126ca823..cfa09c149e4c6 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
@@ -21,6 +21,12 @@ body: |
; GCN-LABEL: name: shift_back_exec_copy_reserved_reg
; GCN: liveins: $sgpr30_sgpr31, $vgpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr30, 0, killed $vgpr0
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr31, 1, killed $vgpr0
; GCN-NEXT: $sgpr4_sgpr5 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
@@ -58,6 +64,14 @@ body: |
; GCN-LABEL: name: spill_exec_copy_reserved_reg
; GCN: liveins: $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr30_sgpr31, $vcc, $vgpr0
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr30, 0, killed $vgpr0
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr31, 1, killed $vgpr0
; GCN-NEXT: $sgpr40_sgpr41 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
diff --git a/llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir b/llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
index beeb9b2df8b01..a5d029a532f63 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-to-agpr-partial.mir
@@ -16,6 +16,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_1_of_4
; GCN: liveins: $agpr30, $agpr31, $agpr28_agpr29, $agpr24_agpr25_agpr26_agpr27, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; GCN-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s96) into %stack.0, align 4, addrspace 5)
; GCN-NEXT: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr31, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3
@@ -41,6 +47,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_2_of_4
; GCN: liveins: $agpr30, $agpr31, $agpr28_agpr29, $agpr24_agpr25_agpr26_agpr27, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; GCN-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -68,6 +80,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_3_of_4
; GCN: liveins: $agpr28, $agpr29, $agpr30, $agpr31, $agpr24_agpr25_agpr26_agpr27, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; GCN-NEXT: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -97,6 +115,16 @@ body: |
; GCN-LABEL: name: full_spill_v128
; GCN: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -126,6 +154,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_1_of_4
; GCN: liveins: $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr52_vgpr53, $vgpr48_vgpr49_vgpr50_vgpr51, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr0_agpr1_agpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3 :: (store (s96) into %stack.0, align 4, addrspace 5)
; GCN-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr55, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3
@@ -151,6 +185,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_2_of_4
; GCN: liveins: $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr52_vgpr53, $vgpr48_vgpr49_vgpr50_vgpr51, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $vgpr54 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr0_agpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -178,6 +218,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_3_of_4
; GCN: liveins: $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr48_vgpr49_vgpr50_vgpr51, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $vgpr53 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr54 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
@@ -207,6 +253,16 @@ body: |
; GCN-LABEL: name: full_spill_a128
; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
diff --git a/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir b/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
index 69895833efccb..9da556326326f 100644
--- a/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
@@ -17,6 +17,9 @@ body: |
; EXPANDED: bb.0:
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
; EXPANDED-NEXT: {{ $}}
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
@@ -85,6 +88,9 @@ body: |
; EXPANDED: bb.0:
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
; EXPANDED-NEXT: {{ $}}
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
@@ -156,6 +162,9 @@ body: |
; EXPANDED: bb.0:
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
; EXPANDED-NEXT: {{ $}}
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
diff --git a/llvm/test/CodeGen/AMDGPU/spillv16.mir b/llvm/test/CodeGen/AMDGPU/spillv16.mir
index ba2d926eb8883..5f1c3b4679b72 100644
--- a/llvm/test/CodeGen/AMDGPU/spillv16.mir
+++ b/llvm/test/CodeGen/AMDGPU/spillv16.mir
@@ -33,6 +33,9 @@ body: |
; EXPANDED: bb.0:
; EXPANDED-NEXT: successors: %bb.1(0x80000000)
; EXPANDED-NEXT: {{ $}}
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 2, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, addrspace 5)
; EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_lo16, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.0, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll b/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
index 109c7d638f924..dabdc95b73fa5 100644
--- a/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
+++ b/llvm/test/CodeGen/AMDGPU/split-arg-dbg-value.ll
@@ -13,6 +13,8 @@ define hidden <4 x float> @split_v4f32_arg(<4 x float> returned %arg) local_unna
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 64 32] $vgpr2
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp0:
; GCN-NEXT: .loc 0 4 5 prologue_end ; /tmp/dbg.cl:4:5
@@ -35,6 +37,12 @@ define hidden <4 x float> @split_v4f32_multi_arg(<4 x float> %arg0, <2 x float>
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_multi_arg:arg0 <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 64 32] $vgpr2
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_multi_arg:arg0 <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_v4f32_multi_arg:arg0 <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GCN-NEXT: .cfi_undefined 2560
+; GCN-NEXT: .cfi_undefined 2561
+; GCN-NEXT: .cfi_undefined 2562
+; GCN-NEXT: .cfi_undefined 2563
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp2:
; GCN-NEXT: .loc 0 8 17 prologue_end ; /tmp/dbg.cl:8:17
@@ -65,6 +73,8 @@ define hidden <4 x half> @split_v4f16_arg(<4 x half> returned %arg) local_unname
; GCN-NEXT: ; %bb.0:
; GCN-NEXT: ;DEBUG_VALUE: split_v4f16_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_v4f16_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp8:
; GCN-NEXT: .loc 0 12 5 prologue_end ; /tmp/dbg.cl:12:5
@@ -83,6 +93,8 @@ define hidden double @split_f64_arg(double returned %arg) local_unnamed_addr #0
; GCN-NEXT: ; %bb.0:
; GCN-NEXT: ;DEBUG_VALUE: split_f64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_f64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp10:
; GCN-NEXT: .loc 0 16 5 prologue_end ; /tmp/dbg.cl:16:5
@@ -103,6 +115,8 @@ define hidden <2 x double> @split_v2f64_arg(<2 x double> returned %arg) local_un
; GCN-NEXT: ;DEBUG_VALUE: split_v2f64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 64 32] $vgpr2
; GCN-NEXT: ;DEBUG_VALUE: split_v2f64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_v2f64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp12:
; GCN-NEXT: .loc 0 20 5 prologue_end ; /tmp/dbg.cl:20:5
@@ -121,6 +135,8 @@ define hidden i64 @split_i64_arg(i64 returned %arg) local_unnamed_addr #0 !dbg !
; GCN-NEXT: ; %bb.0:
; GCN-NEXT: ;DEBUG_VALUE: split_i64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_i64_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp14:
; GCN-NEXT: .loc 0 24 5 prologue_end ; /tmp/dbg.cl:24:5
@@ -139,6 +155,8 @@ define hidden ptr addrspace(1) @split_ptr_arg(ptr addrspace(1) readnone returned
; GCN-NEXT: ; %bb.0:
; GCN-NEXT: ;DEBUG_VALUE: split_ptr_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 32 32] $vgpr1
; GCN-NEXT: ;DEBUG_VALUE: split_ptr_arg:arg <- [DW_OP_constu 1, DW_OP_swap, DW_OP_xderef, DW_OP_LLVM_fragment 0 32] $vgpr0
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: .Ltmp16:
; GCN-NEXT: .loc 0 28 5 prologue_end ; /tmp/dbg.cl:28:5
diff --git a/llvm/test/CodeGen/AMDGPU/stack-realign.ll b/llvm/test/CodeGen/AMDGPU/stack-realign.ll
index 802de8037cf6b..cf827945fb5f7 100644
--- a/llvm/test/CodeGen/AMDGPU/stack-realign.ll
+++ b/llvm/test/CodeGen/AMDGPU/stack-realign.ll
@@ -32,7 +32,6 @@ define void @needs_align16_default_stack_align(i32 %idx) #0 {
; GCN-NEXT: buffer_store_dword v1, v0, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: s_setpc_b64 s[30:31]
-; GCN: ; ScratchSize: 144
%alloca.align16 = alloca [8 x <4 x i32>], align 16, addrspace(5)
%gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
store volatile <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr addrspace(5) %gep0, align 16
@@ -46,6 +45,8 @@ define void @needs_align16_stack_align4(i32 %idx) #2 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0x3c0
; GCN-NEXT: s_and_b32 s33, s33, 0xfffffc00
+; GCN-NEXT: s_mov_b32 s5, s34
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GCN-NEXT: v_lshrrev_b32_e64 v2, 6, s33
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v2
@@ -58,8 +59,6 @@ define void @needs_align16_stack_align4(i32 %idx) #2 {
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_or_b32_e32 v1, 8, v0
; GCN-NEXT: v_mov_b32_e32 v2, 3
-; GCN-NEXT: s_mov_b32 s5, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_addk_i32 s32, 0x2800
; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0)
@@ -71,7 +70,6 @@ define void @needs_align16_stack_align4(i32 %idx) #2 {
; GCN-NEXT: s_mov_b32 s34, s5
; GCN-NEXT: s_mov_b32 s33, s4
; GCN-NEXT: s_setpc_b64 s[30:31]
-; GCN: ; ScratchSize: 160
%alloca.align16 = alloca [8 x <4 x i32>], align 16, addrspace(5)
%gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
store volatile <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr addrspace(5) %gep0, align 16
@@ -86,6 +84,8 @@ define void @needs_align32(i32 %idx) #0 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0x7c0
; GCN-NEXT: s_and_b32 s33, s33, 0xfffff800
+; GCN-NEXT: s_mov_b32 s5, s34
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GCN-NEXT: v_lshrrev_b32_e64 v2, 6, s33
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v2
@@ -98,8 +98,6 @@ define void @needs_align32(i32 %idx) #0 {
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_or_b32_e32 v1, 8, v0
; GCN-NEXT: v_mov_b32_e32 v2, 3
-; GCN-NEXT: s_mov_b32 s5, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_addk_i32 s32, 0x3000
; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0)
@@ -111,7 +109,6 @@ define void @needs_align32(i32 %idx) #0 {
; GCN-NEXT: s_mov_b32 s34, s5
; GCN-NEXT: s_mov_b32 s33, s4
; GCN-NEXT: s_setpc_b64 s[30:31]
-; GCN: ; ScratchSize: 192
%alloca.align16 = alloca [8 x <4 x i32>], align 32, addrspace(5)
%gep0 = getelementptr inbounds [8 x <4 x i32>], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
store volatile <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr addrspace(5) %gep0, align 32
@@ -125,10 +122,10 @@ define void @force_realign4(i32 %idx) #1 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xc0
; GCN-NEXT: s_and_b32 s33, s33, 0xffffff00
-; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0
-; GCN-NEXT: v_lshrrev_b32_e64 v1, 6, s33
; GCN-NEXT: s_mov_b32 s5, s34
; GCN-NEXT: s_mov_b32 s34, s32
+; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0
+; GCN-NEXT: v_lshrrev_b32_e64 v1, 6, s33
; GCN-NEXT: s_addk_i32 s32, 0xd00
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v1
; GCN-NEXT: v_mov_b32_e32 v1, 3
@@ -138,7 +135,6 @@ define void @force_realign4(i32 %idx) #1 {
; GCN-NEXT: s_mov_b32 s34, s5
; GCN-NEXT: s_mov_b32 s33, s4
; GCN-NEXT: s_setpc_b64 s[30:31]
-; GCN: ; ScratchSize: 52
%alloca.align16 = alloca [8 x i32], align 4, addrspace(5)
%gep0 = getelementptr inbounds [8 x i32], ptr addrspace(5) %alloca.align16, i32 0, i32 %idx
store volatile i32 3, ptr addrspace(5) %gep0, align 4
@@ -346,8 +342,8 @@ define i32 @needs_align1024_stack_args_used_inside_loop(ptr addrspace(5) nocaptu
; GCN-NEXT: s_mov_b32 s11, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xffc0
; GCN-NEXT: s_mov_b32 s14, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_and_b32 s33, s33, 0xffff0000
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshrrev_b32_e64 v1, 6, s34
; GCN-NEXT: v_mov_b32_e32 v0, 0
; GCN-NEXT: s_mov_b32 s10, 0
@@ -416,12 +412,12 @@ define void @no_free_scratch_sgpr_for_bp_copy(<32 x i32> %a, i32 %b) #0 {
; GCN-LABEL: no_free_scratch_sgpr_for_bp_copy:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: s_mov_b32 s41, s34
-; GCN-NEXT: s_mov_b32 s34, s32
-; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s34 offset:4
; GCN-NEXT: s_mov_b32 s40, s33
; GCN-NEXT: s_add_i32 s33, s32, 0x1fc0
; GCN-NEXT: s_and_b32 s33, s33, 0xffffe000
+; GCN-NEXT: s_mov_b32 s41, s34
+; GCN-NEXT: s_mov_b32 s34, s32
+; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s34 offset:4
; GCN-NEXT: s_addk_i32 s32, 0x6000
; GCN-NEXT: s_mov_b32 s32, s34
; GCN-NEXT: s_mov_b32 s34, s41
diff --git a/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll b/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
index ebd4bc881f2af..6be2c490e3ea8 100644
--- a/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
+++ b/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
@@ -184,8 +184,8 @@ define void @outgoing_f16_arg(ptr %ptr) #0 {
; GFX7-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[18:19]
-; GFX7-NEXT: flat_load_ushort v0, v[0:1]
; GFX7-NEXT: v_writelane_b32 v40, s16, 2
+; GFX7-NEXT: flat_load_ushort v0, v[0:1]
; GFX7-NEXT: v_writelane_b32 v40, s30, 0
; GFX7-NEXT: s_mov_b32 s17, f16_user at abs32@hi
; GFX7-NEXT: s_mov_b32 s16, f16_user at abs32@lo
@@ -218,8 +218,8 @@ define void @outgoing_v2f16_arg(ptr %ptr) #0 {
; GFX7-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[18:19]
-; GFX7-NEXT: flat_load_dword v1, v[0:1]
; GFX7-NEXT: v_writelane_b32 v40, s16, 2
+; GFX7-NEXT: flat_load_dword v1, v[0:1]
; GFX7-NEXT: v_writelane_b32 v40, s30, 0
; GFX7-NEXT: s_mov_b32 s17, v2f16_user at abs32@hi
; GFX7-NEXT: s_mov_b32 s16, v2f16_user at abs32@lo
diff --git a/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
index c4af66e922e8d..eecc9f22db415 100644
--- a/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
+++ b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
@@ -10,8 +10,8 @@ define void @test_load_zext() {
; CHECK-NEXT: s_or_saveexec_b64 s[2:3], -1
; CHECK-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; CHECK-NEXT: s_mov_b64 exec, s[2:3]
-; CHECK-NEXT: s_add_i32 s32, s32, 16
; CHECK-NEXT: v_writelane_b32 v40, s0, 2
+; CHECK-NEXT: s_add_i32 s32, s32, 16
; CHECK-NEXT: s_getpc_b64 s[0:1]
; CHECK-NEXT: s_add_u32 s0, s0, has_spgr_args at gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s1, s1, has_spgr_args at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll b/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
index 242b5e9aeaf42..153ea2957dd75 100644
--- a/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
+++ b/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
@@ -51,8 +51,8 @@ define void @indirect_tail_call_i32_inreg_divergent(i32 %vgpr) {
; CHECK-NEXT: s_or_saveexec_b64 s[18:19], -1
; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CHECK-NEXT: s_mov_b64 exec, s[18:19]
-; CHECK-NEXT: s_addk_i32 s32, 0x400
; CHECK-NEXT: v_writelane_b32 v40, s16, 2
+; CHECK-NEXT: s_addk_i32 s32, 0x400
; CHECK-NEXT: s_getpc_b64 s[16:17]
; CHECK-NEXT: s_add_u32 s16, s16, constant at rel32@lo+4
; CHECK-NEXT: s_addc_u32 s17, s17, constant at rel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir b/llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
index cc261b0da4a8f..f4dc2aeb3e848 100644
--- a/llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
+++ b/llvm/test/CodeGen/AMDGPU/tied-op-for-wwm-scratch-reg-spill-restore.mir
@@ -19,8 +19,12 @@ body: |
; GCN-LABEL: name: wwm_scratch_reg_spill_reload_of_outgoing_reg
; GCN: liveins: $sgpr20, $vgpr1
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
@@ -52,9 +56,15 @@ body: |
; GCN-LABEL: name: wwm_scratch_reg_spill_reload_of_outgoing_tuple_subreg
; GCN: liveins: $sgpr20, $sgpr21, $vgpr1
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 256
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: $vgpr0 = IMPLICIT_DEF
; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
@@ -91,8 +101,13 @@ body: |
; GCN-LABEL: name: wwm_scratch_reg_spill_reload_different_outgoing_reg
; GCN: liveins: $sgpr20, $vgpr1
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 0
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr2
@@ -123,8 +138,14 @@ body: |
; GCN-LABEL: name: wwm_csr_spill_reload
; GCN: liveins: $sgpr20, $vgpr1
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
; GCN-NEXT: $sgpr4_sgpr5 = S_XOR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 0
; GCN-NEXT: $exec = S_MOV_B64 killed $sgpr4_sgpr5
; GCN-NEXT: $vgpr2 = IMPLICIT_DEF
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr2
diff --git a/llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir b/llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir
index 4122a530ee861..5b330e892aa34 100644
--- a/llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir
+++ b/llvm/test/CodeGen/AMDGPU/track-spilled-vgpr-liveness.mir
@@ -18,6 +18,9 @@ body: |
; GCN-LABEL: name: vgpr_use_after_prolog_spill
; GCN: liveins: $sgpr42, $vgpr0, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: $vgpr0 = V_ADD_U32_e32 8192, killed $vgpr0, implicit $exec
; GCN-NEXT: $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 0, $vgpr0
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0
@@ -42,6 +45,9 @@ body: |
; GCN-LABEL: name: livein_vgpr_def_after_prolog_spill
; GCN: liveins: $sgpr42, $vgpr0, $vgpr1, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: $vgpr0 = V_ADD_U32_e32 8192, killed $vgpr1, implicit $exec
; GCN-NEXT: $vgpr0 = V_WRITELANE_B32 killed $sgpr42, 0, $vgpr0
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0
@@ -65,6 +71,9 @@ body: |
; GCN-NEXT: successors: %bb.1(0x80000000)
; GCN-NEXT: liveins: $sgpr42, $vgpr0, $sgpr30_sgpr31
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GCN-NEXT: S_NOP 0
; GCN-NEXT: S_BRANCH %bb.1
; GCN-NEXT: {{ $}}
diff --git a/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll b/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
index e7bc851817f3a..4e842f74689f3 100644
--- a/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
+++ b/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
@@ -13,8 +13,8 @@ define internal fastcc void @widget() {
; GFX90A-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX90A-NEXT: s_mov_b64 exec, s[18:19]
-; GFX90A-NEXT: s_addk_i32 s32, 0x400
; GFX90A-NEXT: v_writelane_b32 v40, s16, 2
+; GFX90A-NEXT: s_addk_i32 s32, 0x400
; GFX90A-NEXT: s_getpc_b64 s[16:17]
; GFX90A-NEXT: s_add_u32 s16, s16, wobble at gotpcrel32@lo+4
; GFX90A-NEXT: s_addc_u32 s17, s17, wobble at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll b/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
index 321b64510c35f..f137f429ebe26 100644
--- a/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
+++ b/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
@@ -648,12 +648,12 @@ define i32 @s_in_multiuse_A(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg
; GCN-NEXT: s_mov_b32 exec_lo, s16
; GCN-NEXT: v_writelane_b32 v40, s2, 4
; GCN-NEXT: s_add_i32 s32, s32, 16
+; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, use32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, use32 at gotpcrel32@hi+12
; GCN-NEXT: s_xor_b32 s0, s0, s1
; GCN-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
-; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: v_writelane_b32 v40, s31, 1
; GCN-NEXT: v_writelane_b32 v40, s34, 2
; GCN-NEXT: s_mov_b32 s34, s1
@@ -693,16 +693,16 @@ define i32 @s_in_multiuse_B(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg
; GCN-NEXT: s_or_saveexec_b32 s16, -1
; GCN-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b32 exec_lo, s16
+; GCN-NEXT: v_writelane_b32 v40, s2, 4
; GCN-NEXT: s_add_i32 s32, s32, 16
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, use32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, use32 at gotpcrel32@hi+12
-; GCN-NEXT: v_writelane_b32 v40, s2, 4
+; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
; GCN-NEXT: s_xor_b32 s0, s0, s1
; GCN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GCN-NEXT: v_mov_b32_e32 v0, s0
-; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: v_writelane_b32 v40, s31, 1
; GCN-NEXT: v_writelane_b32 v40, s34, 2
; GCN-NEXT: s_mov_b32 s34, s1
diff --git a/llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir b/llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
index 1e815f76ee149..dd7d96f9d6e3c 100644
--- a/llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
+++ b/llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
@@ -39,11 +39,43 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $sgpr40, $sgpr41, $vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; MUBUF-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; MUBUF-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 524224, implicit-def $scc
; MUBUF-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294443008, implicit-def dead $scc
; MUBUF-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; MUBUF-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; MUBUF-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 11010048, implicit-def dead $scc
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
@@ -66,6 +98,7 @@ body: |
; MUBUF-NEXT: {{ $}}
; MUBUF-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; MUBUF-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; MUBUF-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; MUBUF-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; MUBUF-NEXT: S_ENDPGM 0
;
@@ -74,11 +107,43 @@ body: |
; FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; FLATSCR-NEXT: liveins: $sgpr40, $sgpr41, $vgpr1
; FLATSCR-NEXT: {{ $}}
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
; FLATSCR-NEXT: $sgpr40 = frame-setup COPY $sgpr33
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, $sgpr40
; FLATSCR-NEXT: $sgpr33 = frame-setup S_ADD_I32 $sgpr32, 8191, implicit-def $scc
; FLATSCR-NEXT: $sgpr33 = frame-setup S_AND_B32 killed $sgpr33, 4294959104, implicit-def dead $scc
; FLATSCR-NEXT: $sgpr41 = frame-setup COPY $sgpr34
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION register $sgpr34, $sgpr41
; FLATSCR-NEXT: $sgpr34 = frame-setup COPY $sgpr32
+ ; FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCR-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 172032, implicit-def dead $scc
; FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; FLATSCR-NEXT: S_NOP 0, implicit-def $sgpr4, implicit-def $sgpr5, implicit-def $sgpr6, implicit-def $sgpr7, implicit-def $sgpr8, implicit-def $sgpr9, implicit-def $sgpr10, implicit-def $sgpr11, implicit-def $sgpr12, implicit-def $sgpr13, implicit-def $sgpr14, implicit-def $sgpr15, implicit-def $sgpr16, implicit-def $sgpr17, implicit-def $sgpr18, implicit-def $sgpr19, implicit-def $sgpr20, implicit-def $sgpr21, implicit-def $sgpr22, implicit-def $sgpr23, implicit-def $sgpr24, implicit-def $sgpr25, implicit-def $sgpr26, implicit-def $sgpr27, implicit-def $sgpr28, implicit-def $sgpr29, implicit-def $sgpr30, implicit-def $sgpr31, implicit-def $vcc
@@ -104,6 +169,7 @@ body: |
; FLATSCR-NEXT: {{ $}}
; FLATSCR-NEXT: $sgpr32 = frame-destroy COPY $sgpr34
; FLATSCR-NEXT: $sgpr34 = frame-destroy COPY $sgpr41
+ ; FLATSCR-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
; FLATSCR-NEXT: $sgpr33 = frame-destroy COPY $sgpr40
; FLATSCR-NEXT: S_ENDPGM 0
bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir b/llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
index 69cf924548ed8..0316c35128087 100644
--- a/llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
+++ b/llvm/test/CodeGen/AMDGPU/vector-spill-restore-to-other-vector-type.mir
@@ -19,6 +19,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_restore_to_v128_1_of_4
; GCN: liveins: $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $agpr0_agpr1_agpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3 :: (store (s96) into %stack.0, align 4, addrspace 5)
; GCN-NEXT: $vgpr51 = COPY $vgpr55, implicit-def $vgpr48_vgpr49_vgpr50_vgpr51
@@ -44,6 +50,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_restore_to_v128_2_of_4
; GCN: liveins: $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
; GCN-NEXT: $vgpr54 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $agpr0_agpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $agpr0_agpr1_agpr2_agpr3 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -71,6 +83,12 @@ body: |
; GCN-LABEL: name: partial_spill_a128_restore_to_v128_3_of_4
; GCN: liveins: $vgpr52, $vgpr53, $vgpr54, $vgpr55, $agpr0_agpr1_agpr2_agpr3, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
; GCN-NEXT: $vgpr53 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr54 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr55 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
@@ -100,6 +118,20 @@ body: |
; GCN-LABEL: name: full_spill_a128_restore_to_v128
; GCN: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
; GCN-NEXT: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GCN-NEXT: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
@@ -129,6 +161,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_restore_to_a128_1_of_4
; GCN: liveins: $agpr30, $agpr31, $agpr24_agpr25, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GCN-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX3_SADDR killed $vgpr0_vgpr1_vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s96) into %stack.0, align 4, addrspace 5)
; GCN-NEXT: $agpr29 = COPY $agpr30, implicit-def $agpr26_agpr27_agpr28_agpr29
@@ -154,6 +192,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_restore_to_a128_2_of_4
; GCN: liveins: $agpr30, $agpr31, $agpr24_agpr25, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GCN-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -181,6 +225,12 @@ body: |
; GCN-LABEL: name: partial_spill_v128_restore_to_a128_3_of_4
; GCN: liveins: $agpr24, $agpr25, $agpr30, $agpr31, $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23, $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GCN-NEXT: $agpr25 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -210,6 +260,20 @@ body: |
; GCN-LABEL: name: full_spill_v128_restore_to_a128
; GCN: liveins: $agpr4, $agpr5, $agpr6, $agpr7, $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
; GCN-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GCN-NEXT: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir b/llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
index 572a875941b22..00c0f230d141a 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
@@ -26,6 +26,8 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFEN $vgpr0, killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
@@ -44,6 +46,8 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX9-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e32 8200, $vgpr1, implicit $exec
@@ -63,6 +67,8 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD $vgpr0, killed $vgpr1, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
@@ -81,6 +87,8 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFEN $vgpr0, killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
@@ -125,6 +133,8 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFEN $vgpr0, $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.1, addrspace 5)
@@ -144,6 +154,8 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $vgpr2 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX9-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e32 8200, $vgpr2, implicit $exec
@@ -163,6 +175,8 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORDX2 $vgpr0_vgpr1, killed $vgpr2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64) into %stack.1, align 4, addrspace 5)
@@ -181,6 +195,8 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFEN $vgpr0, $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.1, addrspace 5)
@@ -224,6 +240,9 @@ body: |
; MUBUF: bb.0:
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.1, addrspace 5)
@@ -241,6 +260,9 @@ body: |
; GFX9-FLATSCR: bb.0:
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX9-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e32 8200, $vgpr1, implicit $exec
@@ -259,6 +281,9 @@ body: |
; GFX10-FLATSCR: bb.0:
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
; GFX10-FLATSCR-NEXT: $vgpr0 = SCRATCH_LOAD_DWORD killed $vgpr1, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.1, addrspace 5)
@@ -276,6 +301,9 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; VMEM-GFX8-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.1, addrspace 5)
@@ -318,6 +346,10 @@ body: |
; MUBUF: bb.0:
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.1, addrspace 5)
@@ -336,6 +368,10 @@ body: |
; GFX9-FLATSCR: bb.0:
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $vgpr2 = V_MOV_B32_e32 $sgpr32, implicit $exec
; GFX9-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e32 8200, $vgpr2, implicit $exec
@@ -354,6 +390,10 @@ body: |
; GFX10-FLATSCR: bb.0:
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
; GFX10-FLATSCR-NEXT: $vgpr0_vgpr1 = SCRATCH_LOAD_DWORDX2 killed $vgpr2, 0, 0, implicit $exec, implicit $flat_scr :: (load (s64) from %stack.1, align 4, addrspace 5)
@@ -371,6 +411,10 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
; VMEM-GFX8-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1 :: (load (s32) from %stack.1, addrspace 5)
@@ -415,6 +459,71 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -436,6 +545,71 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -458,6 +632,71 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -479,6 +718,71 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -527,6 +831,72 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
@@ -549,6 +919,72 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr2 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -571,6 +1007,72 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -592,6 +1094,72 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
@@ -641,6 +1209,73 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr3 = V_MOV_B32_e32 8200, implicit $exec
@@ -664,6 +1299,73 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr3 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -686,6 +1388,73 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr3 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -707,6 +1476,73 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr3 = V_MOV_B32_e32 8200, implicit $exec
@@ -757,6 +1593,70 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -778,6 +1678,70 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr1 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -800,6 +1764,70 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr1 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -821,6 +1849,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -869,6 +1961,70 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
@@ -891,6 +2047,70 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr2 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -913,6 +2133,70 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr2 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -934,6 +2218,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr2 = V_MOV_B32_e32 8200, implicit $exec
@@ -983,6 +2331,70 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr3 = V_MOV_B32_e32 8200, implicit $exec
@@ -1006,6 +2418,70 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $vgpr3 = V_MOV_B32_e32 $sgpr32, implicit $exec
@@ -1028,6 +2504,70 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $vgpr3 = V_ADD_U32_e64 $sgpr32, 8200, 0, implicit $exec
@@ -1049,6 +2589,70 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr3, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr3 = V_MOV_B32_e32 8200, implicit $exec
@@ -1098,6 +2702,71 @@ body: |
; MUBUF: bb.0:
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; MUBUF-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.1, addrspace 5)
@@ -1115,6 +2784,71 @@ body: |
; GFX9-FLATSCR: bb.0:
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
; GFX9-FLATSCR-NEXT: S_BITCMP1_B32 $sgpr4, 0, implicit-def $scc
@@ -1135,6 +2869,71 @@ body: |
; GFX10-FLATSCR: bb.0:
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
; GFX10-FLATSCR-NEXT: S_BITCMP1_B32 $sgpr4, 0, implicit-def $scc
@@ -1155,6 +2954,71 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
; VMEM-GFX8-NEXT: $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (load (s32) from %stack.1, addrspace 5)
@@ -1202,6 +3066,71 @@ body: |
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -1223,6 +3152,71 @@ body: |
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX9-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
@@ -1247,6 +3241,71 @@ body: |
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
; GFX10-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
@@ -1271,6 +3330,71 @@ body: |
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47, $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63, $vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79, $vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95, $vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103_vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111, $vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127, $vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135_vgpr136_vgpr137_vgpr138_vgpr139_vgpr140_vgpr141_vgpr142_vgpr143, $vgpr144_vgpr145_vgpr146_vgpr147_vgpr148_vgpr149_vgpr150_vgpr151_vgpr152_vgpr153_vgpr154_vgpr155_vgpr156_vgpr157_vgpr158_vgpr159, $vgpr160_vgpr161_vgpr162_vgpr163_vgpr164_vgpr165_vgpr166_vgpr167_vgpr168_vgpr169_vgpr170_vgpr171_vgpr172_vgpr173_vgpr174_vgpr175, $vgpr176_vgpr177_vgpr178_vgpr179_vgpr180_vgpr181_vgpr182_vgpr183_vgpr184_vgpr185_vgpr186_vgpr187_vgpr188_vgpr189_vgpr190_vgpr191, $vgpr192_vgpr193_vgpr194_vgpr195_vgpr196_vgpr197_vgpr198_vgpr199_vgpr200_vgpr201_vgpr202_vgpr203_vgpr204_vgpr205_vgpr206_vgpr207, $vgpr208_vgpr209_vgpr210_vgpr211_vgpr212_vgpr213_vgpr214_vgpr215_vgpr216_vgpr217_vgpr218_vgpr219_vgpr220_vgpr221_vgpr222_vgpr223, $vgpr224_vgpr225_vgpr226_vgpr227_vgpr228_vgpr229_vgpr230_vgpr231_vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239, $vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247, $vgpr248_vgpr249_vgpr250_vgpr251, $vgpr252_vgpr253_vgpr254_vgpr255
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
; VMEM-GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 8200, implicit $exec
@@ -1319,6 +3443,9 @@ body: |
; MUBUF: bb.0:
; MUBUF-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; MUBUF-NEXT: {{ $}}
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; MUBUF-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; MUBUF-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; MUBUF-NEXT: $vcc_lo = S_MOV_B32 8200
@@ -1339,6 +3466,9 @@ body: |
; GFX9-FLATSCR: bb.0:
; GFX9-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX9-FLATSCR-NEXT: {{ $}}
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX9-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX9-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX9-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
; GFX9-FLATSCR-NEXT: S_BITCMP1_B32 $sgpr4, 0, implicit-def $scc
@@ -1360,6 +3490,9 @@ body: |
; GFX10-FLATSCR: bb.0:
; GFX10-FLATSCR-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; GFX10-FLATSCR-NEXT: {{ $}}
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX10-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; GFX10-FLATSCR-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; GFX10-FLATSCR-NEXT: $sgpr4 = S_ADDC_U32 $sgpr32, 8200, implicit-def $scc, implicit $scc
; GFX10-FLATSCR-NEXT: S_BITCMP1_B32 $sgpr4, 0, implicit-def $scc
@@ -1381,6 +3514,9 @@ body: |
; VMEM-GFX8: bb.0:
; VMEM-GFX8-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; VMEM-GFX8-NEXT: {{ $}}
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; VMEM-GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; VMEM-GFX8-NEXT: S_CMP_EQ_U32 0, 0, implicit-def $scc
; VMEM-GFX8-NEXT: $vgpr0 = V_LSHRREV_B32_e64 6, $sgpr32, implicit $exec
; VMEM-GFX8-NEXT: $vcc_lo = S_MOV_B32 8200
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
index edea344a66a3c..8862c17f8e7a5 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
@@ -17,6 +17,8 @@ body: |
; CHECK-LABEL: name: spill_v32
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: S_NOP 0, implicit $vgpr0
SI_SPILL_V32_SAVE $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
@@ -39,6 +41,8 @@ body: |
; CHECK-LABEL: name: spill_v32_kill
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
SI_SPILL_V32_SAVE killed $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
...
@@ -59,6 +63,8 @@ body: |
; CHECK-LABEL: name: spill_v64
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
; CHECK-NEXT: S_NOP 0, implicit $vgpr0_vgpr1
@@ -82,6 +88,8 @@ body: |
; CHECK-LABEL: name: spill_v64_kill
; CHECK: liveins: $vgpr0_vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
SI_SPILL_V64_SAVE killed $vgpr0_vgpr1, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, addrspace 5)
@@ -105,6 +113,8 @@ body: |
; CHECK-LABEL: name: spill_v64_undef_sub1_killed
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
SI_SPILL_V64_SAVE killed $vgpr0_vgpr1, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, addrspace 5)
@@ -126,6 +136,8 @@ body: |
; CHECK-LABEL: name: spill_v64_undef_sub0_killed
; CHECK: liveins: $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0 + 4, addrspace 5)
SI_SPILL_V64_SAVE killed $vgpr0_vgpr1, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, addrspace 5)
@@ -147,6 +159,8 @@ body: |
; CHECK-LABEL: name: spill_v128_kill
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr2, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 8, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 8, addrspace 5)
@@ -166,7 +180,9 @@ machineFunctionInfo:
body: |
bb.0:
; CHECK-LABEL: name: spill_v32_undef
- ; CHECK: S_NOP 0, implicit undef $vgpr0
+ ; CHECK: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: S_NOP 0, implicit undef $vgpr0
SI_SPILL_V32_SAVE undef $vgpr0, %stack.0, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.0, addrspace 5)
S_NOP 0, implicit undef $vgpr0
...
@@ -183,7 +199,9 @@ machineFunctionInfo:
body: |
bb.0:
; CHECK-LABEL: name: spill_v64_undef
- ; CHECK: S_NOP 0, implicit undef $vgpr0_vgpr1
+ ; CHECK: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: S_NOP 0, implicit undef $vgpr0_vgpr1
SI_SPILL_V64_SAVE undef $vgpr0_vgpr1, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, addrspace 5)
S_NOP 0, implicit undef $vgpr0_vgpr1
...
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll b/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
index 14f222a8c8e17..5beb2237466a8 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
@@ -16,6 +16,7 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: v_writelane_b32 v44, s4, 2
; GFX9-NEXT: v_mov_b32_e32 v36, v16
; GFX9-NEXT: v_mov_b32_e32 v35, v15
; GFX9-NEXT: v_mov_b32_e32 v34, v14
@@ -35,7 +36,6 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: ;;#ASMEND
; GFX9-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[4:11], s[4:7] dmask:0x1
; GFX9-NEXT: s_addk_i32 s32, 0x800
-; GFX9-NEXT: v_writelane_b32 v44, s4, 2
; GFX9-NEXT: s_getpc_b64 s[4:5]
; GFX9-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
@@ -72,6 +72,7 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s5
+; GFX10-NEXT: v_writelane_b32 v44, s4, 2
; GFX10-NEXT: v_mov_b32_e32 v36, v16
; GFX10-NEXT: v_mov_b32_e32 v35, v15
; GFX10-NEXT: v_mov_b32_e32 v34, v14
@@ -91,12 +92,12 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: v_writelane_b32 v44, s4, 2
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_getpc_b64 s[4:5]
; GFX10-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX10-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
-; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX10-NEXT: v_writelane_b32 v44, s30, 0
+; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX10-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
@@ -129,6 +130,7 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v36, v16 :: v_dual_mov_b32 v35, v15
; GFX11-NEXT: v_dual_mov_b32 v34, v14 :: v_dual_mov_b32 v33, v13
; GFX11-NEXT: v_mov_b32_e32 v32, v12
@@ -147,12 +149,11 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[0:7], s[0:3] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX11-NEXT: s_add_i32 s32, s32, 32
-; GFX11-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-NEXT: s_getpc_b64 s[0:1]
; GFX11-NEXT: s_add_u32 s0, s0, extern_func at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s1, s1, extern_func at gotpcrel32@hi+12
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_writelane_b32 v44, s30, 0
+; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -206,6 +207,7 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: v_writelane_b32 v45, s4, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
@@ -218,7 +220,6 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: v_mov_b32_e32 v40, v12
; GFX9-NEXT: image_gather4_c_b_cl v[0:3], v[40:44], s[4:11], s[4:7] dmask:0x1
; GFX9-NEXT: s_addk_i32 s32, 0x800
-; GFX9-NEXT: v_writelane_b32 v45, s4, 2
; GFX9-NEXT: s_getpc_b64 s[4:5]
; GFX9-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
@@ -256,6 +257,7 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s5
+; GFX10-NEXT: v_writelane_b32 v45, s4, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
@@ -263,18 +265,18 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: image_gather4_c_b_cl v[0:3], v[12:16], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: v_writelane_b32 v45, s4, 2
+; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_getpc_b64 s[4:5]
; GFX10-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX10-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
-; GFX10-NEXT: v_mov_b32_e32 v40, v16
+; GFX10-NEXT: v_writelane_b32 v45, s30, 0
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
+; GFX10-NEXT: v_mov_b32_e32 v40, v16
; GFX10-NEXT: v_mov_b32_e32 v41, v15
-; GFX10-NEXT: v_writelane_b32 v45, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v42, v14
+; GFX10-NEXT: v_writelane_b32 v45, s31, 1
; GFX10-NEXT: v_mov_b32_e32 v43, v13
; GFX10-NEXT: v_mov_b32_e32 v44, v12
-; GFX10-NEXT: v_writelane_b32 v45, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: global_store_dwordx4 v[0:1], v[0:3], off
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
@@ -306,6 +308,7 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v45, s33 offset:20 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: v_writelane_b32 v45, s0, 2
; GFX11-NEXT: s_clause 0x4
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:16
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:12
@@ -314,16 +317,15 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: scratch_store_b32 off, v44, s33
; GFX11-NEXT: image_gather4_c_b_cl v[0:3], v[12:16], s[0:7], s[0:3] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX11-NEXT: s_add_i32 s32, s32, 32
-; GFX11-NEXT: v_writelane_b32 v45, s0, 2
; GFX11-NEXT: s_getpc_b64 s[0:1]
; GFX11-NEXT: s_add_u32 s0, s0, extern_func at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s1, s1, extern_func at gotpcrel32@hi+12
-; GFX11-NEXT: v_dual_mov_b32 v40, v16 :: v_dual_mov_b32 v41, v15
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_writelane_b32 v45, s30, 0
+; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-NEXT: v_dual_mov_b32 v40, v16 :: v_dual_mov_b32 v41, v15
; GFX11-NEXT: v_dual_mov_b32 v42, v14 :: v_dual_mov_b32 v43, v13
-; GFX11-NEXT: v_mov_b32_e32 v44, v12
; GFX11-NEXT: v_writelane_b32 v45, s31, 1
+; GFX11-NEXT: v_mov_b32_e32 v44, v12
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: global_store_b128 v[0:1], v[0:3], off
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/wave32.ll b/llvm/test/CodeGen/AMDGPU/wave32.ll
index 28c6b40554bb6..fe3a6c59f1728 100644
--- a/llvm/test/CodeGen/AMDGPU/wave32.ll
+++ b/llvm/test/CodeGen/AMDGPU/wave32.ll
@@ -3076,13 +3076,13 @@ define void @callee_no_stack_with_call() #1 {
; GFX1032-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX1032-NEXT: s_waitcnt_depctr 0xffe3
; GFX1032-NEXT: s_mov_b32 exec_lo, s17
-; GFX1032-NEXT: s_addk_i32 s32, 0x200
; GFX1032-NEXT: v_writelane_b32 v40, s16, 2
+; GFX1032-NEXT: s_addk_i32 s32, 0x200
; GFX1032-NEXT: s_getpc_b64 s[16:17]
; GFX1032-NEXT: s_add_u32 s16, s16, external_void_func_void at gotpcrel32@lo+4
; GFX1032-NEXT: s_addc_u32 s17, s17, external_void_func_void at gotpcrel32@hi+12
-; GFX1032-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX1032-NEXT: v_writelane_b32 v40, s30, 0
+; GFX1032-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX1032-NEXT: v_writelane_b32 v40, s31, 1
; GFX1032-NEXT: s_waitcnt lgkmcnt(0)
; GFX1032-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -3107,13 +3107,13 @@ define void @callee_no_stack_with_call() #1 {
; GFX1064-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX1064-NEXT: s_waitcnt_depctr 0xffe3
; GFX1064-NEXT: s_mov_b64 exec, s[18:19]
-; GFX1064-NEXT: s_addk_i32 s32, 0x400
; GFX1064-NEXT: v_writelane_b32 v40, s16, 2
+; GFX1064-NEXT: s_addk_i32 s32, 0x400
; GFX1064-NEXT: s_getpc_b64 s[16:17]
; GFX1064-NEXT: s_add_u32 s16, s16, external_void_func_void at gotpcrel32@lo+4
; GFX1064-NEXT: s_addc_u32 s17, s17, external_void_func_void at gotpcrel32@hi+12
-; GFX1064-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX1064-NEXT: v_writelane_b32 v40, s30, 0
+; GFX1064-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX1064-NEXT: v_writelane_b32 v40, s31, 1
; GFX1064-NEXT: s_waitcnt lgkmcnt(0)
; GFX1064-NEXT: s_swappc_b64 s[30:31], s[16:17]
diff --git a/llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir b/llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
index adba762235d8c..9b4bd18b986e2 100644
--- a/llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
+++ b/llvm/test/CodeGen/AMDGPU/whole-wave-functions-pei.mir
@@ -26,8 +26,13 @@ body: |
; CHECK-LABEL: name: save_inactive_lanes_non_csr_vgpr
; CHECK: liveins: $vgpr0
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 14, implicit $exec
; CHECK-NEXT: $exec_lo = S_XOR_B32 $sgpr0, -1, implicit-def $scc
@@ -64,8 +69,12 @@ body: |
; CHECK-LABEL: name: save_all_lanes_csr_vgpr
; CHECK: liveins: $vgpr40
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
; CHECK-NEXT: $sgpr0 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 0
; CHECK-NEXT: $vgpr40 = V_MOV_B32_e32 14, implicit $exec
; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.0, addrspace 5)
; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
@@ -101,8 +110,13 @@ body: |
; CHECK-LABEL: name: save_csr_sgpr_to_non_csr_vgpr
; CHECK: liveins: $sgpr20, $vgpr191, $vgpr192
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr192, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr192, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: $vgpr192 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr192
; CHECK-NEXT: $sgpr20 = S_MOV_B32 14, implicit $exec
@@ -144,8 +158,12 @@ body: |
; CHECK-LABEL: name: save_csr_sgpr_to_csr_vgpr
; CHECK: liveins: $sgpr20, $vgpr191
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
; CHECK-NEXT: $vcc_lo = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr191, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr191, 0
; CHECK-NEXT: $vgpr191 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr191
; CHECK-NEXT: $sgpr20 = S_MOV_B32 14, implicit $exec
; CHECK-NEXT: $sgpr20 = SI_RESTORE_S32_FROM_VGPR $vgpr191, 0
@@ -193,11 +211,20 @@ body: |
; CHECK-LABEL: name: vgpr_and_sgpr_csr
; CHECK: liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr40, $vgpr49
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr49, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr49, 256
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 128
; CHECK-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr49, implicit-def $sgpr40
@@ -250,11 +277,21 @@ body: |
; CHECK-LABEL: name: split_orig_exec
; CHECK: liveins: $sgpr20, $vgpr0, $vgpr1, $vgpr40, $vgpr49
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr49, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr49, 256
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 128
; CHECK-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr20, 0, $vgpr0
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $sgpr20
; CHECK-NEXT: $sgpr3 = COPY $vcc_lo
@@ -300,16 +337,32 @@ body: |
; CHECK-LABEL: name: vgpr_superregs
; CHECK: liveins: $vgpr0, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr40, $vgpr41, $vgpr42
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr2, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 128
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr3, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr3, 256
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr4, $sgpr32, 12, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr4, 384
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr5, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.4, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr5, 512
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr40, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.5, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 640
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr41, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.6, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 768
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr42, $sgpr32, 28, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.7, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 896
; CHECK-NEXT: $vgpr0 = V_MOV_B32_e32 14, implicit $exec
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5, implicit-def $vgpr40_vgpr41_vgpr42
; CHECK-NEXT: $vgpr40 = SCRATCH_LOAD_DWORD_SADDR $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.5, addrspace 5)
@@ -360,6 +413,9 @@ body: |
; CHECK-LABEL: name: dont_restore_used_vgprs
; CHECK: liveins: $vgpr0, $vgpr20, $vgpr40
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
; CHECK-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: S_NOP 0, implicit $vgpr0, implicit $vgpr20, implicit $vgpr40
; CHECK-NEXT: $exec_lo = S_MOV_B32 $sgpr0
@@ -398,9 +454,16 @@ body: |
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: liveins: $vgpr0, $vgpr1
; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
; CHECK-NEXT: $vcc_lo = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr0, 0
; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr1, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr1, 128
; CHECK-NEXT: $exec_lo = S_MOV_B32 -1
; CHECK-NEXT: $sgpr1 = S_MOV_B32 $exec_lo
; CHECK-NEXT: V_CMPX_EQ_U32_nosdst_e64 $vgpr0, $vgpr1, implicit-def $exec, implicit $exec
diff --git a/llvm/test/DebugInfo/AMDGPU/cfi.ll b/llvm/test/DebugInfo/AMDGPU/cfi.ll
index 686cf4b654e35..c7c23bc632fe7 100644
--- a/llvm/test/DebugInfo/AMDGPU/cfi.ll
+++ b/llvm/test/DebugInfo/AMDGPU/cfi.ll
@@ -15,6 +15,9 @@
; CHECK-EMPTY:
; CHECK: 00000010 {{[0-9]+}} 00000000 FDE cie=00000000 pc=00000000...{{[0-9]+}}
; CHECK-NEXT: Format: DWARF32
+; CHECK-NEXT: DW_CFA_LLVM_def_aspace_cfa: SGPR32 +0 in addrspace6
+; CHECK-NEXT: DW_CFA_expression: PC_REG DW_OP_regx SGPR30, DW_OP_piece 0x4, DW_OP_regx SGPR31, DW_OP_piece 0x4
+; CHECK-NEXT: DW_CFA_nop:
; CHECK-EMPTY:
; CHECK: .eh_frame contents:
; CHECK-NOT: CIE
diff --git a/llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll b/llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
index 1f13282a1f04c..a87ce1c79055a 100644
--- a/llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
+++ b/llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll
@@ -4,6 +4,8 @@
; Verify that the debug locations in this function are correct, in particular
; that the location for %cast doesn't appear in the block of %lab.
+
+
define void @_Z12lane_pc_testj() #0 !dbg !9 {
; GCN-LABEL: _Z12lane_pc_testj:
; GCN: .Lfunc_begin0:
@@ -12,6 +14,16 @@ define void @_Z12lane_pc_testj() #0 !dbg !9 {
; GCN-NEXT: .cfi_sections .debug_frame
; GCN-NEXT: .cfi_startproc
; GCN-NEXT: ; %bb.0:
+; GCN-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; GCN-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; GCN-NEXT: .cfi_undefined 1536
+; GCN-NEXT: .cfi_undefined 1537
+; GCN-NEXT: .cfi_undefined 1538
+; GCN-NEXT: .cfi_undefined 36
+; GCN-NEXT: .cfi_undefined 37
+; GCN-NEXT: .cfi_undefined 38
+; GCN-NEXT: .cfi_undefined 39
+; GCN-NEXT: .cfi_undefined 40
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: ; %bb.1: ; %lab
; GCN-NEXT: s_mov_b64 s[4:5], 0
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
index a8c2531117f42..0a85133152679 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
@@ -69,9 +69,22 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-NEXT: .type .Lcheck_boundaries$local, at function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
+; CHECK-NEXT: .cfi_undefined 38
+; CHECK-NEXT: .cfi_undefined 39
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s8, s33
+; CHECK-NEXT: .cfi_register 65, 40
; CHECK-NEXT: s_mov_b32 s33, s32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: s_addk_i32 s32, 0x600
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v0, 1
@@ -102,6 +115,7 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: s_mov_b32 s32, s33
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s8
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
@@ -111,9 +125,21 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-NEXT: .type .Lmain$local, at function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 2565
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s6, s33
+; CHECK-NEXT: .cfi_register 65, 38
; CHECK-NEXT: s_mov_b32 s33, s32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: s_addk_i32 s32, 0x600
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: s_getpc_b64 s[4:5]
@@ -139,6 +165,7 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:16
; CHECK-NEXT: s_mov_b32 s32, s33
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s6
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
index 34530f2f632e2..df156b1b2e1b4 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
@@ -10,9 +10,22 @@ define dso_local i32 @check_boundaries() #0 {
; CHECK-NEXT: .type .Lcheck_boundaries$local, at function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
+; CHECK-NEXT: .cfi_undefined 38
+; CHECK-NEXT: .cfi_undefined 39
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s8, s33
+; CHECK-NEXT: .cfi_register 65, 40
; CHECK-NEXT: s_mov_b32 s33, s32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: s_addk_i32 s32, 0x600
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v0, 1
@@ -43,6 +56,7 @@ define dso_local i32 @check_boundaries() #0 {
; CHECK-NEXT: s_or_b64 exec, exec, s[4:5]
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: s_mov_b32 s32, s33
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s8
; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
@@ -88,9 +102,21 @@ define dso_local i32 @main() #0 {
; CHECK-NEXT: .type .Lmain$local, at function
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: ; %bb.0:
+; CHECK-NEXT: .cfi_llvm_def_aspace_cfa 64, 0, 6
+; CHECK-NEXT: .cfi_llvm_register_pair 16, 62, 32, 63, 32
+; CHECK-NEXT: .cfi_undefined 2560
+; CHECK-NEXT: .cfi_undefined 2561
+; CHECK-NEXT: .cfi_undefined 2562
+; CHECK-NEXT: .cfi_undefined 2563
+; CHECK-NEXT: .cfi_undefined 2564
+; CHECK-NEXT: .cfi_undefined 2565
+; CHECK-NEXT: .cfi_undefined 36
+; CHECK-NEXT: .cfi_undefined 37
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_mov_b32 s6, s33
+; CHECK-NEXT: .cfi_register 65, 38
; CHECK-NEXT: s_mov_b32 s33, s32
+; CHECK-NEXT: .cfi_def_cfa_register 65
; CHECK-NEXT: s_addk_i32 s32, 0x600
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: s_getpc_b64 s[4:5]
@@ -116,6 +142,7 @@ define dso_local i32 @main() #0 {
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:16
; CHECK-NEXT: s_mov_b32 s32, s33
+; CHECK-NEXT: .cfi_def_cfa_register 64
; CHECK-NEXT: s_mov_b32 s33, s6
; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CHECK-NEXT: s_setpc_b64 s[30:31]
>From 9c1fb98d48db98d3ecbb5854080d8f4178eec175 Mon Sep 17 00:00:00 2001
From: Scott Linder <Scott.Linder at amd.com>
Date: Fri, 24 Oct 2025 22:16:05 +0000
Subject: [PATCH 2/3] Prefer SIRegisterInfo to MCRegisterInfo and add braces
---
llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
index 5921f8bdc9c32..f1b64cccfbfb7 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
@@ -101,9 +101,9 @@ void SIFrameLowering::emitDefCFA(MachineBasicBlock &MBB,
MachineInstr::MIFlag Flags) const {
MachineFunction &MF = *MBB.getParent();
const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
- const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo();
+ const SIRegisterInfo *TRI = ST.getRegisterInfo();
- MCRegister DwarfStackPtrReg = MCRI->getDwarfRegNum(StackPtrReg, false);
+ MCRegister DwarfStackPtrReg = TRI->getDwarfRegNum(StackPtrReg, false);
MCCFIInstruction CFIInst =
ST.enableFlatScratch()
? createScaledCFAInPrivateWave(ST, DwarfStackPtrReg)
@@ -350,11 +350,12 @@ class PrologEpilogSGPRSpillBuilder {
// FIXME: CFI for EXEC needs a fix by accurately computing the spill
// offset for both the low and high components.
- if (SubReg != AMDGPU::EXEC_LO)
+ if (SubReg != AMDGPU::EXEC_LO) {
TFI->buildCFI(MBB, MI, DL,
MCCFIInstruction::createOffset(
nullptr, MCRI->getDwarfRegNum(SubReg, false),
MFI.getObjectOffset(FI) * ST.getWavefrontSize()));
+ }
}
DwordOff += 4;
}
@@ -1227,12 +1228,13 @@ void SIFrameLowering::emitCSRSpillStores(MachineFunction &MF,
int FI = Reg.second;
buildPrologSpill(ST, TRI, *FuncInfo, LiveUnits, MF, MBB, MBBI, DL,
VGPR, FI, FrameReg);
- if (NeedsFrameMoves)
+ if (NeedsFrameMoves) {
// We spill the entire VGPR, so we can get away with just cfi_offset
buildCFI(MBB, MBBI, DL,
MCCFIInstruction::createOffset(
nullptr, MCRI->getDwarfRegNum(VGPR, false),
MFI.getObjectOffset(FI) * ST.getWavefrontSize()));
+ }
}
};
@@ -1281,7 +1283,7 @@ void SIFrameLowering::emitCSRSpillStores(MachineFunction &MF,
// Skip if FP is saved to a scratch SGPR, the save has already been emitted.
// Otherwise, FP has been moved to a temporary register and spill it
// instead.
- bool IsFramePtrPrologSpill = Spill.first == FramePtrReg ? true : false;
+ bool IsFramePtrPrologSpill = Spill.first == FramePtrReg;
Register Reg = IsFramePtrPrologSpill ? FramePtrRegScratchCopy : Spill.first;
if (!Reg)
continue;
@@ -1650,11 +1652,9 @@ void SIFrameLowering::emitEpilogue(MachineFunction &MF,
FramePtrRegScratchCopy);
}
- const bool NeedsFrameMoves = MF.needsFrameMoves();
- if (hasFP(MF)) {
- if (NeedsFrameMoves)
- emitDefCFA(MBB, MBBI, DL, StackPtrReg, /*AspaceAlreadyDefined=*/false,
- MachineInstr::FrameDestroy);
+ if (hasFP(MF) && MF.needsFrameMoves()) {
+ emitDefCFA(MBB, MBBI, DL, StackPtrReg, /*AspaceAlreadyDefined=*/false,
+ MachineInstr::FrameDestroy);
}
if (FPSaved) {
>From e38cf3cb9b5ef4aec55389c3dec6f494b3353082 Mon Sep 17 00:00:00 2001
From: Scott Linder <Scott.Linder at amd.com>
Date: Thu, 13 Nov 2025 23:11:47 +0000
Subject: [PATCH 3/3] Use nounwind to avoid touching unrelated tests
---
.../GlobalISel/call-outgoing-stack-args.ll | 17 +-
.../GlobalISel/dynamic-alloca-uniform.ll | 20 +-
.../CodeGen/AMDGPU/GlobalISel/localizer.ll | 12 +-
.../AMDGPU/GlobalISel/non-entry-alloca.ll | 13 +-
llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir | 50 +-
.../CodeGen/AMDGPU/amdgcn-call-whole-wave.ll | 295 +-
.../CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll | 6551 ++++++++++++++++-
.../test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll | 54 +-
.../AMDGPU/amdgpu-cs-chain-fp-nosave.ll | 20 +-
llvm/test/CodeGen/AMDGPU/call-args-inreg.ll | 250 +
.../CodeGen/AMDGPU/call-argument-types.ll | 32 +-
.../callee-special-input-vgprs-packed.ll | 14 +-
.../AMDGPU/callee-special-input-vgprs.ll | 12 +-
.../dynamic-vgpr-reserve-stack-for-cwsr.ll | 4 +-
.../test/CodeGen/AMDGPU/dynamic_stackalloc.ll | 144 +-
.../CodeGen/AMDGPU/function-args-inreg.ll | 41 +-
.../AMDGPU/gfx-callable-argument-types.ll | 1166 ++-
.../gfx-callable-preserved-registers.ll | 68 +-
.../AMDGPU/gfx-callable-return-types.ll | 56 +
.../CodeGen/AMDGPU/insert-waitcnts-crash.ll | 224 +-
.../local-stack-alloc-block-sp-reference.ll | 17 +-
llvm/test/CodeGen/AMDGPU/nested-calls.ll | 4 +-
.../AMDGPU/no-source-locations-in-prologue.ll | 2 +-
llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 15 +-
.../AMDGPU/pei-amdgpu-cs-chain-preserve.mir | 703 +-
.../CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir | 582 +-
.../AMDGPU/pei-build-spill-partial-agpr.mir | 116 -
.../AMDGPU/pei-vgpr-block-spill-csr.mir | 640 +-
.../AMDGPU/preserve-wwm-copy-dst-reg.ll | 8 +-
.../AMDGPU/sgpr-spill-overlap-wwm-reserve.mir | 51 -
llvm/test/CodeGen/AMDGPU/sibling-call.ll | 6 +-
.../AMDGPU/spill-restore-partial-copy.mir | 182 +
llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir | 9 +
llvm/test/CodeGen/AMDGPU/spillv16.mir | 3 +
llvm/test/CodeGen/AMDGPU/stack-realign.ll | 27 +-
.../AMDGPU/strictfp_f16_abi_promote.ll | 6 +-
.../CodeGen/AMDGPU/swdev504645-global-fold.ll | 6 +-
.../AMDGPU/tail-call-inreg-arguments.error.ll | 8 +-
.../AMDGPU/tuple-allocation-failure.ll | 7 +-
...unfold-masked-merge-scalar-variablemask.ll | 84 +-
.../CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 35 +-
llvm/test/CodeGen/AMDGPU/wave32.ll | 50 +-
.../CodeGen/AMDGPU/whole-wave-functions.ll | 30 +-
43 files changed, 8092 insertions(+), 3542 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
index e3228162be22a..7e6f500181ec6 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll
@@ -9,7 +9,7 @@
declare hidden void @external_void_func_v16i32_v16i32_v4i32(<16 x i32>, <16 x i32>, <4 x i32>) #0
declare hidden void @external_void_func_byval(ptr addrspace(5) byval([16 x i32])) #0
-define amdgpu_kernel void @kernel_caller_stack() {
+define amdgpu_kernel void @kernel_caller_stack() #2 {
; MUBUF-LABEL: kernel_caller_stack:
; MUBUF: ; %bb.0:
; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s12, s17
@@ -57,7 +57,7 @@ define amdgpu_kernel void @kernel_caller_stack() {
ret void
}
-define amdgpu_kernel void @kernel_caller_byval() {
+define amdgpu_kernel void @kernel_caller_byval() #2 {
; MUBUF-LABEL: kernel_caller_byval:
; MUBUF: ; %bb.0:
; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s12, s17
@@ -213,7 +213,7 @@ define amdgpu_kernel void @kernel_caller_byval() {
ret void
}
-define void @func_caller_stack() {
+define void @func_caller_stack() #2 {
; MUBUF-LABEL: func_caller_stack:
; MUBUF: ; %bb.0:
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -222,11 +222,11 @@ define void @func_caller_stack() {
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
-; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: s_addk_i32 s32, 0x400
; MUBUF-NEXT: v_mov_b32_e32 v0, 9
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
; MUBUF-NEXT: v_mov_b32_e32 v0, 10
+; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; MUBUF-NEXT: v_mov_b32_e32 v0, 11
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
@@ -257,8 +257,8 @@ define void @func_caller_stack() {
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
-; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
+; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: s_add_u32 s0, s32, 4
; FLATSCR-NEXT: v_mov_b32_e32 v0, 9
; FLATSCR-NEXT: scratch_store_dword off, v0, s0
@@ -291,7 +291,7 @@ define void @func_caller_stack() {
ret void
}
-define void @func_caller_byval(ptr addrspace(5) %argptr) {
+define void @func_caller_byval(ptr addrspace(5) %argptr) #2 {
; MUBUF-LABEL: func_caller_byval:
; MUBUF: ; %bb.0:
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -300,10 +300,10 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
-; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: buffer_load_dword v1, v0, s[0:3], 0 offen
; MUBUF-NEXT: buffer_load_dword v2, v0, s[0:3], 0 offen offset:4
; MUBUF-NEXT: s_addk_i32 s32, 0x400
+; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
; MUBUF-NEXT: s_getpc_b64 s[4:5]
; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_byval at rel32@lo+4
@@ -382,9 +382,9 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
-; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: scratch_load_dwordx2 v[1:2], v0, off
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
+; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
; FLATSCR-NEXT: v_writelane_b32 v40, s30, 0
; FLATSCR-NEXT: s_getpc_b64 s[0:1]
; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_byval at rel32@lo+4
@@ -432,3 +432,4 @@ declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture writeonly, i8, i32,
attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-cluster-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-cluster-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-cluster-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
attributes #1 = { argmemonly nofree nounwind willreturn writeonly }
+attributes #2 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
index b17324a38ada0..2e8f8f67bc5ea 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
@@ -5,7 +5,7 @@
@gv = external addrspace(4) constant i32
-define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) {
+define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) #0 {
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align4:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s5, s[8:9], 0x0
@@ -63,7 +63,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) {
ret void
}
-define void @func_dynamic_stackalloc_sgpr_align4() {
+define void @func_dynamic_stackalloc_sgpr_align4() #0 {
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align4:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -146,7 +146,7 @@ define void @func_dynamic_stackalloc_sgpr_align4() {
ret void
}
-define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) {
+define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) #0 {
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s5, s[8:9], 0x0
@@ -204,7 +204,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) {
ret void
}
-define void @func_dynamic_stackalloc_sgpr_align16() {
+define void @func_dynamic_stackalloc_sgpr_align16() #0 {
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align16:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -287,7 +287,7 @@ define void @func_dynamic_stackalloc_sgpr_align16() {
ret void
}
-define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) {
+define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) #0 {
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align32:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s4, s[8:9], 0x0
@@ -348,7 +348,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) {
ret void
}
-define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
+define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) #0 {
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align32:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -363,6 +363,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX9-NEXT: s_addc_u32 s5, s5, gv at gotpcrel32@hi+12
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX9-NEXT: v_mov_b32_e32 v0, 0
+; GFX9-NEXT: s_mov_b32 s33, s6
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX9-NEXT: s_add_u32 s5, s32, 0x7ff
@@ -376,7 +377,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX9-NEXT: s_add_u32 s32, s5, s4
; GFX9-NEXT: s_mov_b32 s32, s34
; GFX9-NEXT: s_mov_b32 s34, s7
-; GFX9-NEXT: s_mov_b32 s33, s6
; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_setpc_b64 s[30:31]
;
@@ -394,6 +394,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX10-NEXT: s_addc_u32 s5, s5, gv at gotpcrel32@hi+12
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
+; GFX10-NEXT: s_mov_b32 s33, s6
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_load_dword s4, s[4:5], 0x0
; GFX10-NEXT: s_add_u32 s5, s32, 0x3ff
@@ -407,7 +408,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX10-NEXT: s_add_u32 s32, s5, s4
; GFX10-NEXT: s_mov_b32 s32, s34
; GFX10-NEXT: s_mov_b32 s34, s7
-; GFX10-NEXT: s_mov_b32 s33, s6
; GFX10-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-LABEL: func_dynamic_stackalloc_sgpr_align32:
@@ -424,6 +424,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX11-NEXT: s_addc_u32 s1, s1, gv at gotpcrel32@hi+12
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-NEXT: s_mov_b32 s33, s2
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x0
; GFX11-NEXT: s_add_u32 s1, s32, 0x3ff
@@ -438,10 +439,11 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
; GFX11-NEXT: s_add_u32 s32, s1, s0
; GFX11-NEXT: s_mov_b32 s32, s34
; GFX11-NEXT: s_mov_b32 s34, s3
-; GFX11-NEXT: s_mov_b32 s33, s2
; GFX11-NEXT: s_setpc_b64 s[30:31]
%n = load i32, ptr addrspace(4) @gv
%alloca = alloca i32, i32 %n, align 32, addrspace(5)
store i32 0, ptr addrspace(5) %alloca
ret void
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
index c100d653c1cd7..72766f47030cc 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
@@ -4,7 +4,7 @@
; Test the localizer did something and we don't materialize all
; constants in SGPRs in the entry block.
-define amdgpu_kernel void @localize_constants(i1 %cond) {
+define amdgpu_kernel void @localize_constants(i1 %cond) #0 {
; GFX9-LABEL: localize_constants:
; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dword s1, s[8:9], 0x0
@@ -91,7 +91,7 @@ bb2:
@gv2 = addrspace(1) global i32 poison, align 4
@gv3 = addrspace(1) global i32 poison, align 4
-define amdgpu_kernel void @localize_globals(i1 %cond) {
+define amdgpu_kernel void @localize_globals(i1 %cond) #0 {
; GFX9-LABEL: localize_globals:
; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dword s1, s[8:9], 0x0
@@ -162,7 +162,7 @@ bb2:
@static.gv2 = internal addrspace(1) global i32 poison, align 4
@static.gv3 = internal addrspace(1) global i32 poison, align 4
-define void @localize_internal_globals(i1 %cond) {
+define void @localize_internal_globals(i1 %cond) #0 {
; GFX9-LABEL: localize_internal_globals:
; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -226,7 +226,7 @@ bb2:
}
; This would crash from using the wrong insert point
-define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
+define void @sink_null_insert_pt(ptr addrspace(4) %arg0) #0 {
; GFX9-LABEL: sink_null_insert_pt:
; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -235,11 +235,11 @@ define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[18:19]
-; GFX9-NEXT: v_writelane_b32 v40, s16, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s16, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s31, 1
@@ -262,3 +262,5 @@ bb1:
call void null()
ret void
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
index 9839af011ecdb..8bef60523e9a7 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
@@ -10,7 +10,7 @@
; FIXME: FunctionLoweringInfo unhelpfully doesn't preserve an
; alignment less than the stack alignment.
-define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {
+define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #1 {
; GCN-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align4:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_load_dword s4, s[8:9], 0x8
@@ -82,7 +82,7 @@ bb.2:
; ASSUME1024: .amdhsa_private_segment_fixed_size 1040
; ASSUME1024: ; ScratchSize: 1040
-define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
+define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #1 {
; GCN-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align64:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_load_dword s4, s[8:9], 0x8
@@ -146,13 +146,13 @@ bb.1:
; ASSUME1024: ; ScratchSize: 1088
-define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {
+define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #1 {
; GCN-LABEL: func_non_entry_block_static_alloca_align4:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s7, s33
-; GCN-NEXT: s_mov_b32 s33, s32
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
+; GCN-NEXT: s_mov_b32 s33, s32
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-NEXT: s_cbranch_execz .LBB2_3
@@ -210,16 +210,16 @@ bb.2:
ret void
}
-define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
+define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #1 {
; GCN-LABEL: func_non_entry_block_static_alloca_align64:
; GCN: ; %bb.0: ; %entry
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GCN-NEXT: s_mov_b32 s7, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xfc0
; GCN-NEXT: s_mov_b32 s8, s34
+; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_and_b32 s33, s33, 0xfffff000
; GCN-NEXT: s_mov_b32 s34, s32
-; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; GCN-NEXT: s_addk_i32 s32, 0x2000
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-NEXT: s_cbranch_execz .LBB3_2
@@ -272,6 +272,7 @@ bb.1:
declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone speculatable }
+attributes #1 = { nounwind }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; ASSUME1024: {{.*}}
diff --git a/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir b/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
index 6e5f8aceaf169..8cdb0f215396c 100644
--- a/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir
@@ -4,7 +4,7 @@
--- |
define amdgpu_kernel void @agpr_spill_copy() #0 { ret void }
- attributes #0 = { "amdgpu-waves-per-eu"="8,8" }
+ attributes #0 = { "amdgpu-waves-per-eu"="8,8" nounwind }
---
name: agpr_spill_copy
tracksRegLiveness: true
@@ -18,54 +18,6 @@ body: |
; GFX942-LABEL: name: agpr_spill_copy
; GFX942: liveins: $agpr30, $agpr31
; GFX942-NEXT: {{ $}}
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
- ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GFX942-NEXT: renamable $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27 = IMPLICIT_DEF
; GFX942-NEXT: renamable $agpr28_agpr29 = IMPLICIT_DEF
; GFX942-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll b/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
index eb6482401f764..149b0cb4e052d 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
@@ -4,7 +4,7 @@
declare amdgpu_gfx_whole_wave i32 @good_callee(i1 %active, i32 %x, i32 %y, i32 inreg %c)
-define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr) {
+define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr) #0 {
; DAGISEL-LABEL: basic_test:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -22,9 +22,9 @@ define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr)
; DAGISEL-NEXT: s_clause 0x1
; DAGISEL-NEXT: scratch_store_b32 off, v40, s33 offset:4
; DAGISEL-NEXT: scratch_store_b32 off, v41, s33
-; DAGISEL-NEXT: v_writelane_b32 v42, s30, 0
; DAGISEL-NEXT: v_dual_mov_b32 v41, v2 :: v_dual_mov_b32 v40, v1
; DAGISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
+; DAGISEL-NEXT: v_writelane_b32 v42, s30, 0
; DAGISEL-NEXT: s_mov_b32 s1, good_callee at abs32@hi
; DAGISEL-NEXT: s_mov_b32 s0, good_callee at abs32@lo
; DAGISEL-NEXT: s_add_co_i32 s32, s32, 16
@@ -65,9 +65,9 @@ define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr)
; GISEL-NEXT: s_clause 0x1
; GISEL-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GISEL-NEXT: scratch_store_b32 off, v41, s33
-; GISEL-NEXT: v_writelane_b32 v42, s30, 0
; GISEL-NEXT: v_dual_mov_b32 v40, v1 :: v_dual_mov_b32 v41, v2
; GISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
+; GISEL-NEXT: v_writelane_b32 v42, s30, 0
; GISEL-NEXT: s_mov_b32 s0, good_callee at abs32@lo
; GISEL-NEXT: s_mov_b32 s1, good_callee at abs32@hi
; GISEL-NEXT: s_add_co_i32 s32, s32, 16
@@ -96,7 +96,7 @@ define amdgpu_gfx void @basic_test(i32 %x, i32 inreg %c, ptr addrspace(1) %ptr)
ret void
}
-define amdgpu_gfx i32 @tail_call_from_gfx(i32 %x, i32 inreg %c) {
+define amdgpu_gfx i32 @tail_call_from_gfx(i32 %x, i32 inreg %c) #0 {
; DAGISEL-LABEL: tail_call_from_gfx:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -127,7 +127,7 @@ define amdgpu_gfx i32 @tail_call_from_gfx(i32 %x, i32 inreg %c) {
ret i32 %ret
}
-define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x, i32 inreg %c) {
+define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x, i32 inreg %c) #0 {
; DAGISEL-LABEL: tail_call_from_whole_wave:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -138,291 +138,152 @@ define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x,
; DAGISEL-NEXT: s_xor_saveexec_b32 s0, -1
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v0, s32
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v1, s32 offset:4
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v2, s32 offset:8
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v3, s32 offset:12
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v6, s32 offset:24
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v7, s32 offset:28
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v8, s32 offset:32
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v9, s32 offset:36
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v10, s32 offset:40
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v11, s32 offset:44
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v12, s32 offset:48
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v13, s32 offset:52
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v14, s32 offset:56
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v15, s32 offset:60
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v16, s32 offset:64
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v17, s32 offset:68
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v18, s32 offset:72
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v19, s32 offset:76
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v20, s32 offset:80
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v21, s32 offset:84
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v22, s32 offset:88
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v23, s32 offset:92
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v24, s32 offset:96
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v25, s32 offset:100
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v26, s32 offset:104
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v27, s32 offset:108
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v28, s32 offset:112
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v29, s32 offset:116
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v30, s32 offset:120
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v31, s32 offset:124
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v32, s32 offset:128
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v33, s32 offset:132
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v34, s32 offset:136
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v35, s32 offset:140
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v36, s32 offset:144
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v37, s32 offset:148
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v38, s32 offset:152
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v39, s32 offset:156
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v48, s32 offset:160
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v49, s32 offset:164
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v50, s32 offset:168
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v51, s32 offset:172
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v52, s32 offset:176
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v53, s32 offset:180
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v54, s32 offset:184
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v55, s32 offset:188
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v64, s32 offset:192
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v65, s32 offset:196
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v66, s32 offset:200
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v67, s32 offset:204
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v68, s32 offset:208
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v69, s32 offset:212
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v70, s32 offset:216
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v71, s32 offset:220
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v80, s32 offset:224
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v81, s32 offset:228
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v82, s32 offset:232
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v83, s32 offset:236
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v84, s32 offset:240
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v85, s32 offset:244
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v86, s32 offset:248
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v87, s32 offset:252
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v96, s32 offset:256
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v97, s32 offset:260
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v98, s32 offset:264
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v99, s32 offset:268
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v100, s32 offset:272
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v101, s32 offset:276
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v102, s32 offset:280
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v103, s32 offset:284
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v112, s32 offset:288
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v113, s32 offset:292
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v114, s32 offset:296
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v115, s32 offset:300
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v116, s32 offset:304
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v117, s32 offset:308
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v118, s32 offset:312
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v119, s32 offset:316
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v128, s32 offset:320
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v129, s32 offset:324
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v130, s32 offset:328
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v131, s32 offset:332
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v132, s32 offset:336
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v133, s32 offset:340
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v134, s32 offset:344
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v135, s32 offset:348
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v144, s32 offset:352
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v145, s32 offset:356
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v146, s32 offset:360
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v147, s32 offset:364
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v148, s32 offset:368
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v149, s32 offset:372
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v150, s32 offset:376
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v151, s32 offset:380
; DAGISEL-NEXT: s_clause 0x1f
; DAGISEL-NEXT: scratch_store_b32 off, v160, s32 offset:384
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v161, s32 offset:388
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v162, s32 offset:392
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v163, s32 offset:396
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v164, s32 offset:400
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v165, s32 offset:404
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v166, s32 offset:408
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v167, s32 offset:412
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v176, s32 offset:416
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v177, s32 offset:420
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v178, s32 offset:424
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v179, s32 offset:428
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v180, s32 offset:432
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v181, s32 offset:436
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v182, s32 offset:440
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v183, s32 offset:444
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v192, s32 offset:448
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v193, s32 offset:452
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v194, s32 offset:456
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v195, s32 offset:460
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v196, s32 offset:464
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v197, s32 offset:468
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v198, s32 offset:472
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v199, s32 offset:476
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v208, s32 offset:480
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v209, s32 offset:484
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v210, s32 offset:488
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v211, s32 offset:492
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v212, s32 offset:496
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v213, s32 offset:500
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v214, s32 offset:504
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v215, s32 offset:508
; DAGISEL-NEXT: s_clause 0xf
; DAGISEL-NEXT: scratch_store_b32 off, v224, s32 offset:512
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v225, s32 offset:516
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v226, s32 offset:520
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v227, s32 offset:524
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v228, s32 offset:528
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v229, s32 offset:532
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v230, s32 offset:536
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v231, s32 offset:540
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v240, s32 offset:544
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v241, s32 offset:548
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v242, s32 offset:552
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v243, s32 offset:556
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v244, s32 offset:560
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v245, s32 offset:564
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v246, s32 offset:568
-; DAGISEL-NEXT: ; meta instruction
; DAGISEL-NEXT: scratch_store_b32 off, v247, s32 offset:572
; DAGISEL-NEXT: s_mov_b32 exec_lo, -1
; DAGISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
@@ -592,291 +453,152 @@ define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x,
; GISEL-NEXT: s_xor_saveexec_b32 s0, -1
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v0, s32
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v1, s32 offset:4
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v2, s32 offset:8
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v3, s32 offset:12
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v4, s32 offset:16
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v5, s32 offset:20
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v6, s32 offset:24
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v7, s32 offset:28
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v8, s32 offset:32
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v9, s32 offset:36
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v10, s32 offset:40
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v11, s32 offset:44
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v12, s32 offset:48
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v13, s32 offset:52
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v14, s32 offset:56
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v15, s32 offset:60
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v16, s32 offset:64
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v17, s32 offset:68
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v18, s32 offset:72
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v19, s32 offset:76
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v20, s32 offset:80
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v21, s32 offset:84
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v22, s32 offset:88
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v23, s32 offset:92
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v24, s32 offset:96
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v25, s32 offset:100
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v26, s32 offset:104
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v27, s32 offset:108
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v28, s32 offset:112
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v29, s32 offset:116
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v30, s32 offset:120
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v31, s32 offset:124
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v32, s32 offset:128
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v33, s32 offset:132
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v34, s32 offset:136
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v35, s32 offset:140
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v36, s32 offset:144
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v37, s32 offset:148
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v38, s32 offset:152
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v39, s32 offset:156
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v48, s32 offset:160
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v49, s32 offset:164
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v50, s32 offset:168
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v51, s32 offset:172
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v52, s32 offset:176
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v53, s32 offset:180
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v54, s32 offset:184
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v55, s32 offset:188
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v64, s32 offset:192
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v65, s32 offset:196
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v66, s32 offset:200
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v67, s32 offset:204
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v68, s32 offset:208
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v69, s32 offset:212
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v70, s32 offset:216
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v71, s32 offset:220
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v80, s32 offset:224
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v81, s32 offset:228
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v82, s32 offset:232
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v83, s32 offset:236
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v84, s32 offset:240
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v85, s32 offset:244
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v86, s32 offset:248
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v87, s32 offset:252
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v96, s32 offset:256
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v97, s32 offset:260
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v98, s32 offset:264
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v99, s32 offset:268
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v100, s32 offset:272
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v101, s32 offset:276
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v102, s32 offset:280
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v103, s32 offset:284
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v112, s32 offset:288
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v113, s32 offset:292
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v114, s32 offset:296
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v115, s32 offset:300
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v116, s32 offset:304
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v117, s32 offset:308
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v118, s32 offset:312
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v119, s32 offset:316
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v128, s32 offset:320
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v129, s32 offset:324
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v130, s32 offset:328
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v131, s32 offset:332
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v132, s32 offset:336
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v133, s32 offset:340
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v134, s32 offset:344
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v135, s32 offset:348
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v144, s32 offset:352
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v145, s32 offset:356
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v146, s32 offset:360
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v147, s32 offset:364
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v148, s32 offset:368
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v149, s32 offset:372
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v150, s32 offset:376
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v151, s32 offset:380
; GISEL-NEXT: s_clause 0x1f
; GISEL-NEXT: scratch_store_b32 off, v160, s32 offset:384
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v161, s32 offset:388
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v162, s32 offset:392
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v163, s32 offset:396
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v164, s32 offset:400
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v165, s32 offset:404
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v166, s32 offset:408
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v167, s32 offset:412
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v176, s32 offset:416
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v177, s32 offset:420
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v178, s32 offset:424
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v179, s32 offset:428
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v180, s32 offset:432
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v181, s32 offset:436
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v182, s32 offset:440
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v183, s32 offset:444
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v192, s32 offset:448
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v193, s32 offset:452
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v194, s32 offset:456
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v195, s32 offset:460
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v196, s32 offset:464
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v197, s32 offset:468
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v198, s32 offset:472
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v199, s32 offset:476
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v208, s32 offset:480
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v209, s32 offset:484
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v210, s32 offset:488
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v211, s32 offset:492
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v212, s32 offset:496
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v213, s32 offset:500
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v214, s32 offset:504
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v215, s32 offset:508
; GISEL-NEXT: s_clause 0xf
; GISEL-NEXT: scratch_store_b32 off, v224, s32 offset:512
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v225, s32 offset:516
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v226, s32 offset:520
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v227, s32 offset:524
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v228, s32 offset:528
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v229, s32 offset:532
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v230, s32 offset:536
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v231, s32 offset:540
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v240, s32 offset:544
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v241, s32 offset:548
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v242, s32 offset:552
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v243, s32 offset:556
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v244, s32 offset:560
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v245, s32 offset:564
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v246, s32 offset:568
-; GISEL-NEXT: ; meta instruction
; GISEL-NEXT: scratch_store_b32 off, v247, s32 offset:572
; GISEL-NEXT: s_mov_b32 exec_lo, -1
; GISEL-NEXT: v_add_nc_u32_e32 v1, 13, v0
@@ -1042,7 +764,7 @@ define amdgpu_gfx_whole_wave i32 @tail_call_from_whole_wave(i1 %active, i32 %x,
declare amdgpu_gfx_whole_wave void @void_callee(i1 %active, i32 %x)
-define amdgpu_gfx void @ret_void(i32 %x) {
+define amdgpu_gfx void @ret_void(i32 %x) #0 {
; DAGISEL-LABEL: ret_void:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1057,10 +779,10 @@ define amdgpu_gfx void @ret_void(i32 %x) {
; DAGISEL-NEXT: s_wait_alu 0xfffe
; DAGISEL-NEXT: s_mov_b32 exec_lo, s1
; DAGISEL-NEXT: v_writelane_b32 v40, s0, 2
-; DAGISEL-NEXT: v_writelane_b32 v40, s30, 0
; DAGISEL-NEXT: s_mov_b32 s1, void_callee at abs32@hi
; DAGISEL-NEXT: s_mov_b32 s0, void_callee at abs32@lo
; DAGISEL-NEXT: s_add_co_i32 s32, s32, 16
+; DAGISEL-NEXT: v_writelane_b32 v40, s30, 0
; DAGISEL-NEXT: v_writelane_b32 v40, s31, 1
; DAGISEL-NEXT: s_wait_alu 0xfffe
; DAGISEL-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1092,10 +814,10 @@ define amdgpu_gfx void @ret_void(i32 %x) {
; GISEL-NEXT: s_wait_alu 0xfffe
; GISEL-NEXT: s_mov_b32 exec_lo, s1
; GISEL-NEXT: v_writelane_b32 v40, s0, 2
-; GISEL-NEXT: v_writelane_b32 v40, s30, 0
; GISEL-NEXT: s_mov_b32 s0, void_callee at abs32@lo
; GISEL-NEXT: s_mov_b32 s1, void_callee at abs32@hi
; GISEL-NEXT: s_add_co_i32 s32, s32, 16
+; GISEL-NEXT: v_writelane_b32 v40, s30, 0
; GISEL-NEXT: v_writelane_b32 v40, s31, 1
; GISEL-NEXT: s_wait_alu 0xfffe
; GISEL-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1116,3 +838,4 @@ define amdgpu_gfx void @ret_void(i32 %x) {
ret void
}
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
index 4c5c56a49fdc6..f6ec2f4c2d4e1 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
@@ -8,7 +8,7 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -verify-machineinstrs=0 < %s | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -verify-machineinstrs=0 < %s | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
-define <32 x float> @bitcast_v32i32_to_v32f32(<32 x i32> %a, i32 %b) {
+define <32 x float> @bitcast_v32i32_to_v32f32(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -227,7 +227,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v32i32_to_v32f32_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v32i32_to_v32f32_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -547,7 +547,7 @@ end:
ret <32 x float> %phi
}
-define <32 x i32> @bitcast_v32f32_to_v32i32(<32 x float> %a, i32 %b) {
+define <32 x i32> @bitcast_v32f32_to_v32i32(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -750,7 +750,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v32f32_to_v32i32_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v32f32_to_v32i32_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1054,7 +1054,7 @@ end:
ret <32 x i32> %phi
}
-define <16 x i64> @bitcast_v32i32_to_v16i64(<32 x i32> %a, i32 %b) {
+define <16 x i64> @bitcast_v32i32_to_v16i64(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1273,7 +1273,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v32i32_to_v16i64_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v32i32_to_v16i64_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1593,7 +1593,7 @@ end:
ret <16 x i64> %phi
}
-define <32 x i32> @bitcast_v16i64_to_v32i32(<16 x i64> %a, i32 %b) {
+define <32 x i32> @bitcast_v16i64_to_v32i32(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1820,7 +1820,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v16i64_to_v32i32_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v16i64_to_v32i32_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2148,7 +2148,7 @@ end:
ret <32 x i32> %phi
}
-define <16 x double> @bitcast_v32i32_to_v16f64(<32 x i32> %a, i32 %b) {
+define <16 x double> @bitcast_v32i32_to_v16f64(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2367,7 +2367,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v32i32_to_v16f64_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v32i32_to_v16f64_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2687,7 +2687,7 @@ end:
ret <16 x double> %phi
}
-define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) {
+define <32 x i32> @bitcast_v16f64_to_v32i32(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2842,7 +2842,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v16f64_to_v32i32_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v16f64_to_v32i32_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -3101,7 +3101,7 @@ end:
ret <32 x i32> %phi
}
-define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) {
+define <128 x i8> @bitcast_v32i32_to_v128i8(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -7454,7 +7454,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -10748,11 +10748,28 @@ define inreg <128 x i8> @bitcast_v32i32_to_v128i8_scalar(<32 x i32> inreg %a, i3
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
+<<<<<<< HEAD
; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
; GFX11-NEXT: scratch_store_b32 off, v34, s32
; GFX11-NEXT: scratch_store_b32 off, v35, s32 offset:4
; GFX11-NEXT: scratch_store_b32 off, v36, s32 offset:8
; GFX11-NEXT: scratch_store_b32 off, v37, s32 offset:12
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v16, s32
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v17, s32 offset:4
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v18, s32 offset:8
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v19, s32 offset:12
+=======
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v16, s32
+; GFX11-NEXT: scratch_store_b32 off, v17, s32 offset:4
+; GFX11-NEXT: scratch_store_b32 off, v18, s32 offset:8
+; GFX11-NEXT: scratch_store_b32 off, v19, s32 offset:12
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-NEXT: s_mov_b32 exec_lo, s4
; GFX11-NEXT: v_writelane_b32 v34, s30, 0
; GFX11-NEXT: v_writelane_b32 v35, s96, 0
@@ -11734,7 +11751,7 @@ end:
ret <128 x i8> %phi
}
-define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) {
+define <32 x i32> @bitcast_v128i8_to_v32i32(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -17512,7 +17529,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v128i8_to_v32i32_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -22670,7 +22687,7 @@ end:
ret <32 x i32> %phi
}
-define <64 x bfloat> @bitcast_v32i32_to_v64bf16(<32 x i32> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v32i32_to_v64bf16(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -23571,7 +23588,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v32i32_to_v64bf16_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -24457,7 +24474,7 @@ end:
ret <64 x bfloat> %phi
}
-define <32 x i32> @bitcast_v64bf16_to_v32i32(<64 x bfloat> %a, i32 %b) {
+define <32 x i32> @bitcast_v64bf16_to_v32i32(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -27431,7 +27448,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v64bf16_to_v32i32_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -30899,7 +30916,7 @@ end:
ret <32 x i32> %phi
}
-define <64 x half> @bitcast_v32i32_to_v64f16(<32 x i32> %a, i32 %b) {
+define <64 x half> @bitcast_v32i32_to_v64f16(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -31861,7 +31878,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v32i32_to_v64f16_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -32733,7 +32750,7 @@ end:
ret <64 x half> %phi
}
-define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) {
+define <32 x i32> @bitcast_v64f16_to_v32i32(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -33747,7 +33764,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v64f16_to_v32i32_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -34719,7 +34736,7 @@ end:
ret <32 x i32> %phi
}
-define <64 x i16> @bitcast_v32i32_to_v64i16(<32 x i32> %a, i32 %b) {
+define <64 x i16> @bitcast_v32i32_to_v64i16(<32 x i32> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -35277,7 +35294,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v32i32_to_v64i16_scalar(<32 x i32> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32i32_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -35976,7 +35993,7 @@ end:
ret <64 x i16> %phi
}
-define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) {
+define <32 x i32> @bitcast_v64i16_to_v32i32(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v32i32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -36781,7 +36798,7 @@ end:
ret <32 x i32> %phi
}
-define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <32 x i32> @bitcast_v64i16_to_v32i32_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v32i32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -37649,7 +37666,7 @@ end:
ret <32 x i32> %phi
}
-define <16 x i64> @bitcast_v32f32_to_v16i64(<32 x float> %a, i32 %b) {
+define <16 x i64> @bitcast_v32f32_to_v16i64(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -37852,7 +37869,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v32f32_to_v16i64_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v32f32_to_v16i64_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -38156,7 +38173,7 @@ end:
ret <16 x i64> %phi
}
-define <32 x float> @bitcast_v16i64_to_v32f32(<16 x i64> %a, i32 %b) {
+define <32 x float> @bitcast_v16i64_to_v32f32(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -38383,7 +38400,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v16i64_to_v32f32_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v16i64_to_v32f32_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -38711,7 +38728,7 @@ end:
ret <32 x float> %phi
}
-define <16 x double> @bitcast_v32f32_to_v16f64(<32 x float> %a, i32 %b) {
+define <16 x double> @bitcast_v32f32_to_v16f64(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -38914,7 +38931,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v32f32_to_v16f64_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v32f32_to_v16f64_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -39218,7 +39235,7 @@ end:
ret <16 x double> %phi
}
-define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) {
+define <32 x float> @bitcast_v16f64_to_v32f32(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -39373,7 +39390,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v16f64_to_v32f32_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v16f64_to_v32f32_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -39632,7 +39649,7 @@ end:
ret <32 x float> %phi
}
-define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) {
+define <128 x i8> @bitcast_v32f32_to_v128i8(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -43951,7 +43968,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v32f32_to_v128i8_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -48990,7 +49007,7 @@ end:
ret <128 x i8> %phi
}
-define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) {
+define <32 x float> @bitcast_v128i8_to_v32f32(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -54768,7 +54785,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v128i8_to_v32f32_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -59926,7 +59943,7 @@ end:
ret <32 x float> %phi
}
-define <64 x bfloat> @bitcast_v32f32_to_v64bf16(<32 x float> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v32f32_to_v64bf16(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -60811,7 +60828,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v32f32_to_v64bf16_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -61750,7 +61767,7 @@ end:
ret <64 x bfloat> %phi
}
-define <32 x float> @bitcast_v64bf16_to_v32f32(<64 x bfloat> %a, i32 %b) {
+define <32 x float> @bitcast_v64bf16_to_v32f32(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -64724,7 +64741,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v64bf16_to_v32f32_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -68192,7 +68209,7 @@ end:
ret <32 x float> %phi
}
-define <64 x half> @bitcast_v32f32_to_v64f16(<32 x float> %a, i32 %b) {
+define <64 x half> @bitcast_v32f32_to_v64f16(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -69138,7 +69155,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v32f32_to_v64f16_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -70150,7 +70167,7 @@ end:
ret <64 x half> %phi
}
-define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) {
+define <32 x float> @bitcast_v64f16_to_v32f32(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -71164,7 +71181,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v64f16_to_v32f32_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -72136,7 +72153,7 @@ end:
ret <32 x float> %phi
}
-define <64 x i16> @bitcast_v32f32_to_v64i16(<32 x float> %a, i32 %b) {
+define <64 x i16> @bitcast_v32f32_to_v64i16(<32 x float> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -72678,7 +72695,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v32f32_to_v64i16_scalar(<32 x float> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v32f32_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -73319,7 +73336,7 @@ end:
ret <64 x i16> %phi
}
-define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) {
+define <32 x float> @bitcast_v64i16_to_v32f32(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v32f32:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -74124,7 +74141,7 @@ end:
ret <32 x float> %phi
}
-define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <32 x float> @bitcast_v64i16_to_v32f32_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v32f32_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -74992,7 +75009,7 @@ end:
ret <32 x float> %phi
}
-define <16 x double> @bitcast_v16i64_to_v16f64(<16 x i64> %a, i32 %b) {
+define <16 x double> @bitcast_v16i64_to_v16f64(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -75219,7 +75236,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v16i64_to_v16f64_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v16i64_to_v16f64_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -75547,7 +75564,7 @@ end:
ret <16 x double> %phi
}
-define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) {
+define <16 x i64> @bitcast_v16f64_to_v16i64(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -75702,7 +75719,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v16f64_to_v16i64_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v16f64_to_v16i64_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -75961,7 +75978,7 @@ end:
ret <16 x i64> %phi
}
-define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) {
+define <128 x i8> @bitcast_v16i64_to_v128i8(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -80330,7 +80347,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -83624,11 +83641,28 @@ define inreg <128 x i8> @bitcast_v16i64_to_v128i8_scalar(<16 x i64> inreg %a, i3
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_xor_saveexec_b32 s4, -1
+<<<<<<< HEAD
; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
; GFX11-NEXT: scratch_store_b32 off, v34, s32
; GFX11-NEXT: scratch_store_b32 off, v35, s32 offset:4
; GFX11-NEXT: scratch_store_b32 off, v36, s32 offset:8
; GFX11-NEXT: scratch_store_b32 off, v37, s32 offset:12
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v16, s32
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v17, s32 offset:4
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v18, s32 offset:8
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v19, s32 offset:12
+=======
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v16, s32
+; GFX11-NEXT: scratch_store_b32 off, v17, s32 offset:4
+; GFX11-NEXT: scratch_store_b32 off, v18, s32 offset:8
+; GFX11-NEXT: scratch_store_b32 off, v19, s32 offset:12
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-NEXT: s_mov_b32 exec_lo, s4
; GFX11-NEXT: v_writelane_b32 v34, s30, 0
; GFX11-NEXT: v_writelane_b32 v35, s96, 0
@@ -84612,7 +84646,7 @@ end:
ret <128 x i8> %phi
}
-define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) {
+define <16 x i64> @bitcast_v128i8_to_v16i64(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -90390,7 +90424,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v128i8_to_v16i64_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -95548,7 +95582,7 @@ end:
ret <16 x i64> %phi
}
-define <64 x bfloat> @bitcast_v16i64_to_v64bf16(<16 x i64> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v16i64_to_v64bf16(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -96458,7 +96492,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v16i64_to_v64bf16_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -97314,7 +97348,7 @@ end:
ret <64 x bfloat> %phi
}
-define <16 x i64> @bitcast_v64bf16_to_v16i64(<64 x bfloat> %a, i32 %b) {
+define <16 x i64> @bitcast_v64bf16_to_v16i64(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -100288,7 +100322,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v64bf16_to_v16i64_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -103756,7 +103790,7 @@ end:
ret <16 x i64> %phi
}
-define <64 x half> @bitcast_v16i64_to_v64f16(<16 x i64> %a, i32 %b) {
+define <64 x half> @bitcast_v16i64_to_v64f16(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -104723,7 +104757,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v16i64_to_v64f16_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -105603,7 +105637,7 @@ end:
ret <64 x half> %phi
}
-define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) {
+define <16 x i64> @bitcast_v64f16_to_v16i64(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -106617,7 +106651,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v64f16_to_v16i64_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -107589,7 +107623,7 @@ end:
ret <16 x i64> %phi
}
-define <64 x i16> @bitcast_v16i64_to_v64i16(<16 x i64> %a, i32 %b) {
+define <64 x i16> @bitcast_v16i64_to_v64i16(<16 x i64> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -108153,7 +108187,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v16i64_to_v64i16_scalar(<16 x i64> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16i64_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -108860,7 +108894,7 @@ end:
ret <64 x i16> %phi
}
-define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) {
+define <16 x i64> @bitcast_v64i16_to_v16i64(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v16i64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -109665,7 +109699,7 @@ end:
ret <16 x i64> %phi
}
-define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <16 x i64> @bitcast_v64i16_to_v16i64_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v16i64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -110533,7 +110567,7 @@ end:
ret <16 x i64> %phi
}
-define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) {
+define <128 x i8> @bitcast_v16f64_to_v128i8(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -114815,7 +114849,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -118308,11 +118342,28 @@ define inreg <128 x i8> @bitcast_v16f64_to_v128i8_scalar(<16 x double> inreg %a,
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-NEXT: s_or_saveexec_b32 s4, -1
+<<<<<<< HEAD
; GFX11-NEXT: s_clause 0x3 ; 16-byte Folded Spill
; GFX11-NEXT: scratch_store_b32 off, v40, s32
; GFX11-NEXT: scratch_store_b32 off, v41, s32 offset:4
; GFX11-NEXT: scratch_store_b32 off, v42, s32 offset:8
; GFX11-NEXT: scratch_store_b32 off, v43, s32 offset:12
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v78, s32 offset:88
+; GFX11-NEXT: ; meta instruction
+; GFX11-NEXT: scratch_store_b32 off, v79, s32 offset:92
+=======
+; GFX11-NEXT: s_clause 0x3
+; GFX11-NEXT: scratch_store_b32 off, v76, s32 offset:80
+; GFX11-NEXT: scratch_store_b32 off, v77, s32 offset:84
+; GFX11-NEXT: scratch_store_b32 off, v78, s32 offset:88
+; GFX11-NEXT: scratch_store_b32 off, v79, s32 offset:92
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-NEXT: s_mov_b32 exec_lo, s4
; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v41, s96, 0
@@ -119279,7 +119330,7 @@ end:
ret <128 x i8> %phi
}
-define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) {
+define <16 x double> @bitcast_v128i8_to_v16f64(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -125057,7 +125108,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v128i8_to_v16f64_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -130215,7 +130266,7 @@ end:
ret <16 x double> %phi
}
-define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v16f64_to_v64bf16(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -131032,7 +131083,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v16f64_to_v64bf16_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -131930,7 +131981,7 @@ end:
ret <64 x bfloat> %phi
}
-define <16 x double> @bitcast_v64bf16_to_v16f64(<64 x bfloat> %a, i32 %b) {
+define <16 x double> @bitcast_v64bf16_to_v16f64(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -134904,7 +134955,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v64bf16_to_v16f64_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -138372,7 +138423,7 @@ end:
ret <16 x double> %phi
}
-define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) {
+define <64 x half> @bitcast_v16f64_to_v64f16(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -139247,7 +139298,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v16f64_to_v64f16_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -140217,7 +140268,7 @@ end:
ret <64 x half> %phi
}
-define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) {
+define <16 x double> @bitcast_v64f16_to_v16f64(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -141231,7 +141282,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v64f16_to_v16f64_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -142203,7 +142254,7 @@ end:
ret <16 x double> %phi
}
-define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) {
+define <64 x i16> @bitcast_v16f64_to_v64i16(<16 x double> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -142697,7 +142748,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v16f64_to_v64i16_scalar(<16 x double> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v16f64_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -143290,7 +143341,7 @@ end:
ret <64 x i16> %phi
}
-define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) {
+define <16 x double> @bitcast_v64i16_to_v16f64(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v16f64:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -144095,7 +144146,7 @@ end:
ret <16 x double> %phi
}
-define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <16 x double> @bitcast_v64i16_to_v16f64_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v16f64_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -144963,7 +145014,7 @@ end:
ret <16 x double> %phi
}
-define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v128i8_to_v64bf16(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -151219,7 +151270,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v128i8_to_v64bf16_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -156679,7 +156730,7 @@ end:
ret <64 x bfloat> %phi
}
-define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) {
+define <128 x i8> @bitcast_v64bf16_to_v128i8(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -164230,7 +164281,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -169673,6 +169724,7 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX9-NEXT: ; implicit-def: $sgpr46
; GFX9-NEXT: s_branch .LBB91_2
;
+<<<<<<< HEAD
; GFX11-LABEL: bitcast_v64bf16_to_v128i8_scalar:
; GFX11: ; %bb.0:
; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -171343,6 +171395,6279 @@ define inreg <128 x i8> @bitcast_v64bf16_to_v128i8_scalar(<64 x bfloat> inreg %a
; GFX11-NEXT: s_mov_b32 exec_lo, s0
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: s_setpc_b64 s[30:31]
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-TRUE16-LABEL: bitcast_v64bf16_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:4
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:8
+; GFX11-TRUE16-NEXT: ; meta instruction
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:12
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s96, 0
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s97, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s34, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s98, 2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s35, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s99, 3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s36, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s100, 4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s37, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s101, 5
+; GFX11-TRUE16-NEXT: s_mov_b32 vcc_hi, 0
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s38, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s102, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s39, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s103, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s48, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s104, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s49, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s50, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s51, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s52, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s53, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s54, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s55, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s64, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s65, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s66, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s67, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s68, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s69, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s70, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s71, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s80, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s81, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s82, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s83, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s84, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s85, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s86, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s87, 31
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_3
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s1, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s0, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s43, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s43, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s43, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s42, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s45, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s45, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s45, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 19
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s44, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s47, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s47, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s47, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s46, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s46, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 20
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s59, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s59, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s59, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 21
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s58, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s58, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s61, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 22
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s61, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s61, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s60, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 23
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s60, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s63, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s63, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s63, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s62, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s62, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s73, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s73, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s73, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 25
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s72, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s72, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s29, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 26
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s29, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s28, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 27
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s28, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[42:43], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 28
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[46:47], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[58:59], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[62:63], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 30
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 31
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s44, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 1
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB91_4
+; GFX11-TRUE16-NEXT: .LBB91_2: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s28, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s78, s28, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s45, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s45, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s43, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s43, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s73, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s73, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s76, s72, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_lshl_b32 s75, s72, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s11, s63, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s74, s63, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s73, s62, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_lshl_b32 s72, s62, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s62, s61, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s63, s61, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s61, s60, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s57, s60, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s59, 0xffff0000
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s56, s59, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s29, s58, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s58, 16
+; GFX11-TRUE16-NEXT: s_bfe_u32 s4, s45, 0x10010
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s47, 0xffff0000
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s4, s45
+; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s47, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s47, s46, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s41, s46, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s44, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s9, s44, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s42, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s42, 16
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s45, 22
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s45, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s78
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s42, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v3, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s1, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s1
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s1, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, s1, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s0, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s77
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s6, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, s42, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v6
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v8, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s0, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s0
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s0, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, s0, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v27.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s76
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s75
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s42, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s3, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s3
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s3, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, s3, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s2, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s74
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v26.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v28.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: s_bfe_u32 s11, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s11, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s11, s42, s11
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s2, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s2
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, s2, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s17, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s73
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v30.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s72
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s17, s17, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s42, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v29.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s17, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s17
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s17, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s17, s17, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s63
+; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s17, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[4:5]
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s16, s16, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s62
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s42, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s16, 0x10010
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s16
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s16, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s16, s16, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s16, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s61
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v33.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s57
+; GFX11-TRUE16-NEXT: s_and_b32 s45, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s19, s19, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s42, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s19, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v32.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s19
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s19, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s19, s19, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s18, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s56
+; GFX11-TRUE16-NEXT: s_lshr_b32 s19, s19, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v34.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s45, s17, s60
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s44, s16, s44
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s40
+; GFX11-TRUE16-NEXT: s_bfe_u32 s40, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s40, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, s42, s40
+; GFX11-TRUE16-NEXT: s_lshl_b32 s18, s18, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s40, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s18, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s18
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s18, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s18, s18, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s18, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s29, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s29
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s29, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s29, s29, s42
+; GFX11-TRUE16-NEXT: s_lshl_b32 s21, s21, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s29, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s42, s2, s11
+; GFX11-TRUE16-NEXT: s_bfe_u32 s21, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v35.l
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s21, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s29, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s14, s21
+; GFX11-TRUE16-NEXT: s_and_b32 s21, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s21, s14, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v36.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s43, s3, s59
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: s_bfe_u32 s12, s13, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, s13
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, s13, s12
+; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s20, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_bfe_u32 s14, s13, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, s13
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s14, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s20, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s13, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s23, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s47
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s20, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s29, s20, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s20, s13, 16
+; GFX11-TRUE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s29
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s23, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s41
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s13, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s23, s14, 0x10010
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s0, s6
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s23, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s23
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s22, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s23, s13, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v38.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s15
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v48.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v7, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s22, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s14, s15
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s25, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s22, s14, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v1.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s9, s10, 0x10010
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, s10
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s10, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s9, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s9, s10, s9
+; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s25, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s9, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s10, s8, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v51.l
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, s8
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s10, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s9, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, s8, s10
+; GFX11-TRUE16-NEXT: s_and_b32 s9, s24, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s25, s8, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v50.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v49.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s1, s58
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s9, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s9
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s9, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-TRUE16-NEXT: s_and_b32 s8, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s7, s9, s7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v53.l
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: s_bfe_u32 s5, s8, 0x10010
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v9
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, s8
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s5, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s7, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s5, s8, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s27, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s24, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s4, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s4
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s4, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, s4, s7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s4, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.l, v54.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s5, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v52.l
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s5, 22
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s22, s13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, s5, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s26, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshr_b32 s27, s4, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.l, v55.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[20:21]
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[16:17]
+; GFX11-TRUE16-NEXT: s_bfe_u32 s6, s5, 0x10010
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s23, s63
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, s5
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s5, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s6, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s5, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s26, 16
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s20, s12
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s14, 16
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s19, s61
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s4, s18, s40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v65
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[2:3], 24, v[68:69]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v65
+; GFX11-TRUE16-NEXT: s_bfe_u32 s12, s11, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v64
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, s11
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s11, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, s11, s12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v64
+; GFX11-TRUE16-NEXT: s_lshr_b32 s26, s12, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 24, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 24, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s21, s62
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s25, s72
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s27, s73
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s26, s13
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s24, s10
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[44:45], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[42:43], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[46:47], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[34:35], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s47, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s47, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s46, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s46, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s45, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s45, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s44, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s44, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s43, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s43, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s42, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s29, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-TRUE16-NEXT: s_branch .LBB91_5
+; GFX11-TRUE16-NEXT: .LBB91_3:
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s5, 1
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s5, 3
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s74, 4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s75, 5
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s74, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s75, 7
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: s_branch .LBB91_2
+; GFX11-TRUE16-NEXT: .LBB91_4:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s94 :: v_dual_mov_b32 v14, s30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s94, v43, 2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s37 :: v_dual_mov_b32 v87, s34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s49 :: v_dual_mov_b32 v5, s35
+; GFX11-TRUE16-NEXT: v_readlane_b32 s95, v43, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 vcc_lo, v43, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v43, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v43, 4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s42 :: v_dual_mov_b32 v54, s43
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s10 :: v_dual_mov_b32 v53, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s45 :: v_dual_mov_b32 v49, s98
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s46 :: v_dual_mov_b32 v38, s47
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s97 :: v_dual_mov_b32 v39, s58
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s59 :: v_dual_mov_b32 v36, s60
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s9 :: v_dual_mov_b32 v32, s61
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s8 :: v_dual_mov_b32 v33, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s63 :: v_dual_mov_b32 v30, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s96 :: v_dual_mov_b32 v26, s73
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v27, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s29 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s87 :: v_dual_mov_b32 v64, s86
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s85 :: v_dual_mov_b32 v10, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v68, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s81 :: v_dual_mov_b32 v66, s84
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s83 :: v_dual_mov_b32 v69, s70
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s82 :: v_dual_mov_b32 v23, s80
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s71 :: v_dual_mov_b32 v71, s66
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s39 :: v_dual_mov_b32 v21, s69
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s68 :: v_dual_mov_b32 v81, s55
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s67 :: v_dual_mov_b32 v19, s65
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s38 :: v_dual_mov_b32 v83, s51
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s64 :: v_dual_mov_b32 v17, s54
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s53 :: v_dual_mov_b32 v11, s52
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v12, s50
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s74 :: v_dual_mov_b32 v2, s76
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s78 :: v_dual_mov_b32 v7, s88
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s90 :: v_dual_mov_b32 v9, s92
+; GFX11-TRUE16-NEXT: s_mov_b32 s58, s11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s59, v43, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s60, v43, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s61, v43, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s62, v43, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s63, v43, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s72, v43, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s73, v43, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s13, v43, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s15, v43, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s41, v43, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s46, v43, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s47, v43, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s11, v43, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s57, v43, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s10, v43, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s74, v43, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s9, v43, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s75, v43, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s8, v43, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s76, v43, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s77, v43, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s78, v43, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s79, v43, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s88, v43, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s89, v42, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s90, v42, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s91, v42, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s92, v42, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s45, v42, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s93, v42, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 vcc_hi, v43, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s44, v42, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v43, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s95, v42, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s43, v42, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v43, 5
+; GFX11-TRUE16-NEXT: .LBB91_5: ; %end
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s104, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s103, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s56, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s102, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s58, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s101, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s100, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s99, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s40, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s43, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s59, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s95, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s44, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s93, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s14, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s17, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s45, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s60, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s92, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s18, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s91, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s90, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s12, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s19, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s89, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s61, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s88, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v113, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_mov_b32 v115, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s79, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s78, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s30, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s21, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s77, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s62, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s76, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s22, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s8, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s75, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s94, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s23, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s9, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s63, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s74, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[97:100], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s10, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s57, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s34, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s11, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s25, 0xff
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s72, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s47, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s26, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s46, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s41, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, vcc_lo, 8
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s15, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s27, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s13, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s73, 0xff
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s5, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_and_b32 v27, 0xff, v27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s1 :: v_dual_lshlrev_b32 v4, 8, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 8, v14
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_and_b32 v96, 0xff, v96
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v27, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_lshlrev_b32 v5, 8, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v96, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 8, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 8, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 8, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v4, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xff, v24
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v87
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xff, v30
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xff, v86
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v26, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v14, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v25, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v30, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v85
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xff, v33
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v84
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v29
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v31
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v83
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v26, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v28, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v29, v30
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v11, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v12, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v16, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v17, v24
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 8, v18
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xff, v82
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 8, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xff, v32
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 8, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v81
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xff, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 8, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v18, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v80
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 8, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v35
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xff, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 8, v71
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xff, v51
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 8, v22
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xff, v70
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v14, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v20, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v22, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 8, v23
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v48
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v69
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xff, v53
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 8, v68
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xff, v67
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xff, v50
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 8, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v19, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 8, v65
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xff, v55
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v49
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 8, v64
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v21, 0xff, v54
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xff, v52
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v21, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v22, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v18, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v10, v3
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[97:100], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[4:7], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:112
+; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v41, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v41, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v41, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v41, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v41, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v41, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v41, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v41, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v41, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v40, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v40, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v40, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v40, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v40, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v40, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v40, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v40, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v40, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v40, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v40, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v40, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v40, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v40, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v40, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v40, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v40, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v40, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v40, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v40, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v40, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v40, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v40, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v40, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v40, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v40, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v40, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v40, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v40, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v40, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:12
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v64bf16_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:4
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:8
+; GFX11-FAKE16-NEXT: ; meta instruction
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s96, 0
+; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s97, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s98, 2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s99, 3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s100, 4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s101, 5
+; GFX11-FAKE16-NEXT: s_mov_b32 vcc_hi, 0
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s102, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s103, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s104, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s49, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s50, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s51, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s52, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s53, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s54, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s55, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s64, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s65, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s66, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s67, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s68, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s69, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s70, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s71, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s80, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s81, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s82, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s83, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s84, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s85, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s86, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s87, 31
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_3
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s0, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s45, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s45, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s45, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s44, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s47, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s47, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s46, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s57, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s57, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s57, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s56, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s59, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s59, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s58, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s61, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s61, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s60, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s60, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s63, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s63, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s63, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s62, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s73, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s73, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s72, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s29, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s28, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[46:47], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[56:57], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[58:59], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[62:63], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s18, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s18, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s46, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
+; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB91_4
+; GFX11-FAKE16-NEXT: .LBB91_2: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s29, 0xffff0000
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s47, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s47, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s29, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s45, 0xffff0000
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s45, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s28, 0xffff0000
+; GFX11-FAKE16-NEXT: s_bfe_u32 s6, s47, 0x10010
+; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s28, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s6, s47
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s73, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s73, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s75, s72, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s76, s72, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s11, s63, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s74, s63, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s72, s62, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s73, s62, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s63, s61, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s62, s61, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s61, s60, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s60, s60, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s41, s59, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s40, s59, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s28, s58, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s29, s58, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s13, s57, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s57, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s56, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s43, s56, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s46, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s46, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s44, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s47, 22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s47, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s78
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s1, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s79
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s1, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v6, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s1
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s1, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s0, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v6
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v21
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s77
+; GFX11-FAKE16-NEXT: s_bfe_u32 s5, s0, 0x10010
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v22, 16, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s5, s0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s0, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s3, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v23
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v2, 16, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s76
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s75
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s3, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v4, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s3, 0x10010
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s3
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s3, 22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v4
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s3, s3, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v24
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s74
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v25, 16, v5
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s2, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s11, s2, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s11, s2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s17, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v26
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v2, 16, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v10, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s17, s17, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s73
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s17
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s72
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s17, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s44, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s17, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v27
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s17
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s17, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v28, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX11-FAKE16-NEXT: s_cselect_b32 s17, s17, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s16, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s17, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s63
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 24, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v5, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v29
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v8, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s16, s16, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s16, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s62
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s16, 0x10010
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s16
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s16, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s19, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v1, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s16, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s60
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v4
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s61
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s47, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s19, s19, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s44, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s19, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v9, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s19, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s19
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s19, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s19, s19, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s19, s19, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s29
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s41
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s47, s17, s72
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s44, s41, 0x10010
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, s41
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s41, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s44, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s40
+; GFX11-FAKE16-NEXT: s_and_b32 s45, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s41, s41, s44
+; GFX11-FAKE16-NEXT: s_lshl_b32 s18, s18, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v31
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v32
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v30, 16, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s18, v5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v1, 16, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s40, s18, 0x10010
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: s_add_i32 s44, s40, s18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s41, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s44, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s18, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s41, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s18, s18, s44
+; GFX11-FAKE16-NEXT: s_and_b32 s41, s21, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s41
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s18, 16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s28, v5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v10, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s29, s28, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, s28
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s28, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s41, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s28, s28, s29
+; GFX11-FAKE16-NEXT: s_lshl_b32 s21, s21, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s44, s2, s11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s21, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s29, s21, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, s21
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s21, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s28, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s21, s21, s29
+; GFX11-FAKE16-NEXT: s_and_b32 s28, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s21, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s45, s3, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s46, s16, s46
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_bfe_u32 s28, s13, 0x10010
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v34
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, s13
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s29, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s13, s28
+; GFX11-FAKE16-NEXT: s_lshl_b32 s20, s20, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v3, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v33, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v35
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s20, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v3
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v2, 16, v9
+; GFX11-FAKE16-NEXT: s_bfe_u32 s10, s20, 0x10010
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s10, s20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s13, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s20, 22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v3
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s20, s28
+; GFX11-FAKE16-NEXT: s_and_b32 s20, s23, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s42
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s43
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s28, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s20, s28, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s20, s28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s13, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s28, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s28, s29
+; GFX11-FAKE16-NEXT: s_lshl_b32 s23, s23, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s13, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s23, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s28, s23, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, s23
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s23, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s23, s28
+; GFX11-FAKE16-NEXT: s_and_b32 s23, s22, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v36
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s13, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v71, v37, 16, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s14, s15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s22, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v38
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v70, v2, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v9
+; GFX11-FAKE16-NEXT: s_bfe_u32 s12, s14, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, s14
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s15, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s12, s14, s12
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s25, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s12, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s14, s9, 0x10010
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, s9
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s9, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s14, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-FAKE16-NEXT: s_and_b32 s12, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s9, s9, s14
+; GFX11-FAKE16-NEXT: s_lshl_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s9, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s12, s8, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, s8
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s9, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_cselect_b32 s8, s8, s12
+; GFX11-FAKE16-NEXT: s_and_b32 s9, s24, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s8, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v12, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s0, s5
+; GFX11-FAKE16-NEXT: s_bfe_u32 s9, s7, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, s7
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s7, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s9, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s8, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s7, s7, s9
+; GFX11-FAKE16-NEXT: s_lshl_b32 s8, s24, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s7, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s4, s8, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, s8
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s4, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s6, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s8, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s27, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v52, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v10, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s4, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v52
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s7, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s6, s7
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v4, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s4, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v51
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v1, 16, v11
+; GFX11-FAKE16-NEXT: s_bfe_u32 s7, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s26, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s4, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v52
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v39
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v55, v50, 16, v4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s22, s13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v54, v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v48, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[17:18]
+; GFX11-FAKE16-NEXT: s_bfe_u32 s5, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[15:16]
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s5, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s14, s6, s5
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s26, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s20, s10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s14, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[6:7]
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s1, s58
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[54:55]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[2:3], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[70:71]
+; GFX11-FAKE16-NEXT: s_bfe_u32 s10, s11, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[4:5], 24, v[19:20]
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, s11
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s11, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s10, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s10, s11, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s19, s60
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s10, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s18, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s23, s62
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 24, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 24, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s21, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s25, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s57, s27, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s56, s26, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s24, s12
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[46:47], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[44:45], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[56:57], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[34:35], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s57, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s57, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s56, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s47, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s47, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s46, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s45, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s45, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s44, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB91_5
+; GFX11-FAKE16-NEXT: .LBB91_3:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s5, 1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s5, 3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s74, 4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s75, 5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s74, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s75, 7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: s_branch .LBB91_2
+; GFX11-FAKE16-NEXT: .LBB91_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s94 :: v_dual_mov_b32 v11, s30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s94, v43, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s37 :: v_dual_mov_b32 v87, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s49 :: v_dual_mov_b32 v7, s35
+; GFX11-FAKE16-NEXT: v_readlane_b32 s95, v43, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 vcc_lo, v43, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v43, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v43, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s44 :: v_dual_mov_b32 v51, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v49, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s47 :: v_dual_mov_b32 v48, s98
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s56 :: v_dual_mov_b32 v37, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s57 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s59 :: v_dual_mov_b32 v33, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s60 :: v_dual_mov_b32 v31, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s8 :: v_dual_mov_b32 v29, s62
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s63 :: v_dual_mov_b32 v28, s96
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s72 :: v_dual_mov_b32 v25, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s73 :: v_dual_mov_b32 v23, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v22, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s87 :: v_dual_mov_b32 v54, s86
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s85 :: v_dual_mov_b32 v12, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s4 :: v_dual_mov_b32 v66, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s81 :: v_dual_mov_b32 v64, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s83 :: v_dual_mov_b32 v70, s82
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s70 :: v_dual_mov_b32 v68, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s71 :: v_dual_mov_b32 v19, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s66 :: v_dual_mov_b32 v20, s69
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s68 :: v_dual_mov_b32 v17, s67
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s55 :: v_dual_mov_b32 v18, s65
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s38 :: v_dual_mov_b32 v15, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s51 :: v_dual_mov_b32 v16, s54
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s53 :: v_dual_mov_b32 v13, s52
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v14, s50
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s74 :: v_dual_mov_b32 v2, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s78 :: v_dual_mov_b32 v4, s88
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s90 :: v_dual_mov_b32 v9, s92
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, s11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s59, v43, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s72, v43, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s60, v43, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s61, v43, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s62, v43, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s63, v43, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v43, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s13, v43, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s15, v43, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s41, v43, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s43, v43, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s56, v43, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s11, v43, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s57, v43, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s10, v43, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s74, v43, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s9, v43, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s75, v43, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s8, v43, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s76, v43, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s77, v43, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s78, v43, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s79, v43, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s88, v43, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s89, v42, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s90, v42, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s91, v42, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s92, v42, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s47, v42, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s93, v42, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 vcc_hi, v43, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s46, v42, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v43, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s95, v42, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s45, v42, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v43, 5
+; GFX11-FAKE16-NEXT: .LBB91_5: ; %end
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s104, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s103, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s42, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s102, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s58, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s101, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s100, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s99, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s40, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s45, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s59, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s95, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s46, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s93, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s14, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s17, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s47, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s72, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s92, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s18, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s91, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s90, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s12, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s19, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s89, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s60, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s88, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v113, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_mov_b32 v115, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s79, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s78, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s30, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s21, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s77, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s61, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s76, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s22, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s8, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s75, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s94, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s23, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s9, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s62, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s74, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[97:100], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s10, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s57, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s34, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s11, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s25, 0xff
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s63, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s56, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s26, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s43, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s41, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, vcc_lo, 8
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s15, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s27, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s13, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s73, 0xff
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s5, s6
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_and_b32 v23, 0xff, v23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v113, s1 :: v_dual_lshlrev_b32 v6, 8, v6
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_lshlrev_b32 v11, 8, v11
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_and_b32 v96, 0xff, v96
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v23, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 8, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 8, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v96, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v24
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 8, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v6, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v21
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v22
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 8, v87
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v26
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v86
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v11, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v22, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v26, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v24, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v25
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 8, v85
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v29
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v84
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xff, v27
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v28
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v83
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v22, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v24, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v26, v27
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v11, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v13, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v15, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v16, v21
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xff, v32
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v17
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v82
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v31
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v30
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v81
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xff, v35
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 8, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v11, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v80
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v34
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xff, v33
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 8, v71
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xff, v38
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 8, v70
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xff, v69
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v14, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v21, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v13, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v36
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 8, v68
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v37
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v67
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v49
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v66
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xff, v65
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xff, v39
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 8, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v16, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v18, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v19, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v48
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v55
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xff, v52
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 8, v54
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xff, v53
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xff, v51
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v12
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v50
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v18, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v20, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v21, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v22, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v10, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v11, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v17, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v12, v5
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[97:100], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[23:26], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v41, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v41, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v41, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v41, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v41, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v41, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v41, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v41, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v41, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v40, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v40, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v40, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v40, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v40, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v40, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v40, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v40, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v40, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v40, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v40, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v40, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v40, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v40, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v40, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v40, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v40, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v40, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v40, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v40, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v40, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v40, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v40, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+=======
+; GFX11-TRUE16-LABEL: bitcast_v64bf16_to_v128i8_scalar:
+; GFX11-TRUE16: ; %bb.0:
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s32
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_store_b32 off, v43, s32 offset:12
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s96, 0
+; GFX11-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v15
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s72, v1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s73, v2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s97, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s63, v4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s34, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s98, 2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s61, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s59, v8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s35, 3
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s99, 3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s46, v9
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s47, v10
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s44, v11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s36, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s100, 4
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v12
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v13
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s43, v14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s37, 5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s101, 5
+; GFX11-TRUE16-NEXT: s_mov_b32 vcc_hi, 0
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr43 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: ; implicit-def: $vgpr42 : SGPR spill to VGPR lane
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s38, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s102, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s39, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s103, 7
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s48, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v41, s104, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s49, 9
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s50, 10
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s51, 11
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s52, 12
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s53, 13
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s54, 14
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s55, 15
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s64, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s65, 17
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s66, 18
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s67, 19
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s68, 20
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s69, 21
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s70, 22
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s71, 23
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s80, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s81, 25
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s82, 26
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s83, 27
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s84, 28
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s85, 29
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s86, 30
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s87, 31
+; GFX11-TRUE16-NEXT: s_cbranch_scc0 .LBB91_3
+; GFX11-TRUE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[26:27], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 15
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s2, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s2, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s1, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s27, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s1, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s0, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s0, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s85, s43, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s43, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 17
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s26, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s5, s43, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s87, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s86, s42, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 18
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s81, s45, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s98, s45, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s84, s45, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 19
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s48, s44, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s70, s47, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s97, s47, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s25, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s80, s47, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s83, s46, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s82, s46, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 20
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s66, s59, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s59, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s69, s59, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 21
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s24, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s71, s58, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s39, s58, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s55, s61, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 22
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s61, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s65, s61, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s68, s60, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 23
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s67, s60, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s51, s63, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s96, s63, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 12
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s23, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s54, s63, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s38, s62, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s64, s62, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s36, s73, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s7, s73, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s50, s73, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 25
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s22, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s53, s72, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s52, s72, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s34, s29, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 26
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s29, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s35, s29, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s37, s28, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 27
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s49, s28, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[2:3], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 11
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s21, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[0:1], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[74:75], s[42:43], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[76:77], s[44:45], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 28
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[78:79], s[46:47], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[88:89], s[58:59], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s20, 8
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[92:93], s[62:63], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 30
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 31
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 10
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s19, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 0
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s18, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 9
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s17, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 5
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s16, 8
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s3, 8
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s4, s44, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 7
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 5
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 3
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s12, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s13, 1
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-TRUE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
+; GFX11-TRUE16-NEXT: s_cbranch_vccnz .LBB91_4
+; GFX11-TRUE16-NEXT: .LBB91_2: ; %cmp.true
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s29, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s29, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s28, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s78, s28, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s45, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s28, s45, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s8, s43, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s43, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s73, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s77, s73, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s76, s72, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_lshl_b32 s75, s72, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s11, s63, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s74, s63, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s73, s62, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_lshl_b32 s72, s62, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s62, s61, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s63, s61, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v24, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v4, v7, vcc_lo
+; GFX11-TRUE16-NEXT: s_and_b32 s61, s60, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s57, s60, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s40, s59, 0xffff0000
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s45, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_lshl_b32 s56, s59, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s29, s58, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s58, 16
+; GFX11-TRUE16-NEXT: s_bfe_u32 s4, s45, 0x10010
+; GFX11-TRUE16-NEXT: s_and_b32 s12, s47, 0xffff0000
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s4, s45
+; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s47, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s47, s46, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s41, s46, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s10, s44, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s9, s44, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s42, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s42, 16
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s45, 22
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s45, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s78
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v25, 16, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s58, s42, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v3, v6
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s1, v4
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s1, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.l, v24.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s1
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s1, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-TRUE16-NEXT: s_cselect_b32 s1, s1, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s0, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s77
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v5.h, v25.l
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v4
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v2, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v6, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v87, 24, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v3, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s6, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s6, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s6, s42, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s0
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v7, v6
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.h, v2.l
+; GFX11-TRUE16-NEXT: s_lshr_b32 s6, s6, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v2, v8, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s0, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s0, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s0
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s0, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s0, s0, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s3, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v4.l, v27.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v7, v8, vcc_lo
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s76
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v96, 16, v4
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v26, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s75
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s3
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v28, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s59, s42, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s3, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s3, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s3
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s3, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s3, s3, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s2, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s74
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.l, v26.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v12.h, v28.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s11
+; GFX11-TRUE16-NEXT: s_bfe_u32 s11, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s11, s11, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s11, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v30, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s11, s42, s11
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s2, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s2, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s2
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s2, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s2, s2, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s17, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s73
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v11.l, v30.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v29, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s72
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s17, s17, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v31, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s17
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s60, s42, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s17, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.l, v29.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s17, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v17.h, v31.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s17
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s17, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s17, s17, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s16, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s63
+; GFX11-TRUE16-NEXT: s_lshr_b32 s17, s17, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[13:14], 24, v[11:12]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[14:15], 24, v[4:5]
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v33, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s16, s16, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s62
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s42, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s16, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.h, v1.l
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s16, 0x10010
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s16
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s16, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s16, s16, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s19, 0xffff0000
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s16, s16, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s61
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v16.l, v33.l
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v32, 16, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s57
+; GFX11-TRUE16-NEXT: s_and_b32 s45, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s42, s42, s43
+; GFX11-TRUE16-NEXT: s_lshl_b32 s19, s19, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v34, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s19
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s61, s42, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s19, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s43, s19, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.l, v32.l
+; GFX11-TRUE16-NEXT: s_add_i32 s43, s43, s19
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s19, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s43, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s42, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s19, s19, s43
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s18, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s56
+; GFX11-TRUE16-NEXT: s_lshr_b32 s19, s19, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s42, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v19.h, v34.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s45, s17, s60
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s44, s16, s44
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s40
+; GFX11-TRUE16-NEXT: s_bfe_u32 s40, s42, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s40, s40, s42
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s42, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s40, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v36, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s40, s42, s40
+; GFX11-TRUE16-NEXT: s_lshl_b32 s18, s18, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s18
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s40, s40, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s18, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s18, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s18
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s18, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s18, s18, s42
+; GFX11-TRUE16-NEXT: s_and_b32 s42, s21, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s42
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s29
+; GFX11-TRUE16-NEXT: s_lshr_b32 s18, s18, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s29, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v35, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s42, s29, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s42, s42, s29
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s29, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s42, 0x7fff
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s43, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s29, s29, s42
+; GFX11-TRUE16-NEXT: s_lshl_b32 s21, s21, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s62, s29, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s42, s2, s11
+; GFX11-TRUE16-NEXT: s_bfe_u32 s21, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.l, v35.l
+; GFX11-TRUE16-NEXT: s_add_i32 s21, s21, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s21, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s29, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s14, s21
+; GFX11-TRUE16-NEXT: s_and_b32 s21, s20, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s21
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: s_lshr_b32 s21, s14, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v21.h, v37.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v18.l, v36.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s43, s3, s59
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s12
+; GFX11-TRUE16-NEXT: s_bfe_u32 s12, s13, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, s13
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, s13, s12
+; GFX11-TRUE16-NEXT: s_lshl_b32 s13, s20, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s13
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v8, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s12, s12, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s13, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.h, v1.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v8
+; GFX11-TRUE16-NEXT: s_bfe_u32 s14, s13, 0x10010
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: s_add_i32 s14, s14, s13
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s14, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s20, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s13, s14
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s23, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s47
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v20.l, v39.l
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v7, 16, 1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v38, 16, v6
+; GFX11-TRUE16-NEXT: s_bfe_u32 s20, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: s_add_i32 s29, s20, s14
+; GFX11-TRUE16-NEXT: s_lshr_b32 s20, s13, 16
+; GFX11-TRUE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s29
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s23, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s41
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v3, v7
+; GFX11-TRUE16-NEXT: s_lshr_b32 s63, s13, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v2, 16, 1
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s28
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s23, s14, 0x10010
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s28, s0, s6
+; GFX11-TRUE16-NEXT: s_add_i32 s23, s23, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s23, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s23
+; GFX11-TRUE16-NEXT: s_and_b32 s14, s22, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s23, s13, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v6
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.l, v38.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v51, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s13, s14, s15
+; GFX11-TRUE16-NEXT: s_lshl_b32 s14, s22, 16
+; GFX11-TRUE16-NEXT: v_bfe_u32 v3, v8, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s14
+; GFX11-TRUE16-NEXT: v_bfe_u32 v7, v9, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v23.h, v48.l
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, v3, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s14, v2
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v7, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-TRUE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s22, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s14, s15
+; GFX11-TRUE16-NEXT: s_and_b32 s15, s25, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: s_lshr_b32 s22, s14, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v3, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s15
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v49, 16, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s10, v3
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v6, v6, v10, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.h, v1.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s9, s10, 0x10010
+; GFX11-TRUE16-NEXT: v_bfe_u32 v1, v7, 16, 1
+; GFX11-TRUE16-NEXT: s_add_i32 s9, s9, s10
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s10, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s9, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s9, s10, s9
+; GFX11-TRUE16-NEXT: s_lshl_b32 s10, s25, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v50, 16, v6
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s10
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v1, v7
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s72, s9, 16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v7
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, v6, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v8, 16, 1
+; GFX11-TRUE16-NEXT: s_bfe_u32 s10, s8, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v22.l, v51.l
+; GFX11-TRUE16-NEXT: s_add_i32 s10, s10, s8
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s10, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s9, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s8, s8, s10
+; GFX11-TRUE16-NEXT: s_and_b32 s9, s24, 0xffff0000
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s9
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v2
+; GFX11-TRUE16-NEXT: s_lshr_b32 s25, s8, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v9, v10, v8
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s9, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.l, v50.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v69.h, v49.l
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s29, s1, s58
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v9
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s9, 0x10010
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s9
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s9, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v8
+; GFX11-TRUE16-NEXT: s_and_b32 s8, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s7, s9, s7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s8, s24, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v53, 16, v2
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s8
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s7, 16
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.h, v1.l
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v68.l, v53.l
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s8, v2
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_bfe_u32 v6, v9, 16, 1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v9
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: s_bfe_u32 s5, s8, 0x10010
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, v6, v9
+; GFX11-TRUE16-NEXT: s_add_i32 s5, s5, s8
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s5, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s7, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s5, s8, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s7, s27, 0xffff0000
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s7
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-TRUE16-NEXT: v_bfe_u32 v8, v3, 16, 1
+; GFX11-TRUE16-NEXT: v_bfe_u32 v10, v2, 16, 1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s24, s5, 16
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s4, v6
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v7, v8, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, v10, v2
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s4, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v54, 16, v1
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s4
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s4, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s5, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, s4, s7
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s27, 16
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v6, 0x7fff, v7
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, 0x400000, v3
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-TRUE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, 0x400000, v2
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: s_lshr_b32 s73, s4, 16
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v3, v6, v7, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.l, v54.l
+; GFX11-TRUE16-NEXT: s_bfe_u32 s7, s5, 0x10010
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v65.h, v52.l
+; GFX11-TRUE16-NEXT: s_add_i32 s7, s7, s5
+; GFX11-TRUE16-NEXT: v_cndmask_b32_e32 v2, v8, v9, vcc_lo
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s5, 22
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s8, s22, s13
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v55, 16, v2
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s4, s5, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s26, 0xffff0000
+; GFX11-TRUE16-NEXT: s_lshr_b32 s27, s4, 16
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v2, 16, v3
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.l, v55.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[6:7], 24, v[22:23]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[7:8], 24, v[20:21]
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_mov_b16_e32 v64.h, v2.l
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[18:19]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[16:17]
+; GFX11-TRUE16-NEXT: s_bfe_u32 s6, s5, 0x10010
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s9, s23, s63
+; GFX11-TRUE16-NEXT: s_add_i32 s6, s6, s5
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s5, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s6, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s14, s5, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s26, 16
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s6, s20, s12
+; GFX11-TRUE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s14, 16
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s19, s61
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s4, s18, s40
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v10, 8, v65
+; GFX11-TRUE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-TRUE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[64:65]
+; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[2:3], 24, v[68:69]
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v3, 24, v65
+; GFX11-TRUE16-NEXT: s_bfe_u32 s12, s11, 0x10010
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v15, 16, v64
+; GFX11-TRUE16-NEXT: s_add_i32 s12, s12, s11
+; GFX11-TRUE16-NEXT: s_bitset1_b32 s11, 22
+; GFX11-TRUE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-TRUE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-TRUE16-NEXT: s_cselect_b32 s12, s11, s12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v64, 8, v64
+; GFX11-TRUE16-NEXT: s_lshr_b32 s26, s12, 16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v65, 24, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v66, 8, v69
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v67, 16, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v68, 8, v68
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v69, 24, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v23, 8, v23
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v70, 16, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v22, 8, v22
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v71, 24, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v21, 8, v21
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v80, 16, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v81, 24, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v82, 16, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v83, 24, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v84, 16, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v85, 24, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v12, 8, v12
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v86, 16, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v11, 8, v11
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v5, 8, v5
+; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v4, 8, v4
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s7, s21, s62
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s11, s25, s72
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s47, s27, s73
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s46, s26, s13
+; GFX11-TRUE16-NEXT: s_pack_ll_b32_b16 s10, s24, s10
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[94:95], s[8:9], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[14:15], s[44:45], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[40:41], s[42:43], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[56:57], s[28:29], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 vcc, s[46:47], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[34:35], s[10:11], 24
+; GFX11-TRUE16-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s13, s47, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s15, s47, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s41, s46, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s46, s46, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s47, s11, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s57, s10, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s9, s9, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s75, s8, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s76, s7, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s77, s7, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s78, s6, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s79, s6, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s88, s5, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s89, s5, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s90, s4, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s91, s4, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s92, s45, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s45, s45, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s93, s44, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s44, s44, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s95, s43, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s43, s43, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s99, s42, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s100, s42, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s101, s29, 24
+; GFX11-TRUE16-NEXT: s_lshr_b32 s102, s29, 8
+; GFX11-TRUE16-NEXT: s_lshr_b32 s103, s28, 16
+; GFX11-TRUE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-TRUE16-NEXT: s_branch .LBB91_5
+; GFX11-TRUE16-NEXT: .LBB91_3:
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr56
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s5, 1
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s4, 2
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s5, 3
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s74, 4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s75, 5
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; kill: killed $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s74, 6
+; GFX11-TRUE16-NEXT: v_writelane_b32 v43, s75, 7
+; GFX11-TRUE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-TRUE16-NEXT: s_branch .LBB91_2
+; GFX11-TRUE16-NEXT: .LBB91_4:
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v13, s94 :: v_dual_mov_b32 v14, s30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s94, v43, 2
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v96, s37 :: v_dual_mov_b32 v87, s34
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v4, s49 :: v_dual_mov_b32 v5, s35
+; GFX11-TRUE16-NEXT: v_readlane_b32 s95, v43, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 vcc_lo, v43, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v43, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v43, 4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v55, s42 :: v_dual_mov_b32 v54, s43
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v52, s10 :: v_dual_mov_b32 v53, s44
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v50, s45 :: v_dual_mov_b32 v49, s98
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v51, s46 :: v_dual_mov_b32 v38, s47
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v48, s97 :: v_dual_mov_b32 v39, s58
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v35, s59 :: v_dual_mov_b32 v36, s60
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v37, s9 :: v_dual_mov_b32 v32, s61
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v34, s8 :: v_dual_mov_b32 v33, s62
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v29, s63 :: v_dual_mov_b32 v30, s72
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v31, s96 :: v_dual_mov_b32 v26, s73
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v28, s7 :: v_dual_mov_b32 v27, s28
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v24, s29 :: v_dual_mov_b32 v25, s6
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v15, s87 :: v_dual_mov_b32 v64, s86
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v3, s85 :: v_dual_mov_b32 v10, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v67, s4 :: v_dual_mov_b32 v68, s48
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v65, s81 :: v_dual_mov_b32 v66, s84
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v70, s83 :: v_dual_mov_b32 v69, s70
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v22, s82 :: v_dual_mov_b32 v23, s80
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v80, s71 :: v_dual_mov_b32 v71, s66
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v20, s39 :: v_dual_mov_b32 v21, s69
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v82, s68 :: v_dual_mov_b32 v81, s55
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v18, s67 :: v_dual_mov_b32 v19, s65
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v84, s38 :: v_dual_mov_b32 v83, s51
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v16, s64 :: v_dual_mov_b32 v17, s54
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v86, s53 :: v_dual_mov_b32 v11, s52
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v12, s50
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v1, s74 :: v_dual_mov_b32 v2, s76
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v6, s78 :: v_dual_mov_b32 v7, s88
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v8, s90 :: v_dual_mov_b32 v9, s92
+; GFX11-TRUE16-NEXT: s_mov_b32 s58, s11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s59, v43, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s60, v43, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s61, v43, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s62, v43, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s63, v43, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s72, v43, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s73, v43, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s13, v43, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s15, v43, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s41, v43, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s46, v43, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s47, v43, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s11, v43, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s57, v43, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s10, v43, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s74, v43, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s9, v43, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s75, v43, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s8, v43, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s76, v43, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s77, v43, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s78, v43, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s79, v43, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s88, v43, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s89, v42, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s90, v42, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s91, v42, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s92, v42, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s45, v42, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s93, v42, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 vcc_hi, v43, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s44, v42, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v43, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s95, v42, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s43, v42, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v43, 5
+; GFX11-TRUE16-NEXT: .LBB91_5: ; %end
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s104, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s103, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s56, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s102, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s58, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s101, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s100, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s99, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s40, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s43, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s59, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s95, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s3, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s16, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s44, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s93, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s14, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s17, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s45, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s60, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s92, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s18, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s91, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s90, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s12, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s19, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s89, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s61, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s88, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v113, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_mov_b32 v115, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s20, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s79, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s78, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s30, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s21, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s77, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s62, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s76, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s22, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s8, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s75, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s94, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s23, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s9, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s6, s63, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s7, s74, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_clause 0x1
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[97:100], off
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s24, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s10, 8
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s57, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s34, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s2, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s11, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s25, 0xff
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s72, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s47, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s26, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, s46, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s3, s41, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s4, vcc_lo, 8
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s15, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s3, s4
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s27, 0xff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s6, s13, 8
+; GFX11-TRUE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-TRUE16-NEXT: s_and_b32 s5, s73, 0xff
+; GFX11-TRUE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-TRUE16-NEXT: s_or_b32 s5, s5, s6
+; GFX11-TRUE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-TRUE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-TRUE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_and_b32 v27, 0xff, v27
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v113, s1 :: v_dual_lshlrev_b32 v4, 8, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 8, v14
+; GFX11-TRUE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-TRUE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(VALU_DEP_3)
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_and_b32 v96, 0xff, v96
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v27, v4
+; GFX11-TRUE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_lshlrev_b32 v5, 8, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v96, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 8, v11
+; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 8, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v26
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 8, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 8, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v27, v4, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xff, v24
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v25
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v87
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xff, v30
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v30, 0xff, v86
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v26, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v14, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v25, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v30, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v28
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 8, v85
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v25, 0xff, v33
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v26, 0xff, v84
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v28, 0xff, v29
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v29, 0xff, v31
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v30, 8, v83
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v26, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v28, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v24, v29, v30
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v4, 0xffff, v4
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v13, 16, v13
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v24, 16, v24
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v28, v4, v5
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v29, v11, v13
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v30, v12, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v4, v16, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v5, v17, v24
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xff, v36
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v11, 8, v18
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v12, 0xff, v82
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 8, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xff, v32
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v14, 8, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v34
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v81
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xff, v39
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 8, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v9, v11
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v12, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v14
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v18, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v80
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v7, 8, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xff, v35
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v17, 8, v21
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xff, v37
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 8, v71
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xff, v51
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 8, v22
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xff, v70
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v6, 8, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v14, v7
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v16, v17
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v18, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v20, v21
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v22, v6
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v12, 16, v12
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 16, v7
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 16, v16
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v6
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v6, v9, v8
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v7, v11, v12
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v11, v13, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v12, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v13, v17, v19
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xff, v38
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 8, v23
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v48
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v16, 8, v69
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xff, v53
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 8, v68
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xff, v67
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v20, 0xff, v50
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v21, 8, v66
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v8, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v9, v14, v16
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v17, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v2, v19, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v20, v21
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v18, 8, v65
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v19, 0xff, v55
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v17, 0xffff, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v14, 0xff, v49
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v20, 8, v64
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v15, 0xff, v15
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v21, 0xff, v54
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v22, 0xff, v52
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v14, v18
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v19, v20
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v1, v15, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v10, v21, v10
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v3, v22, v3
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v8, 0xffff, v8
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v19, 16, v14
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v18, 0xffff, v18
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v1, 16, v1
+; GFX11-TRUE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-TRUE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v14, v8, v9
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v15, v17, v2
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v16, v16, v19
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v17, v18, v1
+; GFX11-TRUE16-NEXT: v_or_b32_e32 v18, v10, v3
+; GFX11-TRUE16-NEXT: s_clause 0x5
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[97:100], off offset:32
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:48
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[27:30], off offset:64
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[4:7], off offset:80
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[11:14], off offset:96
+; GFX11-TRUE16-NEXT: scratch_store_b128 v0, v[15:18], off offset:112
+; GFX11-TRUE16-NEXT: v_readlane_b32 s104, v41, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s103, v41, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s102, v41, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s101, v41, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s100, v41, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s99, v41, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s98, v41, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s97, v41, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s96, v41, 0
+; GFX11-TRUE16-NEXT: v_readlane_b32 s87, v40, 31
+; GFX11-TRUE16-NEXT: v_readlane_b32 s86, v40, 30
+; GFX11-TRUE16-NEXT: v_readlane_b32 s85, v40, 29
+; GFX11-TRUE16-NEXT: v_readlane_b32 s84, v40, 28
+; GFX11-TRUE16-NEXT: v_readlane_b32 s83, v40, 27
+; GFX11-TRUE16-NEXT: v_readlane_b32 s82, v40, 26
+; GFX11-TRUE16-NEXT: v_readlane_b32 s81, v40, 25
+; GFX11-TRUE16-NEXT: v_readlane_b32 s80, v40, 24
+; GFX11-TRUE16-NEXT: v_readlane_b32 s71, v40, 23
+; GFX11-TRUE16-NEXT: v_readlane_b32 s70, v40, 22
+; GFX11-TRUE16-NEXT: v_readlane_b32 s69, v40, 21
+; GFX11-TRUE16-NEXT: v_readlane_b32 s68, v40, 20
+; GFX11-TRUE16-NEXT: v_readlane_b32 s67, v40, 19
+; GFX11-TRUE16-NEXT: v_readlane_b32 s66, v40, 18
+; GFX11-TRUE16-NEXT: v_readlane_b32 s65, v40, 17
+; GFX11-TRUE16-NEXT: v_readlane_b32 s64, v40, 16
+; GFX11-TRUE16-NEXT: v_readlane_b32 s55, v40, 15
+; GFX11-TRUE16-NEXT: v_readlane_b32 s54, v40, 14
+; GFX11-TRUE16-NEXT: v_readlane_b32 s53, v40, 13
+; GFX11-TRUE16-NEXT: v_readlane_b32 s52, v40, 12
+; GFX11-TRUE16-NEXT: v_readlane_b32 s51, v40, 11
+; GFX11-TRUE16-NEXT: v_readlane_b32 s50, v40, 10
+; GFX11-TRUE16-NEXT: v_readlane_b32 s49, v40, 9
+; GFX11-TRUE16-NEXT: v_readlane_b32 s48, v40, 8
+; GFX11-TRUE16-NEXT: v_readlane_b32 s39, v40, 7
+; GFX11-TRUE16-NEXT: v_readlane_b32 s38, v40, 6
+; GFX11-TRUE16-NEXT: v_readlane_b32 s37, v40, 5
+; GFX11-TRUE16-NEXT: v_readlane_b32 s36, v40, 4
+; GFX11-TRUE16-NEXT: v_readlane_b32 s35, v40, 3
+; GFX11-TRUE16-NEXT: v_readlane_b32 s34, v40, 2
+; GFX11-TRUE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-TRUE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-TRUE16-NEXT: s_clause 0x3
+; GFX11-TRUE16-NEXT: scratch_load_b32 v40, off, s32
+; GFX11-TRUE16-NEXT: scratch_load_b32 v41, off, s32 offset:4
+; GFX11-TRUE16-NEXT: scratch_load_b32 v42, off, s32 offset:8
+; GFX11-TRUE16-NEXT: scratch_load_b32 v43, off, s32 offset:12
+; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-TRUE16-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-FAKE16-LABEL: bitcast_v64bf16_to_v128i8_scalar:
+; GFX11-FAKE16: ; %bb.0:
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s4, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s32
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_store_b32 off, v43, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s96, 0
+; GFX11-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v15
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s72, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s73, v2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s97, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s62, v3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s63, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s60, v5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s34, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s98, 2
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s61, v6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s58, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s59, v8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s35, 3
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s99, 3
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s56, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s57, v10
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s46, v11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s36, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s100, 4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v12
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s45, v14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s37, 5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s101, 5
+; GFX11-FAKE16-NEXT: s_mov_b32 vcc_hi, 0
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr43 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: ; implicit-def: $vgpr42 : SGPR spill to VGPR lane
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s38, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s102, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s39, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s103, 7
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s48, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v41, s104, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s49, 9
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s50, 10
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s51, 11
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s52, 12
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s53, 13
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s54, 14
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s55, 15
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s64, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s65, 17
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s66, 18
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s67, 19
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s68, 20
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s69, 21
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s70, 22
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s71, 23
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s80, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s81, 25
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s82, 26
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s83, 27
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s84, 28
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s85, 29
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s86, 30
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s87, 31
+; GFX11-FAKE16-NEXT: s_cbranch_scc0 .LBB91_3
+; GFX11-FAKE16-NEXT: ; %bb.1: ; %cmp.false
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[26:27], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 15
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s2, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s2, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s1, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s27, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s1, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s1, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s0, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s26, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s0, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s85, s45, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s45, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 17
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s26, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s45, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s87, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s86, s44, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s81, s47, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s98, s47, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s84, s47, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 19
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s48, s46, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s70, s57, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s97, s57, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 13
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s25, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s80, s57, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s83, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s82, s56, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s24, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s66, s59, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s59, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s69, s59, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 21
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s24, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s71, s58, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s39, s58, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s55, s61, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 22
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s61, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s65, s61, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s68, s60, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 23
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s67, s60, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s51, s63, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s96, s63, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s23, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s54, s63, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s38, s62, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s64, s62, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s22, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s36, s73, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s7, s73, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s50, s73, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 25
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s22, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s53, s72, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s52, s72, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s34, s29, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 26
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s6, s29, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s35, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s37, s28, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 27
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s49, s28, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[16:17], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[2:3], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 11
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s21, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[0:1], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[74:75], s[44:45], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[76:77], s[46:47], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s20, 16
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[78:79], s[56:57], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[88:89], s[58:59], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[90:91], s[60:61], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 29
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s20, 8
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[92:93], s[62:63], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[72:73], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[28:29], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 30
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 31
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s19, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s18, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s18, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s17, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s16, 8
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 7
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s3, 8
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_4) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s4, s46, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 7
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[24:25], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 5
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[22:23], 24
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 3
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[20:21], 24
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s12, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s13, 1
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[18:19], 24
+; GFX11-FAKE16-NEXT: s_and_not1_b32 vcc_lo, exec_lo, vcc_hi
+; GFX11-FAKE16-NEXT: s_cbranch_vccnz .LBB91_4
+; GFX11-FAKE16-NEXT: .LBB91_2: ; %cmp.true
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s29, 0xffff0000
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s47, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s1, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s15, s47, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s29, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v1, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s8, s45, 0xffff0000
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s47, v6
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v1
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s45, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s78, s28, 0xffff0000
+; GFX11-FAKE16-NEXT: s_bfe_u32 s6, s47, 0x10010
+; GFX11-FAKE16-NEXT: s_lshl_b32 s79, s28, 16
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s6, s47
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s73, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s77, s73, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s75, s72, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s76, s72, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s11, s63, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s74, s63, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s72, s62, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s73, s62, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s63, s61, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s62, s61, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s61, s60, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s60, s60, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s41, s59, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s40, s59, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s28, s58, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s29, s58, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s13, s57, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s10, s57, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s42, s56, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s43, s56, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s12, s46, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s9, s46, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s44, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s47, 22
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s47, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s58, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v6, 0x40c00000, s78
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s1, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v7, 0x40c00000, s79
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v22, 16, v1
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v4, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s1, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v6, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s1
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s1, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s1, s1, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s0, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v21, 16, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v7, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v6
+; GFX11-FAKE16-NEXT: s_lshr_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v7
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v6, v6
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v6
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s0
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v7, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v21
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s0, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s77
+; GFX11-FAKE16-NEXT: s_bfe_u32 s5, s0, 0x10010
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v7, v22, 16, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s5, s0
+; GFX11-FAKE16-NEXT: s_lshr_b32 s5, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s0, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s0, s0, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s3, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v23, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_bfe_u32 v6, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s0, s0, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v23
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v6, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v6, v2, 16, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s76
+; GFX11-FAKE16-NEXT: s_lshr_b32 s59, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s75
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s3, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v87, 24, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v96, 16, v6
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v4, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s3, 0x10010
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s3
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s3, 22
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v4
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s3, s3, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s2, 0xffff0000
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v25, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v24, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v8, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v24
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s74
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v14, v25, 16, v5
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v1, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v85, 24, v14
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s2, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v26, 16, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s11
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s11, s2, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s11, s2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s44, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s2, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s2, s2, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s17, 0xffff0000
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v26
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v13, v2, 16, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v10, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v86, 16, v13
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v4, vcc_lo
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, 0x7fff, v8
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s17, s17, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s73
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s17
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v27, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s72
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v2, 16, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s17, v4
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v8, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s72, s44, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v5, v5, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s17, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v28, 16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v27
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s17
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s17, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v16, v28, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v8, v1, 16, 1
+; GFX11-FAKE16-NEXT: s_cselect_b32 s17, s17, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s16, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshr_b32 s17, s17, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s63
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v83, 24, v16
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v29, 16, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_3)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v5, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v29
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v8, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, 0x7fff, v4
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s46, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s16, s16, 16
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s44, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_2)
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s16, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, 0x400000, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s62
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s16, 0x10010
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s16
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s16, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s16, s16, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s19, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v15, v1, 16, v5
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v4, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s16, s16, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v8, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s44, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s60
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v4
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s44, 0x10010
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s61
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s44
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s44, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s47, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s44, s44, s45
+; GFX11-FAKE16-NEXT: s_lshl_b32 s19, s19, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s19
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s60, s44, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v30, 16, v1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s19, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v9, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s45, s19, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v31, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s45, s45, s19
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s19, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s45, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s44, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s19, s19, s45
+; GFX11-FAKE16-NEXT: s_and_b32 s44, s18, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v3, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s44
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s19, s19, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s29
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s41
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s41, v4
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s47, s17, s72
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v32, 16, v2
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v3, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s44, s41, 0x10010
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_add_i32 s44, s44, s41
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s41, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s44, 0x7fff
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s40
+; GFX11-FAKE16-NEXT: s_and_b32 s45, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s41, s41, s44
+; GFX11-FAKE16-NEXT: s_lshl_b32 s18, s18, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v31
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v32
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v18, v30, 16, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s18, v5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v17, v1, 16, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v3
+; GFX11-FAKE16-NEXT: s_bfe_u32 s40, s18, 0x10010
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: s_add_i32 s44, s40, s18
+; GFX11-FAKE16-NEXT: s_lshr_b32 s40, s41, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s44, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s18, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s41, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s18, s18, s44
+; GFX11-FAKE16-NEXT: s_and_b32 s41, s21, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s41
+; GFX11-FAKE16-NEXT: v_bfe_u32 v2, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s18, s18, 16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s28, v5
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v2, v9
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v10, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s29, s28, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v33, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, s28
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s28, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s41, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s28, s28, s29
+; GFX11-FAKE16-NEXT: s_lshl_b32 s21, s21, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v11, 0x40c00000, s21
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: s_lshr_b32 s61, s28, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s44, s2, s11
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s21, v11
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v11, v11
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s29, s21, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v34, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s29, s21
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s21, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s28, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s21, s21, s29
+; GFX11-FAKE16-NEXT: s_and_b32 s28, s20, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s28
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v10
+; GFX11-FAKE16-NEXT: s_lshr_b32 s21, s21, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s45, s3, s59
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s46, s16, s46
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s13, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v81, 24, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_bfe_u32 s28, s13, 0x10010
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v34
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, s13
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s13, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s29, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s13, s28
+; GFX11-FAKE16-NEXT: s_lshl_b32 s20, s20, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v35, 16, v1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s20
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v3, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s10
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v20, v33, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v35
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s20, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v3
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v19, v2, 16, v9
+; GFX11-FAKE16-NEXT: s_bfe_u32 s10, s20, 0x10010
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s10, s20
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s13, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s20, 22
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v3
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s20, s28
+; GFX11-FAKE16-NEXT: s_and_b32 s20, s23, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s42
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s20
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s43
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s28, v2
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v37, 16, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v80, 16, v19
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s20, s28, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s29, s20, s28
+; GFX11-FAKE16-NEXT: s_lshr_b32 s20, s13, 16
+; GFX11-FAKE16-NEXT: s_addk_i32 s29, 0x7fff
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s28, 22
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s28, s29
+; GFX11-FAKE16-NEXT: s_lshl_b32 s23, s23, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v5, v9, 16, 1
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s23
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v36, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v4, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s62, s13, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v5, v9
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s23, v2
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s28, s23, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_add_i32 s28, s28, s23
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s23, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s28, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s23, s28
+; GFX11-FAKE16-NEXT: s_and_b32 s23, s22, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v36
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v5, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s23
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v5, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: s_lshr_b32 s23, s13, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v9, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v71, v37, 16, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v4, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: s_bfe_u32 s15, s14, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v38, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s15, s15, s14
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s15, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s13, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s13, s14, s15
+; GFX11-FAKE16-NEXT: s_lshl_b32 s14, s22, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_bfe_u32 v1, v5, 16, 1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v38
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v9, v9, v8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s13, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s14, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, v1, v5
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v70, v2, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v9
+; GFX11-FAKE16-NEXT: s_bfe_u32 s12, s14, 0x10010
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, s14
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s14, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s15, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s12, s14, s12
+; GFX11-FAKE16-NEXT: s_and_b32 s14, s25, 0xffff0000
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s14
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v1, 0x7fff, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, 0x400000, v5
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc_lo
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s9, v10
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v5, v5
+; GFX11-FAKE16-NEXT: s_lshr_b32 s22, s12, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v4, 16, 1
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v39, 16, v2
+; GFX11-FAKE16-NEXT: s_bfe_u32 s14, s9, 0x10010
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: s_add_i32 s14, s14, s9
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s9, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s14, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v48, 16, v1
+; GFX11-FAKE16-NEXT: s_and_b32 s12, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s9, s9, s14
+; GFX11-FAKE16-NEXT: s_lshl_b32 s12, s25, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v3, v4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s63, s9, 16
+; GFX11-FAKE16-NEXT: v_bfe_u32 v3, v8, 16, 1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v4
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, v3, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, 0x400000, v8
+; GFX11-FAKE16-NEXT: s_bfe_u32 s12, s8, 0x10010
+; GFX11-FAKE16-NEXT: v_bfe_u32 v12, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_add_i32 s12, s12, s8
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s12, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s9, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v4, v4
+; GFX11-FAKE16-NEXT: s_cselect_b32 s8, s8, s12
+; GFX11-FAKE16-NEXT: s_and_b32 s9, s24, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v3
+; GFX11-FAKE16-NEXT: s_lshr_b32 s25, s8, 16
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v1, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v2, 0x40c00000, s9
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s7
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v12, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v12, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s7, v2
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v11, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v2, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, 0x400000, v9
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s28, s0, s5
+; GFX11-FAKE16-NEXT: s_bfe_u32 s9, s7, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v49, 16, v3
+; GFX11-FAKE16-NEXT: s_add_i32 s9, s9, s7
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s7, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s9, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s8, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s7, s7, s9
+; GFX11-FAKE16-NEXT: s_lshl_b32 s8, s24, 16
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v10, 0x40c00000, s8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v9, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v8, 16, 1
+; GFX11-FAKE16-NEXT: s_lshr_b32 s12, s7, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s8, v10
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v10, v10
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v4, v4, v8
+; GFX11-FAKE16-NEXT: v_bfe_u32 v10, v12, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s4, s8, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v50, 16, v2
+; GFX11-FAKE16-NEXT: s_add_i32 s4, s4, s8
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s8, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s4, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s6, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s8, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s27, 0xffff0000
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v4
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v52, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v8
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v8, v10, v12
+; GFX11-FAKE16-NEXT: s_lshr_b32 s24, s4, 16
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v52
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, 0x400000, v9
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v52, v52
+; GFX11-FAKE16-NEXT: v_bfe_u32 v4, v9, 16, 1
+; GFX11-FAKE16-NEXT: s_bfe_u32 s7, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s6, s7
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s27, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v51, 16, v3
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, v4, v9
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v3, 0x7fff, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, 0x400000, v12
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v8, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v12, v12
+; GFX11-FAKE16-NEXT: v_add_nc_u32_e32 v2, 0x7fff, v2
+; GFX11-FAKE16-NEXT: s_lshr_b32 s73, s4, 16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v49
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v8
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v9, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v4, 0xffff, v51
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v66, v1, 16, v11
+; GFX11-FAKE16-NEXT: s_bfe_u32 s7, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v52, 16, v3
+; GFX11-FAKE16-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v8, v8
+; GFX11-FAKE16-NEXT: s_add_i32 s7, s7, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s7, 0x7fff
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s4, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s26, 0xffff0000
+; GFX11-FAKE16-NEXT: s_lshr_b32 s27, s4, 16
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v3, 0x40c00000, s6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v8, 0xffff, v52
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v5, 0xffff, v39
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v55, v50, 16, v4
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s8, s22, s13
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s6, v3
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v3, v3
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v54, v2, 16, v8
+; GFX11-FAKE16-NEXT: v_lshl_or_b32 v67, v48, 16, v5
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[8:9], 24, v[17:18]
+; GFX11-FAKE16-NEXT: s_bfe_u32 s5, s6, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[9:10], 24, v[15:16]
+; GFX11-FAKE16-NEXT: s_add_i32 s5, s5, s6
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s6, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s5, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s4, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s14, s6, s5
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s26, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s6, s20, s10
+; GFX11-FAKE16-NEXT: v_add_f32_e64 v1, 0x40c00000, s4
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s14, 16
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[10:11], 24, v[13:14]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[11:12], 24, v[6:7]
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s29, s1, s58
+; GFX11-FAKE16-NEXT: v_readfirstlane_b32 s11, v1
+; GFX11-FAKE16-NEXT: v_cmp_u_f32_e32 vcc_lo, v1, v1
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[1:2], 24, v[54:55]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[2:3], 24, v[66:67]
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[70:71]
+; GFX11-FAKE16-NEXT: s_bfe_u32 s10, s11, 0x10010
+; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[4:5], 24, v[19:20]
+; GFX11-FAKE16-NEXT: s_add_i32 s10, s10, s11
+; GFX11-FAKE16-NEXT: s_bitset1_b32 s11, 22
+; GFX11-FAKE16-NEXT: s_addk_i32 s10, 0x7fff
+; GFX11-FAKE16-NEXT: s_and_b32 s14, vcc_lo, exec_lo
+; GFX11-FAKE16-NEXT: s_cselect_b32 s10, s11, s10
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s19, s60
+; GFX11-FAKE16-NEXT: s_lshr_b32 s26, s10, 16
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s4, s18, s40
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s9, s23, s62
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v5, 24, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v12, 8, v55
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v53, 16, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v54, 8, v54
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v55, 24, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v64, 8, v67
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v65, 16, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v66, 8, v66
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v67, 24, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v68, 8, v71
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v69, 16, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v70, 8, v70
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v71, 24, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v20, 8, v20
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v19, 8, v19
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v18, 8, v18
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v82, 16, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v17, 8, v17
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v16, 8, v16
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v84, 16, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v15, 8, v15
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v14, 8, v14
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v13, 8, v13
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v7, 8, v7
+; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v6, 8, v6
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s7, s21, s61
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s11, s25, s63
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s57, s27, s73
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s56, s26, s13
+; GFX11-FAKE16-NEXT: s_pack_ll_b32_b16 s10, s24, s12
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[94:95], s[8:9], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[12:13], s[4:5], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[14:15], s[46:47], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[40:41], s[44:45], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[42:43], s[28:29], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 vcc, s[56:57], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[34:35], s[10:11], 24
+; GFX11-FAKE16-NEXT: s_lshr_b64 s[30:31], s[6:7], 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s13, s57, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s15, s57, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s41, s56, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s43, s56, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s56, s11, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s11, s11, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s57, s10, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s10, s10, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s74, s9, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s9, s9, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s75, s8, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s8, s8, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s76, s7, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s77, s7, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s78, s6, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s79, s6, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s88, s5, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s89, s5, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s90, s4, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s91, s4, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s92, s47, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s47, s47, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s93, s46, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s46, s46, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s95, s45, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s45, s45, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s99, s44, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s100, s44, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s101, s29, 24
+; GFX11-FAKE16-NEXT: s_lshr_b32 s102, s29, 8
+; GFX11-FAKE16-NEXT: s_lshr_b32 s103, s28, 16
+; GFX11-FAKE16-NEXT: s_lshr_b32 s104, s28, 8
+; GFX11-FAKE16-NEXT: s_branch .LBB91_5
+; GFX11-FAKE16-NEXT: .LBB91_3:
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr104
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr103
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr42
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr102
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr11
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr101
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr100
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr99
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr40
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr14
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr12
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr49
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr37
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr35
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr6
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr34
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr52
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr53
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr50
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr36
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr64
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr38
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr54
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr96
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr51
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr67
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr68
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr65
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr8
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr55
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr39
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr71
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr69
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr9
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr66
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr82
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr83
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr80
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr97
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr70
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr48
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr84
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr98
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr81
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr86
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr87
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr10
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr85
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr30
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr94
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr92
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr90
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr88
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr78
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr76
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s5, 1
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s4, 2
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s5, 3
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s74, 4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s75, 5
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; kill: killed $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr4
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr5
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s74, 6
+; GFX11-FAKE16-NEXT: v_writelane_b32 v43, s75, 7
+; GFX11-FAKE16-NEXT: ; implicit-def: $sgpr74
+; GFX11-FAKE16-NEXT: s_branch .LBB91_2
+; GFX11-FAKE16-NEXT: .LBB91_4:
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v10, s94 :: v_dual_mov_b32 v11, s30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s94, v43, 2
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v96, s37 :: v_dual_mov_b32 v87, s34
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v6, s49 :: v_dual_mov_b32 v7, s35
+; GFX11-FAKE16-NEXT: v_readlane_b32 s95, v43, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 vcc_lo, v43, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v43, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v43, 4
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v52, s44 :: v_dual_mov_b32 v51, s45
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v50, s10 :: v_dual_mov_b32 v49, s46
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v39, s47 :: v_dual_mov_b32 v48, s98
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v38, s56 :: v_dual_mov_b32 v37, s97
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v36, s57 :: v_dual_mov_b32 v35, s58
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v34, s59 :: v_dual_mov_b32 v33, s9
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v32, s60 :: v_dual_mov_b32 v31, s61
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v30, s8 :: v_dual_mov_b32 v29, s62
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v27, s63 :: v_dual_mov_b32 v28, s96
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v26, s72 :: v_dual_mov_b32 v25, s7
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v24, s73 :: v_dual_mov_b32 v23, s28
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v21, s29 :: v_dual_mov_b32 v22, s6
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v53, s87 :: v_dual_mov_b32 v54, s86
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v5, s85 :: v_dual_mov_b32 v12, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v65, s4 :: v_dual_mov_b32 v66, s48
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v55, s81 :: v_dual_mov_b32 v64, s84
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v69, s83 :: v_dual_mov_b32 v70, s82
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v67, s70 :: v_dual_mov_b32 v68, s80
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v80, s71 :: v_dual_mov_b32 v19, s39
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v71, s66 :: v_dual_mov_b32 v20, s69
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v82, s68 :: v_dual_mov_b32 v17, s67
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v81, s55 :: v_dual_mov_b32 v18, s65
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v84, s38 :: v_dual_mov_b32 v15, s64
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v83, s51 :: v_dual_mov_b32 v16, s54
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v86, s53 :: v_dual_mov_b32 v13, s52
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v85, s36 :: v_dual_mov_b32 v14, s50
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v1, s74 :: v_dual_mov_b32 v2, s76
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v3, s78 :: v_dual_mov_b32 v4, s88
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v8, s90 :: v_dual_mov_b32 v9, s92
+; GFX11-FAKE16-NEXT: s_mov_b32 s58, s11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s59, v43, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s72, v43, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s60, v43, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s61, v43, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s62, v43, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s63, v43, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s73, v43, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s13, v43, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s15, v43, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s41, v43, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s43, v43, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s56, v43, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s11, v43, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s57, v43, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s10, v43, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s74, v43, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s9, v43, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s75, v43, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s8, v43, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s76, v43, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s77, v43, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s78, v43, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s79, v43, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s88, v43, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s89, v42, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s90, v42, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s91, v42, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s92, v42, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s47, v42, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s93, v42, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 vcc_hi, v43, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s46, v42, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v43, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s95, v42, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s45, v42, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v43, 5
+; GFX11-FAKE16-NEXT: .LBB91_5: ; %end
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s104, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s103, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s42, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s102, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s58, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s101, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s100, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s99, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s40, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s5, s6
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s45, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s59, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s95, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s4, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s3, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s4
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s16, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s46, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s93, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s14, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s17, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s47, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s72, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s92, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s18, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s91, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s90, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s12, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s19, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s89, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s60, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s88, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_mov_b32 v113, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_mov_b32 v115, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s20, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s79, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s78, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s30, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s21, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s77, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s61, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s76, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s22, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s8, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s75, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s94, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s23, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s9, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s6, s62, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s7, s74, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s6, s7
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_clause 0x1
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[97:100], off
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:16
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v97, s0 :: v_dual_mov_b32 v98, s1
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v99, s2 :: v_dual_mov_b32 v100, s3
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s24, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s10, 8
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s57, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s34, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s2, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s0, s0, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s1, s1, 16
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s11, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s0, s0, s1
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s25, 0xff
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s63, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s56, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s1, s1, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s2, s2, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s26, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, s43, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s1, s1, s2
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s3, s41, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s4, vcc_lo, 8
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s15, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s3, s4
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s27, 0xff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s6, s13, 8
+; GFX11-FAKE16-NEXT: s_or_b32 s4, s4, s5
+; GFX11-FAKE16-NEXT: s_and_b32 s5, s73, 0xff
+; GFX11-FAKE16-NEXT: s_and_b32 s2, s2, 0xffff
+; GFX11-FAKE16-NEXT: s_or_b32 s5, s5, s6
+; GFX11-FAKE16-NEXT: s_lshl_b32 s3, s3, 16
+; GFX11-FAKE16-NEXT: s_and_b32 s4, s4, 0xffff
+; GFX11-FAKE16-NEXT: s_lshl_b32 s5, s5, 16
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v112, s0 :: v_dual_and_b32 v23, 0xff, v23
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v113, s1 :: v_dual_lshlrev_b32 v6, 8, v6
+; GFX11-FAKE16-NEXT: s_or_b32 s2, s2, s3
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v114, s2 :: v_dual_lshlrev_b32 v11, 8, v11
+; GFX11-FAKE16-NEXT: s_or_b32 s3, s4, s5
+; GFX11-FAKE16-NEXT: v_dual_mov_b32 v115, s3 :: v_dual_and_b32 v96, 0xff, v96
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v23, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 8, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v13, 8, v13
+; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_4)
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v96, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v24
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 8, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 8, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 8, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v23, v6, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xff, v21
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v22
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 8, v87
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v26
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v86
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v6, v7
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 8, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v11, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v22, v13
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v26, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v24, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v25
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 8, v85
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v29
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v24, 0xff, v84
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v25, 0xff, v27
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v26, 0xff, v28
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v27, 8, v83
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v22, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v24, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v25, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v21, v26, v27
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v6, 0xffff, v6
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v7, 16, v7
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 16, v10
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 16, v14
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xffff, v15
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v9, 16, v9
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v21, 16, v21
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v24, v6, v7
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v25, v11, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v26, v13, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v6, v15, v9
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v7, v16, v21
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xff, v32
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v10, 8, v17
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xff, v82
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xff, v31
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v14, 8, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v30
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v81
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xff, v35
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 8, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v9, v10
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v11, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v13, v14
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v15, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v17, v18
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xff, v80
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v15, 0xff, v34
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v16, 8, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xff, v33
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 8, v71
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xff, v38
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 8, v70
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xff, v69
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 8, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v14, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v15, v16
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v17, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v19, v20
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v21, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v9, 0xffff, v9
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v8, 16, v8
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 16, v11
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v13, 0xffff, v13
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v14, 0xffff, v14
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v15, 16, v15
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xffff, v16
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v3, 16, v3
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v8, v9, v8
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v9, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v13, v13, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v14, v14, v15
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v15, v16, v3
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xff, v36
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 8, v68
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xff, v37
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v11, 8, v67
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v49
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v66
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xff, v65
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 8, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v19, 0xff, v39
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v20, 8, v64
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v10, v11
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v10, v16, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v18, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v11, v19, v20
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v16, 0xff, v48
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v17, 8, v55
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v18, 0xff, v52
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 8, v54
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v20, 0xff, v53
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v1, 8, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v21, 0xff, v51
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v12, 8, v12
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v22, 0xff, v50
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 8, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v16, v17
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v17, v18, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v20, v1
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v12, v21, v12
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v5, v22, v5
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v3, 0xffff, v3
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v4, 16, v4
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v10, 0xffff, v10
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v2, 16, v2
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v11, 0xffff, v11
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v18, 16, v16
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v17, 0xffff, v17
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v19, 16, v1
+; GFX11-FAKE16-NEXT: v_and_b32_e32 v12, 0xffff, v12
+; GFX11-FAKE16-NEXT: v_lshlrev_b32_e32 v5, 16, v5
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v16, v3, v4
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v1, v10, v2
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v2, v11, v18
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v3, v17, v19
+; GFX11-FAKE16-NEXT: v_or_b32_e32 v4, v12, v5
+; GFX11-FAKE16-NEXT: s_clause 0x5
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[97:100], off offset:32
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[112:115], off offset:48
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[23:26], off offset:64
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[6:9], off offset:80
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[13:16], off offset:96
+; GFX11-FAKE16-NEXT: scratch_store_b128 v0, v[1:4], off offset:112
+; GFX11-FAKE16-NEXT: v_readlane_b32 s104, v41, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s103, v41, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s102, v41, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s101, v41, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s100, v41, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s99, v41, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s98, v41, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s97, v41, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s96, v41, 0
+; GFX11-FAKE16-NEXT: v_readlane_b32 s87, v40, 31
+; GFX11-FAKE16-NEXT: v_readlane_b32 s86, v40, 30
+; GFX11-FAKE16-NEXT: v_readlane_b32 s85, v40, 29
+; GFX11-FAKE16-NEXT: v_readlane_b32 s84, v40, 28
+; GFX11-FAKE16-NEXT: v_readlane_b32 s83, v40, 27
+; GFX11-FAKE16-NEXT: v_readlane_b32 s82, v40, 26
+; GFX11-FAKE16-NEXT: v_readlane_b32 s81, v40, 25
+; GFX11-FAKE16-NEXT: v_readlane_b32 s80, v40, 24
+; GFX11-FAKE16-NEXT: v_readlane_b32 s71, v40, 23
+; GFX11-FAKE16-NEXT: v_readlane_b32 s70, v40, 22
+; GFX11-FAKE16-NEXT: v_readlane_b32 s69, v40, 21
+; GFX11-FAKE16-NEXT: v_readlane_b32 s68, v40, 20
+; GFX11-FAKE16-NEXT: v_readlane_b32 s67, v40, 19
+; GFX11-FAKE16-NEXT: v_readlane_b32 s66, v40, 18
+; GFX11-FAKE16-NEXT: v_readlane_b32 s65, v40, 17
+; GFX11-FAKE16-NEXT: v_readlane_b32 s64, v40, 16
+; GFX11-FAKE16-NEXT: v_readlane_b32 s55, v40, 15
+; GFX11-FAKE16-NEXT: v_readlane_b32 s54, v40, 14
+; GFX11-FAKE16-NEXT: v_readlane_b32 s53, v40, 13
+; GFX11-FAKE16-NEXT: v_readlane_b32 s52, v40, 12
+; GFX11-FAKE16-NEXT: v_readlane_b32 s51, v40, 11
+; GFX11-FAKE16-NEXT: v_readlane_b32 s50, v40, 10
+; GFX11-FAKE16-NEXT: v_readlane_b32 s49, v40, 9
+; GFX11-FAKE16-NEXT: v_readlane_b32 s48, v40, 8
+; GFX11-FAKE16-NEXT: v_readlane_b32 s39, v40, 7
+; GFX11-FAKE16-NEXT: v_readlane_b32 s38, v40, 6
+; GFX11-FAKE16-NEXT: v_readlane_b32 s37, v40, 5
+; GFX11-FAKE16-NEXT: v_readlane_b32 s36, v40, 4
+; GFX11-FAKE16-NEXT: v_readlane_b32 s35, v40, 3
+; GFX11-FAKE16-NEXT: v_readlane_b32 s34, v40, 2
+; GFX11-FAKE16-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-FAKE16-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s0, -1
+; GFX11-FAKE16-NEXT: s_clause 0x3
+; GFX11-FAKE16-NEXT: scratch_load_b32 v40, off, s32
+; GFX11-FAKE16-NEXT: scratch_load_b32 v41, off, s32 offset:4
+; GFX11-FAKE16-NEXT: scratch_load_b32 v42, off, s32 offset:8
+; GFX11-FAKE16-NEXT: scratch_load_b32 v43, off, s32 offset:12
+; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s0
+; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
+; GFX11-FAKE16-NEXT: s_setpc_b64 s[30:31]
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
%cmp = icmp eq i32 %b, 0
br i1 %cmp, label %cmp.true, label %cmp.false
@@ -171360,7 +177685,7 @@ end:
ret <128 x i8> %phi
}
-define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) {
+define <64 x half> @bitcast_v128i8_to_v64f16(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -177723,7 +184048,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v128i8_to_v64f16_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -183065,7 +189390,7 @@ end:
ret <64 x half> %phi
}
-define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) {
+define <128 x i8> @bitcast_v64f16_to_v128i8(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -188292,7 +194617,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v64f16_to_v128i8_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -193806,7 +200131,7 @@ end:
ret <128 x i8> %phi
}
-define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) {
+define <64 x i16> @bitcast_v128i8_to_v64i16(<128 x i8> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -200103,7 +206428,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v128i8_to_v64i16_scalar(<128 x i8> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v128i8_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -205514,7 +211839,7 @@ end:
ret <64 x i16> %phi
}
-define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) {
+define <128 x i8> @bitcast_v64i16_to_v128i8(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v128i8:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -210913,7 +217238,7 @@ end:
ret <128 x i8> %phi
}
-define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <128 x i8> @bitcast_v64i16_to_v128i8_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v128i8_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -216162,7 +222487,7 @@ end:
ret <128 x i8> %phi
}
-define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) {
+define <64 x half> @bitcast_v64bf16_to_v64f16(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -219819,7 +226144,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v64bf16_to_v64f16_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -223812,7 +230137,7 @@ end:
ret <64 x half> %phi
}
-define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v64f16_to_v64bf16(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -225349,7 +231674,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v64f16_to_v64bf16_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -226885,7 +233210,7 @@ end:
ret <64 x bfloat> %phi
}
-define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) {
+define <64 x i16> @bitcast_v64bf16_to_v64i16(<64 x bfloat> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -230294,7 +236619,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v64bf16_to_v64i16_scalar(<64 x bfloat> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64bf16_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -234195,7 +240520,7 @@ end:
ret <64 x i16> %phi
}
-define <64 x bfloat> @bitcast_v64i16_to_v64bf16(<64 x i16> %a, i32 %b) {
+define <64 x bfloat> @bitcast_v64i16_to_v64bf16(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v64bf16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -235281,7 +241606,7 @@ end:
ret <64 x bfloat> %phi
}
-define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <64 x bfloat> @bitcast_v64i16_to_v64bf16_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v64bf16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -236620,7 +242945,7 @@ end:
ret <64 x bfloat> %phi
}
-define <64 x i16> @bitcast_v64f16_to_v64i16(<64 x half> %a, i32 %b) {
+define <64 x i16> @bitcast_v64f16_to_v64i16(<64 x half> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v64i16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -237560,7 +243885,7 @@ end:
ret <64 x i16> %phi
}
-define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i32 inreg %b) {
+define inreg <64 x i16> @bitcast_v64f16_to_v64i16_scalar(<64 x half> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64f16_to_v64i16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -238646,7 +244971,7 @@ end:
ret <64 x i16> %phi
}
-define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) {
+define <64 x half> @bitcast_v64i16_to_v64f16(<64 x i16> %a, i32 %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v64f16:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -239970,7 +246295,7 @@ end:
ret <64 x half> %phi
}
-define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i32 inreg %b) {
+define inreg <64 x half> @bitcast_v64i16_to_v64f16_scalar(<64 x i16> inreg %a, i32 inreg %b) #0 {
; SI-LABEL: bitcast_v64i16_to_v64f16_scalar:
; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -241282,3 +247607,5 @@ end:
%phi = phi <64 x half> [ %a2, %cmp.true ], [ %a3, %cmp.false ]
ret <64 x half> %phi
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
index 7f6bb85827d31..49231b83a3bb2 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
@@ -6,7 +6,7 @@
declare amdgpu_gfx void @use(...)
-define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) {
+define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inreg %a, {ptr, i32, <4 x i32>} %b) #0 {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_no_stack:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -29,25 +29,23 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_no_stack({ptr, i32, <4 x i32>} inre
ret void
}
-define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr, <4 x i32> %vgpr) {
+define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr, <4 x i32> %vgpr) #0 {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: v_dual_mov_b32 v4, v8 :: v_dual_mov_b32 v5, v9
; GISEL-GFX11-NEXT: v_dual_mov_b32 v6, v10 :: v_dual_mov_b32 v7, v11
; GISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; GISEL-GFX11-NEXT: s_mov_b32 s4, use at abs32@lo
; GISEL-GFX11-NEXT: s_mov_b32 s5, use at abs32@hi
-; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX11-NEXT: s_endpgm
;
; GISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v4, v8
; GISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
@@ -60,27 +58,26 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr,
; GISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
; GISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
+; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX10-NEXT: s_endpgm
;
; DAGISEL-GFX11-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v7, v11 :: v_dual_mov_b32 v6, v10
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v4, v8
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
; DAGISEL-GFX11-NEXT: s_mov_b32 s5, use at abs32@hi
; DAGISEL-GFX11-NEXT: s_mov_b32 s4, use at abs32@lo
-; DAGISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX11-NEXT: s_endpgm
;
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_simple_call:
; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v7, v11
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v6, v10
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v5, v9
@@ -93,18 +90,19 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_simple_call(<4 x i32> inreg %sgpr,
; DAGISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
; DAGISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
+; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX10-NEXT: s_endpgm
call amdgpu_gfx void @use(<4 x i32> %sgpr, <4 x i32> %vgpr)
ret void
}
-define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24 x i32> %vgprs) {
+define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24 x i32> %vgprs) #0 {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_spill:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GISEL-GFX11-NEXT: s_mov_b32 s32, 0
-; GISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 4
; GISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; GISEL-GFX11-NEXT: scratch_store_b32 off, v17, s24
@@ -125,7 +123,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
; GISEL-GFX11-NEXT: scratch_store_b32 off, v25, s25
; GISEL-GFX11-NEXT: s_add_u32 s24, s32, 40
-; GISEL-GFX11-NEXT: v_dual_mov_b32 v32, v8 :: v_dual_mov_b32 v33, v9
; GISEL-GFX11-NEXT: v_dual_mov_b32 v34, v10 :: v_dual_mov_b32 v35, v11
; GISEL-GFX11-NEXT: v_dual_mov_b32 v36, v12 :: v_dual_mov_b32 v37, v13
; GISEL-GFX11-NEXT: v_dual_mov_b32 v38, v14 :: v_dual_mov_b32 v39, v15
@@ -165,7 +162,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; GISEL-GFX10: ; %bb.0:
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v32, v8
; GISEL-GFX10-NEXT: v_mov_b32_e32 v33, v9
; GISEL-GFX10-NEXT: v_mov_b32_e32 v34, v10
@@ -174,6 +170,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; GISEL-GFX10-NEXT: v_mov_b32_e32 v37, v13
; GISEL-GFX10-NEXT: v_mov_b32_e32 v38, v14
; GISEL-GFX10-NEXT: v_mov_b32_e32 v39, v15
+; GISEL-GFX10-NEXT: s_mov_b32 s32, 0
; GISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
; GISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
; GISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
@@ -233,7 +230,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX11: ; %bb.0:
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 0
-; DAGISEL-GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 60
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v16, s32
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v31, s24
@@ -254,7 +251,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v24, s24
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v23, s25
; DAGISEL-GFX11-NEXT: s_add_i32 s24, s32, 24
-; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v32, v15 :: v_dual_mov_b32 v33, v14
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v34, v13 :: v_dual_mov_b32 v35, v12
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v36, v11 :: v_dual_mov_b32 v37, v10
; DAGISEL-GFX11-NEXT: v_dual_mov_b32 v38, v9 :: v_dual_mov_b32 v39, v8
@@ -294,7 +290,6 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX10-LABEL: amdgpu_cs_chain_spill:
; DAGISEL-GFX10: ; %bb.0:
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v32, v15
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v33, v14
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v34, v13
@@ -303,6 +298,7 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v37, v10
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v38, v9
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v39, v8
+; DAGISEL-GFX10-NEXT: s_mov_b32 s32, 0
; DAGISEL-GFX10-NEXT: buffer_store_dword v16, off, s[48:51], s32
; DAGISEL-GFX10-NEXT: buffer_store_dword v17, off, s[48:51], s32 offset:4
; DAGISEL-GFX10-NEXT: buffer_store_dword v18, off, s[48:51], s32 offset:8
@@ -361,14 +357,14 @@ define amdgpu_cs_chain void @amdgpu_cs_chain_spill(<24 x i32> inreg %sgprs, <24
ret void
}
-define amdgpu_cs_chain void @alloca_and_call() {
+define amdgpu_cs_chain void @alloca_and_call() #0 {
; GISEL-GFX11-LABEL: alloca_and_call:
; GISEL-GFX11: ; %bb.0: ; %.entry
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-GFX11-NEXT: s_mov_b32 s32, 16
; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 42
; GISEL-GFX11-NEXT: s_mov_b32 s0, use at abs32@lo
; GISEL-GFX11-NEXT: s_mov_b32 s1, use at abs32@hi
+; GISEL-GFX11-NEXT: s_mov_b32 s32, 16
; GISEL-GFX11-NEXT: scratch_store_b32 off, v0, off
; GISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0
; GISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -377,7 +373,6 @@ define amdgpu_cs_chain void @alloca_and_call() {
; GISEL-GFX10-LABEL: alloca_and_call:
; GISEL-GFX10: ; %bb.0: ; %.entry
; GISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 42
; GISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; GISEL-GFX10-NEXT: s_mov_b32 s4, use at abs32@lo
@@ -385,16 +380,17 @@ define amdgpu_cs_chain void @alloca_and_call() {
; GISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; GISEL-GFX10-NEXT: buffer_store_dword v0, off, s[48:51], 0
; GISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0
+; GISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; GISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GISEL-GFX10-NEXT: s_endpgm
;
; DAGISEL-GFX11-LABEL: alloca_and_call:
; DAGISEL-GFX11: ; %bb.0: ; %.entry
; DAGISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 16
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v0, 42
; DAGISEL-GFX11-NEXT: s_mov_b32 s1, use at abs32@hi
; DAGISEL-GFX11-NEXT: s_mov_b32 s0, use at abs32@lo
+; DAGISEL-GFX11-NEXT: s_mov_b32 s32, 16
; DAGISEL-GFX11-NEXT: scratch_store_b32 off, v0, off
; DAGISEL-GFX11-NEXT: v_mov_b32_e32 v0, 0
; DAGISEL-GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -403,7 +399,6 @@ define amdgpu_cs_chain void @alloca_and_call() {
; DAGISEL-GFX10-LABEL: alloca_and_call:
; DAGISEL-GFX10: ; %bb.0: ; %.entry
; DAGISEL-GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; DAGISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 42
; DAGISEL-GFX10-NEXT: s_mov_b64 s[0:1], s[48:49]
; DAGISEL-GFX10-NEXT: s_mov_b32 s5, use at abs32@hi
@@ -411,6 +406,7 @@ define amdgpu_cs_chain void @alloca_and_call() {
; DAGISEL-GFX10-NEXT: s_mov_b64 s[2:3], s[50:51]
; DAGISEL-GFX10-NEXT: buffer_store_dword v0, off, s[48:51], 0
; DAGISEL-GFX10-NEXT: v_mov_b32_e32 v0, 0
+; DAGISEL-GFX10-NEXT: s_movk_i32 s32, 0x200
; DAGISEL-GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; DAGISEL-GFX10-NEXT: s_endpgm
.entry:
@@ -420,7 +416,7 @@ define amdgpu_cs_chain void @alloca_and_call() {
ret void
}
-define amdgpu_cs void @cs_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs void @cs_to_chain(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: cs_to_chain:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: v_dual_mov_b32 v3, v0 :: v_dual_mov_b32 v10, v2
@@ -506,7 +502,7 @@ define amdgpu_cs void @cs_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
}
; Chain call with SGPR arguments that we cannot prove are uniform.
-define amdgpu_cs void @cs_to_chain_nonuniform(<3 x i32> %a, <3 x i32> %b) {
+define amdgpu_cs void @cs_to_chain_nonuniform(<3 x i32> %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: cs_to_chain_nonuniform:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: v_readfirstlane_b32 s0, v0
@@ -578,7 +574,7 @@ define amdgpu_cs void @cs_to_chain_nonuniform(<3 x i32> %a, <3 x i32> %b) {
unreachable
}
-define amdgpu_cs_chain void @chain_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs_chain void @chain_to_chain(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: chain_to_chain:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -643,7 +639,7 @@ define amdgpu_cs_chain void @chain_to_chain(<3 x i32> inreg %a, <3 x i32> %b) {
unreachable
}
-define amdgpu_cs_chain void @chain_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs_chain void @chain_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: chain_to_chain_wwm:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -725,7 +721,7 @@ define amdgpu_cs_chain void @chain_to_chain_wwm(<3 x i32> inreg %a, <3 x i32> %b
unreachable
}
-define amdgpu_cs_chain void @chain_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs_chain void @chain_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: chain_to_chain_use_all_v0_v7:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -790,7 +786,7 @@ define amdgpu_cs_chain void @chain_to_chain_use_all_v0_v7(<3 x i32> inreg %a, <3
unreachable
}
-define amdgpu_cs_chain void @chain_to_chain_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs_chain void @chain_to_chain_fewer_args(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: chain_to_chain_fewer_args:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -857,7 +853,7 @@ define amdgpu_cs_chain void @chain_to_chain_fewer_args(<3 x i32> inreg %a, <3 x
unreachable
}
-define amdgpu_cs_chain void @chain_to_chain_more_args(<3 x i32> inreg %a, <3 x i32> %b) {
+define amdgpu_cs_chain void @chain_to_chain_more_args(<3 x i32> inreg %a, <3 x i32> %b) #0 {
; GISEL-GFX11-LABEL: chain_to_chain_more_args:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -930,7 +926,7 @@ define amdgpu_cs_chain void @chain_to_chain_more_args(<3 x i32> inreg %a, <3 x i
unreachable
}
-define amdgpu_cs_chain void @amdgpu_cs_chain_dont_realign_stack(i32 %idx) {
+define amdgpu_cs_chain void @amdgpu_cs_chain_dont_realign_stack(i32 %idx) #0 {
; GISEL-GFX11-LABEL: amdgpu_cs_chain_dont_realign_stack:
; GISEL-GFX11: ; %bb.0:
; GISEL-GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1006,3 +1002,5 @@ declare amdgpu_cs_chain void @chain_callee(<3 x i32> inreg, <3 x i32>)
declare amdgpu_cs_chain void @chain_callee_4(<4 x i32> inreg, <4 x i32>)
declare i32 @llvm.amdgcn.set.inactive(i32, i32)
declare i32 @llvm.amdgcn.wwm(i32)
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
index 7669ae21f6635..1a0f22f23acaa 100644
--- a/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
+++ b/llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-fp-nosave.ll
@@ -8,7 +8,7 @@
declare amdgpu_gfx void @foo()
-define amdgpu_cs_chain void @test_alloca() {
+define amdgpu_cs_chain void @test_alloca() #0 {
; GFX12-LABEL: test_alloca:
; GFX12: ; %bb.0: ; %.entry
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -43,7 +43,7 @@ SW_C: ; preds = %.entry
ret void
}
-define amdgpu_cs_chain void @test_alloca_var_uniform(i32 inreg %count) {
+define amdgpu_cs_chain void @test_alloca_var_uniform(i32 inreg %count) #0 {
; GFX12-LABEL: test_alloca_var_uniform:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -81,7 +81,7 @@ define amdgpu_cs_chain void @test_alloca_var_uniform(i32 inreg %count) {
ret void
}
-define amdgpu_cs_chain void @test_alloca_var(i32 %count) {
+define amdgpu_cs_chain void @test_alloca_var(i32 %count) #0 {
; GFX12-LABEL: test_alloca_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -142,7 +142,7 @@ define amdgpu_cs_chain void @test_alloca_var(i32 %count) {
ret void
}
-define amdgpu_cs_chain void @test_alloca_and_call() {
+define amdgpu_cs_chain void @test_alloca_and_call() #0 {
; GFX12-LABEL: test_alloca_and_call:
; GFX12: ; %bb.0: ; %.entry
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -194,7 +194,7 @@ SW_C: ; preds = %.entry
ret void
}
-define amdgpu_cs_chain void @test_alloca_and_call_var_uniform(i32 inreg %count) {
+define amdgpu_cs_chain void @test_alloca_and_call_var_uniform(i32 inreg %count) #0 {
; GFX12-LABEL: test_alloca_and_call_var_uniform:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -248,7 +248,7 @@ define amdgpu_cs_chain void @test_alloca_and_call_var_uniform(i32 inreg %count)
ret void
}
-define amdgpu_cs_chain void @test_alloca_and_call_var(i32 %count) {
+define amdgpu_cs_chain void @test_alloca_and_call_var(i32 %count) #0 {
; GFX12-LABEL: test_alloca_and_call_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -325,7 +325,7 @@ define amdgpu_cs_chain void @test_alloca_and_call_var(i32 %count) {
ret void
}
-define amdgpu_cs_chain void @test_call_and_alloca() {
+define amdgpu_cs_chain void @test_call_and_alloca() #0 {
; GFX12-LABEL: test_call_and_alloca:
; GFX12: ; %bb.0: ; %.entry
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -376,7 +376,7 @@ SW_C: ; preds = %.entry
ret void
}
-define amdgpu_cs_chain void @test_call_and_alloca_var_uniform(i32 inreg %count) {
+define amdgpu_cs_chain void @test_call_and_alloca_var_uniform(i32 inreg %count) #0 {
; GFX12-LABEL: test_call_and_alloca_var_uniform:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -430,7 +430,7 @@ define amdgpu_cs_chain void @test_call_and_alloca_var_uniform(i32 inreg %count)
ret void
}
-define amdgpu_cs_chain void @test_call_and_alloca_var(i32 %count) {
+define amdgpu_cs_chain void @test_call_and_alloca_var(i32 %count) #0 {
; GFX12-LABEL: test_call_and_alloca_var:
; GFX12: ; %bb.0:
; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -508,3 +508,5 @@ define amdgpu_cs_chain void @test_call_and_alloca_var(i32 %count) {
store i32 0, ptr addrspace(5) %v, align 4
ret void
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
index f96007ae513bd..1c6a2d09c9214 100644
--- a/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
@@ -431,6 +431,130 @@ define void @test_call_external_void_func_f16_inreg(half inreg %arg) #0 {
ret void
}
+<<<<<<< HEAD
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+define void @test_call_external_void_func_bf16_inreg(bfloat inreg %arg) #0 {
+; GFX9-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s17, s33
+; GFX9-NEXT: s_mov_b32 s33, s32
+; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX9-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-NEXT: v_writelane_b32 v40, s17, 2
+; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: s_getpc_b64 s[18:19]
+; GFX9-NEXT: s_add_u32 s18, s18, external_void_func_bf16_inreg at rel32@lo+4
+; GFX9-NEXT: s_addc_u32 s19, s19, external_void_func_bf16_inreg at rel32@hi+12
+; GFX9-NEXT: s_mov_b32 s0, s16
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
+; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
+; GFX9-NEXT: v_readlane_b32 s31, v40, 1
+; GFX9-NEXT: v_readlane_b32 s30, v40, 0
+; GFX9-NEXT: s_mov_b32 s32, s33
+; GFX9-NEXT: v_readlane_b32 s4, v40, 2
+; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: s_mov_b32 s33, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_mov_b32 s1, s33
+; GFX11-NEXT: s_mov_b32 s33, s32
+; GFX11-NEXT: s_or_saveexec_b32 s2, -1
+; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-NEXT: s_mov_b32 exec_lo, s2
+; GFX11-NEXT: v_writelane_b32 v40, s1, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: s_getpc_b64 s[2:3]
+; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_bf16_inreg at rel32@lo+4
+; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_bf16_inreg at rel32@hi+12
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-NEXT: s_mov_b32 s32, s33
+; GFX11-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: s_mov_b32 s33, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ call void @external_void_func_bf16_inreg(bfloat inreg %arg)
+ ret void
+}
+
+=======
+define void @test_call_external_void_func_bf16_inreg(bfloat inreg %arg) #0 {
+; GFX9-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s17, s33
+; GFX9-NEXT: s_mov_b32 s33, s32
+; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX9-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-NEXT: v_writelane_b32 v40, s17, 2
+; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: s_getpc_b64 s[18:19]
+; GFX9-NEXT: s_add_u32 s18, s18, external_void_func_bf16_inreg at rel32@lo+4
+; GFX9-NEXT: s_addc_u32 s19, s19, external_void_func_bf16_inreg at rel32@hi+12
+; GFX9-NEXT: s_mov_b32 s0, s16
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
+; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
+; GFX9-NEXT: v_readlane_b32 s31, v40, 1
+; GFX9-NEXT: v_readlane_b32 s30, v40, 0
+; GFX9-NEXT: s_mov_b32 s32, s33
+; GFX9-NEXT: v_readlane_b32 s4, v40, 2
+; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: s_mov_b32 s33, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: test_call_external_void_func_bf16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_mov_b32 s1, s33
+; GFX11-NEXT: s_mov_b32 s33, s32
+; GFX11-NEXT: s_or_saveexec_b32 s2, -1
+; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-NEXT: s_mov_b32 exec_lo, s2
+; GFX11-NEXT: v_writelane_b32 v40, s1, 2
+; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: s_getpc_b64 s[2:3]
+; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_bf16_inreg at rel32@lo+4
+; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_bf16_inreg at rel32@hi+12
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-NEXT: s_mov_b32 s32, s33
+; GFX11-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: s_mov_b32 s33, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ call void @external_void_func_bf16_inreg(bfloat inreg %arg)
+ ret void
+}
+
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
define void @test_call_external_void_func_f32_inreg(float inreg %arg) #0 {
; GFX9-LABEL: test_call_external_void_func_f32_inreg:
; GFX9: ; %bb.0:
@@ -583,6 +707,132 @@ define void @test_call_external_void_func_v2f16_inreg(<2 x half> inreg %arg) #0
ret void
}
+<<<<<<< HEAD
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+
+define void @test_call_external_void_func_v2bf16_inreg(<2 x bfloat> inreg %arg) #0 {
+; GFX9-LABEL: test_call_external_void_func_v2bf16_inreg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s17, s33
+; GFX9-NEXT: s_mov_b32 s33, s32
+; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX9-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-NEXT: v_writelane_b32 v40, s17, 2
+; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: s_getpc_b64 s[18:19]
+; GFX9-NEXT: s_add_u32 s18, s18, external_void_func_v2bf16_inreg at rel32@lo+4
+; GFX9-NEXT: s_addc_u32 s19, s19, external_void_func_v2bf16_inreg at rel32@hi+12
+; GFX9-NEXT: s_mov_b32 s0, s16
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
+; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
+; GFX9-NEXT: v_readlane_b32 s31, v40, 1
+; GFX9-NEXT: v_readlane_b32 s30, v40, 0
+; GFX9-NEXT: s_mov_b32 s32, s33
+; GFX9-NEXT: v_readlane_b32 s4, v40, 2
+; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: s_mov_b32 s33, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: test_call_external_void_func_v2bf16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_mov_b32 s1, s33
+; GFX11-NEXT: s_mov_b32 s33, s32
+; GFX11-NEXT: s_or_saveexec_b32 s2, -1
+; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-NEXT: s_mov_b32 exec_lo, s2
+; GFX11-NEXT: v_writelane_b32 v40, s1, 2
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: s_getpc_b64 s[2:3]
+; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_v2bf16_inreg at rel32@lo+4
+; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_v2bf16_inreg at rel32@hi+12
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-NEXT: s_mov_b32 s32, s33
+; GFX11-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: s_mov_b32 s33, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ call void @external_void_func_v2bf16_inreg(<2 x bfloat> inreg %arg)
+ ret void
+}
+
+=======
+
+define void @test_call_external_void_func_v2bf16_inreg(<2 x bfloat> inreg %arg) #0 {
+; GFX9-LABEL: test_call_external_void_func_v2bf16_inreg:
+; GFX9: ; %bb.0:
+; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX9-NEXT: s_mov_b32 s17, s33
+; GFX9-NEXT: s_mov_b32 s33, s32
+; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
+; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX9-NEXT: s_mov_b64 exec, s[18:19]
+; GFX9-NEXT: v_writelane_b32 v40, s17, 2
+; GFX9-NEXT: s_addk_i32 s32, 0x400
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: s_getpc_b64 s[18:19]
+; GFX9-NEXT: s_add_u32 s18, s18, external_void_func_v2bf16_inreg at rel32@lo+4
+; GFX9-NEXT: s_addc_u32 s19, s19, external_void_func_v2bf16_inreg at rel32@hi+12
+; GFX9-NEXT: s_mov_b32 s0, s16
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
+; GFX9-NEXT: s_swappc_b64 s[30:31], s[18:19]
+; GFX9-NEXT: v_readlane_b32 s31, v40, 1
+; GFX9-NEXT: v_readlane_b32 s30, v40, 0
+; GFX9-NEXT: s_mov_b32 s32, s33
+; GFX9-NEXT: v_readlane_b32 s4, v40, 2
+; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
+; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload
+; GFX9-NEXT: s_mov_b64 exec, s[6:7]
+; GFX9-NEXT: s_mov_b32 s33, s4
+; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: s_setpc_b64 s[30:31]
+;
+; GFX11-LABEL: test_call_external_void_func_v2bf16_inreg:
+; GFX11: ; %bb.0:
+; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; GFX11-NEXT: s_mov_b32 s1, s33
+; GFX11-NEXT: s_mov_b32 s33, s32
+; GFX11-NEXT: s_or_saveexec_b32 s2, -1
+; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
+; GFX11-NEXT: s_mov_b32 exec_lo, s2
+; GFX11-NEXT: v_writelane_b32 v40, s1, 2
+; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: s_getpc_b64 s[2:3]
+; GFX11-NEXT: s_add_u32 s2, s2, external_void_func_v2bf16_inreg at rel32@lo+4
+; GFX11-NEXT: s_addc_u32 s3, s3, external_void_func_v2bf16_inreg at rel32@hi+12
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: s_swappc_b64 s[30:31], s[2:3]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: v_readlane_b32 s31, v40, 1
+; GFX11-NEXT: v_readlane_b32 s30, v40, 0
+; GFX11-NEXT: s_mov_b32 s32, s33
+; GFX11-NEXT: v_readlane_b32 s0, v40, 2
+; GFX11-NEXT: s_or_saveexec_b32 s1, -1
+; GFX11-NEXT: scratch_load_b32 v40, off, s33 ; 4-byte Folded Reload
+; GFX11-NEXT: s_mov_b32 exec_lo, s1
+; GFX11-NEXT: s_mov_b32 s33, s0
+; GFX11-NEXT: s_waitcnt vmcnt(0)
+; GFX11-NEXT: s_setpc_b64 s[30:31]
+ call void @external_void_func_v2bf16_inreg(<2 x bfloat> inreg %arg)
+ ret void
+}
+
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
define void @test_call_external_void_func_v3f16_inreg(<3 x half> inreg %arg) #0 {
; GFX11-LABEL: test_call_external_void_func_v3f16_inreg:
; GFX11: ; %bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
index 360ea2befda20..c407f7645315d 100644
--- a/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/call-argument-types.ll
@@ -7129,7 +7129,6 @@ define void @stack_12xv3i32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 11
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7138,6 +7137,7 @@ define void @stack_12xv3i32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 13
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; VI-NEXT: v_mov_b32_e32 v0, 14
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; VI-NEXT: v_mov_b32_e32 v0, 15
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7197,7 +7197,6 @@ define void @stack_12xv3i32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 11
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7206,6 +7205,7 @@ define void @stack_12xv3i32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 13
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; CI-NEXT: v_mov_b32_e32 v0, 14
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; CI-NEXT: v_mov_b32_e32 v0, 15
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7265,7 +7265,6 @@ define void @stack_12xv3i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 11
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7274,6 +7273,7 @@ define void @stack_12xv3i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 14
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -7383,7 +7383,6 @@ define void @stack_12xv3i32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 11
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7392,6 +7391,7 @@ define void @stack_12xv3i32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 13
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; HSA-NEXT: v_mov_b32_e32 v0, 14
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; HSA-NEXT: v_mov_b32_e32 v0, 15
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -7468,7 +7468,6 @@ define void @stack_12xv3f32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 0x41300000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7477,6 +7476,7 @@ define void @stack_12xv3f32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 0x41500000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; VI-NEXT: v_mov_b32_e32 v0, 0x41600000
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; VI-NEXT: v_mov_b32_e32 v0, 0x41700000
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7536,7 +7536,6 @@ define void @stack_12xv3f32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 0x41300000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7545,6 +7544,7 @@ define void @stack_12xv3f32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 0x41500000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; CI-NEXT: v_mov_b32_e32 v0, 0x41600000
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; CI-NEXT: v_mov_b32_e32 v0, 0x41700000
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7604,7 +7604,6 @@ define void @stack_12xv3f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41300000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7613,6 +7612,7 @@ define void @stack_12xv3f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -7726,7 +7726,6 @@ define void @stack_12xv3f32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 0x41300000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7735,6 +7734,7 @@ define void @stack_12xv3f32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 0x41500000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; HSA-NEXT: v_mov_b32_e32 v0, 0x41600000
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
; HSA-NEXT: v_mov_b32_e32 v0, 0x41700000
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -7811,7 +7811,6 @@ define void @stack_8xv5i32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 7
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7828,6 +7827,7 @@ define void @stack_8xv5i32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 13
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; VI-NEXT: v_mov_b32_e32 v0, 14
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; VI-NEXT: v_mov_b32_e32 v0, 15
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7887,7 +7887,6 @@ define void @stack_8xv5i32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 7
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7904,6 +7903,7 @@ define void @stack_8xv5i32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 13
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; CI-NEXT: v_mov_b32_e32 v0, 14
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; CI-NEXT: v_mov_b32_e32 v0, 15
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -7963,7 +7963,6 @@ define void @stack_8xv5i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 7
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -7980,6 +7979,7 @@ define void @stack_8xv5i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 14
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -8094,7 +8094,6 @@ define void @stack_8xv5i32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 7
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8111,6 +8110,7 @@ define void @stack_8xv5i32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 13
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; HSA-NEXT: v_mov_b32_e32 v0, 14
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; HSA-NEXT: v_mov_b32_e32 v0, 15
; HSA-NEXT: v_writelane_b32 v40, s30, 0
@@ -8183,7 +8183,6 @@ define void @stack_8xv5f32() #0 {
; VI-NEXT: s_or_saveexec_b64 s[8:9], -1
; VI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; VI-NEXT: s_mov_b64 exec, s[8:9]
-; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: s_addk_i32 s32, 0x400
; VI-NEXT: v_mov_b32_e32 v0, 0x40e00000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8200,6 +8199,7 @@ define void @stack_8xv5f32() #0 {
; VI-NEXT: v_mov_b32_e32 v0, 0x41500000
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; VI-NEXT: v_mov_b32_e32 v0, 0x41600000
+; VI-NEXT: v_writelane_b32 v40, s4, 2
; VI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; VI-NEXT: v_mov_b32_e32 v0, 0x41700000
; VI-NEXT: v_writelane_b32 v40, s30, 0
@@ -8259,7 +8259,6 @@ define void @stack_8xv5f32() #0 {
; CI-NEXT: s_or_saveexec_b64 s[8:9], -1
; CI-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CI-NEXT: s_mov_b64 exec, s[8:9]
-; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: s_addk_i32 s32, 0x400
; CI-NEXT: v_mov_b32_e32 v0, 0x40e00000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8276,6 +8275,7 @@ define void @stack_8xv5f32() #0 {
; CI-NEXT: v_mov_b32_e32 v0, 0x41500000
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; CI-NEXT: v_mov_b32_e32 v0, 0x41600000
+; CI-NEXT: v_writelane_b32 v40, s4, 2
; CI-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; CI-NEXT: v_mov_b32_e32 v0, 0x41700000
; CI-NEXT: v_writelane_b32 v40, s30, 0
@@ -8335,7 +8335,6 @@ define void @stack_8xv5f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[8:9], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[8:9]
-; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x40e00000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8352,6 +8351,7 @@ define void @stack_8xv5f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
+; GFX9-NEXT: v_writelane_b32 v40, s4, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -8469,7 +8469,6 @@ define void @stack_8xv5f32() #0 {
; HSA-NEXT: s_or_saveexec_b64 s[8:9], -1
; HSA-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; HSA-NEXT: s_mov_b64 exec, s[8:9]
-; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: s_addk_i32 s32, 0x400
; HSA-NEXT: v_mov_b32_e32 v0, 0x40e00000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -8486,6 +8485,7 @@ define void @stack_8xv5f32() #0 {
; HSA-NEXT: v_mov_b32_e32 v0, 0x41500000
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; HSA-NEXT: v_mov_b32_e32 v0, 0x41600000
+; HSA-NEXT: v_writelane_b32 v40, s4, 2
; HSA-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:28
; HSA-NEXT: v_mov_b32_e32 v0, 0x41700000
; HSA-NEXT: v_writelane_b32 v40, s30, 0
diff --git a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
index e691fdaea67e3..5f965ba431ab5 100644
--- a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
+++ b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
@@ -420,8 +420,8 @@ define void @func_indirect_use_workitem_id_x() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_x at gotpcrel32@hi+12
@@ -453,8 +453,8 @@ define void @func_indirect_use_workitem_id_y() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_y at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_y at gotpcrel32@hi+12
@@ -486,8 +486,8 @@ define void @func_indirect_use_workitem_id_z() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_z at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_z at gotpcrel32@hi+12
@@ -939,8 +939,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GFX7-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[6:7]
-; GFX7-NEXT: v_writelane_b32 v40, s4, 2
; GFX7-NEXT: s_addk_i32 s32, 0x400
+; GFX7-NEXT: v_writelane_b32 v40, s4, 2
; GFX7-NEXT: s_getpc_b64 s[4:5]
; GFX7-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GFX7-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1003,8 +1003,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GFX90A-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX90A-NEXT: s_mov_b64 exec, s[6:7]
-; GFX90A-NEXT: v_writelane_b32 v40, s4, 2
; GFX90A-NEXT: s_addk_i32 s32, 0x400
+; GFX90A-NEXT: v_writelane_b32 v40, s4, 2
; GFX90A-NEXT: s_getpc_b64 s[4:5]
; GFX90A-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GFX90A-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1081,9 +1081,9 @@ define void @too_many_args_call_too_many_args_use_workitem_id_x(
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -1396,7 +1396,6 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: v_mov_b32_e32 v0, 0x3e7
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s33
@@ -1404,6 +1403,7 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: v_mov_b32_e32 v0, 0x140
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s33
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x_byval at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x_byval at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
index 2854bdca76d01..bb2f06bfe83f8 100644
--- a/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
+++ b/llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
@@ -265,8 +265,8 @@ define void @func_indirect_use_workitem_id_x() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_x at gotpcrel32@hi+12
@@ -298,8 +298,8 @@ define void @func_indirect_use_workitem_id_y() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_y at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_y at gotpcrel32@hi+12
@@ -331,8 +331,8 @@ define void @func_indirect_use_workitem_id_z() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, use_workitem_id_z at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, use_workitem_id_z at gotpcrel32@hi+12
@@ -651,8 +651,8 @@ define void @func_call_too_many_args_use_workitem_id_x(i32 %arg0) #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -729,9 +729,9 @@ define void @too_many_args_call_too_many_args_use_workitem_id_x(
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x at gotpcrel32@hi+12
@@ -970,7 +970,6 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: v_mov_b32_e32 v0, 0x3e7
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s33
@@ -978,6 +977,7 @@ define void @func_call_too_many_args_use_workitem_id_x_byval() #1 {
; GCN-NEXT: v_mov_b32_e32 v0, 0x140
; GCN-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s33
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, too_many_args_use_workitem_id_x_byval at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, too_many_args_use_workitem_id_x_byval at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll b/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
index c05eef51c276f..bcccf50e3805c 100644
--- a/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
+++ b/llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
@@ -287,10 +287,10 @@ define amdgpu_gfx void @amdgpu_gfx() #0 {
; CHECK-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-TRUE16-NEXT: v_mov_b16_e32 v0.l, 15
-; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-TRUE16-NEXT: s_mov_b32 s1, callee at abs32@hi
; CHECK-TRUE16-NEXT: s_mov_b32 s0, callee at abs32@lo
; CHECK-TRUE16-NEXT: s_add_co_i32 s32, s32, 16
+; CHECK-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-TRUE16-NEXT: s_wait_storecnt 0x0
; CHECK-TRUE16-NEXT: scratch_store_b8 off, v0, s33 scope:SCOPE_SYS
; CHECK-TRUE16-NEXT: s_wait_storecnt 0x0
@@ -327,10 +327,10 @@ define amdgpu_gfx void @amdgpu_gfx() #0 {
; CHECK-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-FAKE16-NEXT: v_mov_b32_e32 v0, 15
-; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-FAKE16-NEXT: s_mov_b32 s1, callee at abs32@hi
; CHECK-FAKE16-NEXT: s_mov_b32 s0, callee at abs32@lo
; CHECK-FAKE16-NEXT: s_add_co_i32 s32, s32, 16
+; CHECK-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; CHECK-FAKE16-NEXT: s_wait_storecnt 0x0
; CHECK-FAKE16-NEXT: scratch_store_b8 off, v0, s33 scope:SCOPE_SYS
; CHECK-FAKE16-NEXT: s_wait_storecnt 0x0
diff --git a/llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll b/llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
index d19a260db3550..ca4653e00af58 100644
--- a/llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
+++ b/llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
@@ -4,7 +4,7 @@
; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11-SDAG %s
; RUN: llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11-GISEL %s
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform(i32 %n) {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_uniform:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x0
@@ -82,7 +82,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform(i32 %n) {
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_over_aligned(i32 %n) {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_over_aligned(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_uniform_over_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x0
@@ -165,7 +165,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_over_aligned(i
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_under_aligned(i32 %n) {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_under_aligned(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_uniform_under_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_load_dword s4, s[8:9], 0x0
@@ -243,7 +243,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_uniform_under_aligned(
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent() {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_divergent:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_add_u32 s0, s0, s17
@@ -358,7 +358,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent() {
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_over_aligned() {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_over_aligned() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_divergent_over_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_movk_i32 s32, 0x2000
@@ -478,7 +478,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_over_aligned
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_under_aligned() {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_under_aligned() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_divergent_under_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_add_u32 s0, s0, s17
@@ -590,7 +590,7 @@ define amdgpu_kernel void @test_dynamic_stackalloc_kernel_divergent_under_aligne
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_multiple_allocas(i32 %n, i32 %m) {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_multiple_allocas(i32 %n, i32 %m) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_multiple_allocas:
; GFX9-SDAG: ; %bb.0: ; %entry
; GFX9-SDAG-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0
@@ -820,7 +820,7 @@ bb.1:
ret void
}
-define amdgpu_kernel void @test_dynamic_stackalloc_kernel_control_flow(i32 %n, i32 %m) {
+define amdgpu_kernel void @test_dynamic_stackalloc_kernel_control_flow(i32 %n, i32 %m) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_kernel_control_flow:
; GFX9-SDAG: ; %bb.0: ; %entry
; GFX9-SDAG-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x0
@@ -1030,7 +1030,7 @@ bb.2:
ret void
}
-define void @test_dynamic_stackalloc_device_uniform(i32 %n) {
+define void @test_dynamic_stackalloc_device_uniform(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_uniform:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1152,22 +1152,48 @@ define void @test_dynamic_stackalloc_device_uniform(i32 %n) {
ret void
}
-define void @test_dynamic_stackalloc_device_uniform_over_aligned(i32 %n) {
+define void @test_dynamic_stackalloc_device_uniform_over_aligned(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_uniform_over_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+<<<<<<< HEAD
; GFX9-SDAG-NEXT: s_mov_b32 s10, s33
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX9-SDAG-NEXT: s_mov_b32 s9, s33
+=======
+; GFX9-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
+; GFX9-SDAG-NEXT: s_mov_b32 s9, s33
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX9-SDAG-NEXT: s_add_i32 s33, s32, 0x1fc0
+<<<<<<< HEAD
; GFX9-SDAG-NEXT: s_mov_b32 s11, s34
; GFX9-SDAG-NEXT: s_mov_b32 s34, s32
; GFX9-SDAG-NEXT: s_addk_i32 s32, 0x4000
; GFX9-SDAG-NEXT: s_add_i32 s4, s32, 0x1fff
; GFX9-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
; GFX9-SDAG-NEXT: s_and_b32 s6, s4, 0xffffe000
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX9-SDAG-NEXT: s_mov_b32 s10, s34
+; GFX9-SDAG-NEXT: s_and_b32 s33, s33, 0xffffe000
+; GFX9-SDAG-NEXT: s_mov_b32 s34, s32
+; GFX9-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
+=======
+; GFX9-SDAG-NEXT: s_mov_b32 s10, s34
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX9-SDAG-NEXT: v_and_b32_e32 v0, -16, v0
; GFX9-SDAG-NEXT: s_mov_b64 s[4:5], exec
+<<<<<<< HEAD
; GFX9-SDAG-NEXT: s_mov_b32 s7, 0
; GFX9-SDAG-NEXT: s_and_b32 s33, s33, 0xffffe000
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX9-SDAG-NEXT: s_mov_b32 s6, 0
+; GFX9-SDAG-NEXT: s_addk_i32 s32, 0x4000
+=======
+; GFX9-SDAG-NEXT: s_mov_b32 s6, 0
+; GFX9-SDAG-NEXT: s_and_b32 s33, s33, 0xffffe000
+; GFX9-SDAG-NEXT: s_mov_b32 s34, s32
+; GFX9-SDAG-NEXT: s_addk_i32 s32, 0x4000
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX9-SDAG-NEXT: .LBB9_1: ; =>This Inner Loop Header: Depth=1
; GFX9-SDAG-NEXT: s_ff1_i32_b64 s8, s[4:5]
; GFX9-SDAG-NEXT: v_readlane_b32 s9, v0, s8
@@ -1224,36 +1250,100 @@ define void @test_dynamic_stackalloc_device_uniform_over_aligned(i32 %n) {
; GFX11-SDAG-LABEL: test_dynamic_stackalloc_device_uniform_over_aligned:
; GFX11-SDAG: ; %bb.0:
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
; GFX11-SDAG-NEXT: s_mov_b32 s5, s33
; GFX11-SDAG-NEXT: s_add_i32 s33, s32, 0x7f
; GFX11-SDAG-NEXT: s_mov_b32 s6, s34
; GFX11-SDAG-NEXT: s_mov_b32 s34, s32
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_mov_b32 s4, s33
+; GFX11-SDAG-NEXT: s_add_i32 s33, s32, 0x7f
+; GFX11-SDAG-NEXT: s_mov_b32 s5, s34
+; GFX11-SDAG-NEXT: s_and_b32 s33, s33, 0xffffff80
+; GFX11-SDAG-NEXT: s_mov_b32 s34, s32
+; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
+; GFX11-SDAG-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
+=======
+; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, v0, 2, 15
+; GFX11-SDAG-NEXT: s_mov_b32 s4, s33
+; GFX11-SDAG-NEXT: s_add_i32 s33, s32, 0x7f
+; GFX11-SDAG-NEXT: s_mov_b32 s5, s34
+; GFX11-SDAG-NEXT: s_mov_b32 s1, exec_lo
+; GFX11-SDAG-NEXT: v_and_b32_e32 v0, -16, v0
+; GFX11-SDAG-NEXT: s_mov_b32 s0, 0
+; GFX11-SDAG-NEXT: s_and_b32 s33, s33, 0xffffff80
+; GFX11-SDAG-NEXT: s_mov_b32 s34, s32
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: s_addk_i32 s32, 0x100
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: v_and_b32_e32 v0, -16, v0
; GFX11-SDAG-NEXT: s_add_i32 s0, s32, 0xfff
; GFX11-SDAG-NEXT: s_mov_b32 s2, exec_lo
; GFX11-SDAG-NEXT: s_and_b32 s0, s0, 0xfffff000
; GFX11-SDAG-NEXT: s_mov_b32 s1, 0
; GFX11-SDAG-NEXT: s_and_b32 s33, s33, 0xffffff80
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-SDAG-NEXT: v_and_b32_e32 v0, -16, v0
+=======
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: .LBB9_1: ; =>This Inner Loop Header: Depth=1
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: s_ctz_i32_b32 s3, s2
; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-SDAG-NEXT: v_readlane_b32 s4, v0, s3
; GFX11-SDAG-NEXT: s_bitset0_b32 s2, s3
; GFX11-SDAG-NEXT: s_max_u32 s1, s1, s4
; GFX11-SDAG-NEXT: s_cmp_lg_u32 s2, 0
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_ctz_i32_b32 s2, s1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)
+; GFX11-SDAG-NEXT: v_readlane_b32 s3, v0, s2
+; GFX11-SDAG-NEXT: s_bitset0_b32 s1, s2
+; GFX11-SDAG-NEXT: s_max_u32 s0, s0, s3
+; GFX11-SDAG-NEXT: s_cmp_lg_u32 s1, 0
+=======
+; GFX11-SDAG-NEXT: s_ctz_i32_b32 s2, s1
+; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-SDAG-NEXT: v_readlane_b32 s3, v0, s2
+; GFX11-SDAG-NEXT: s_bitset0_b32 s1, s2
+; GFX11-SDAG-NEXT: s_max_u32 s0, s0, s3
+; GFX11-SDAG-NEXT: s_cmp_lg_u32 s1, 0
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: s_cbranch_scc1 .LBB9_1
; GFX11-SDAG-NEXT: ; %bb.2:
; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, s1, 5, s0
; GFX11-SDAG-NEXT: v_mov_b32_e32 v1, 10
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: s_mov_b32 s33, s5
; GFX11-SDAG-NEXT: s_delay_alu instid0(VALU_DEP_2)
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_and_b32 s1, s1, 0xfffff000
+; GFX11-SDAG-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, s0, 5, s1
+; GFX11-SDAG-NEXT: scratch_store_b32 off, v1, s1 dlc
+; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
+=======
+; GFX11-SDAG-NEXT: s_and_b32 s1, s1, 0xfffff000
+; GFX11-SDAG-NEXT: s_mov_b32 s33, s4
+; GFX11-SDAG-NEXT: v_lshl_add_u32 v0, s0, 5, s1
+; GFX11-SDAG-NEXT: scratch_store_b32 off, v1, s1 dlc
+; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: v_readfirstlane_b32 s32, v0
; GFX11-SDAG-NEXT: scratch_store_b32 off, v1, s0 dlc
; GFX11-SDAG-NEXT: s_waitcnt_vscnt null, 0x0
; GFX11-SDAG-NEXT: s_mov_b32 s32, s34
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: s_mov_b32 s34, s6
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_mov_b32 s34, s5
+; GFX11-SDAG-NEXT: s_mov_b32 s33, s4
+=======
+; GFX11-SDAG-NEXT: s_mov_b32 s34, s5
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: s_setpc_b64 s[30:31]
;
; GFX11-GISEL-LABEL: test_dynamic_stackalloc_device_uniform_over_aligned:
@@ -1294,7 +1384,7 @@ define void @test_dynamic_stackalloc_device_uniform_over_aligned(i32 %n) {
ret void
}
-define void @test_dynamic_stackalloc_device_uniform_under_aligned(i32 %n) {
+define void @test_dynamic_stackalloc_device_uniform_under_aligned(i32 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_uniform_under_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1416,7 +1506,7 @@ define void @test_dynamic_stackalloc_device_uniform_under_aligned(i32 %n) {
ret void
}
-define void @test_dynamic_stackalloc_device_divergent() {
+define void @test_dynamic_stackalloc_device_divergent() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_divergent:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1545,7 +1635,7 @@ define void @test_dynamic_stackalloc_device_divergent() {
ret void
}
-define void @test_dynamic_stackalloc_device_divergent_over_aligned() {
+define void @test_dynamic_stackalloc_device_divergent_over_aligned() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_divergent_over_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1692,7 +1782,7 @@ define void @test_dynamic_stackalloc_device_divergent_over_aligned() {
ret void
}
-define void @test_dynamic_stackalloc_device_divergent_under_aligned() {
+define void @test_dynamic_stackalloc_device_divergent_under_aligned() #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_divergent_under_aligned:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1821,7 +1911,7 @@ define void @test_dynamic_stackalloc_device_divergent_under_aligned() {
ret void
}
-define void @test_dynamic_stackalloc_device_multiple_allocas(i32 %n, i32 %m) {
+define void @test_dynamic_stackalloc_device_multiple_allocas(i32 %n, i32 %m) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_multiple_allocas:
; GFX9-SDAG: ; %bb.0: ; %entry
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2169,13 +2259,21 @@ bb.1:
ret void
}
-define void @test_dynamic_stackalloc_device_control_flow(i32 %n, i32 %m) {
+define void @test_dynamic_stackalloc_device_control_flow(i32 %n, i32 %m) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_control_flow:
; GFX9-SDAG: ; %bb.0: ; %entry
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-SDAG-NEXT: s_mov_b32 s12, s33
; GFX9-SDAG-NEXT: s_add_i32 s33, s32, 0xfc0
+<<<<<<< HEAD
; GFX9-SDAG-NEXT: s_mov_b32 s13, s34
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX9-SDAG-NEXT: s_mov_b32 s12, s34
+; GFX9-SDAG-NEXT: s_and_b32 s33, s33, 0xfffff000
+; GFX9-SDAG-NEXT: s_mov_b32 s34, s32
+=======
+; GFX9-SDAG-NEXT: s_mov_b32 s12, s34
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX9-SDAG-NEXT: s_mov_b32 s8, 0
; GFX9-SDAG-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-SDAG-NEXT: s_and_b32 s33, s33, 0xfffff000
@@ -2307,7 +2405,15 @@ define void @test_dynamic_stackalloc_device_control_flow(i32 %n, i32 %m) {
; GFX11-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX11-SDAG-NEXT: s_mov_b32 s6, s33
; GFX11-SDAG-NEXT: s_add_i32 s33, s32, 63
+<<<<<<< HEAD
; GFX11-SDAG-NEXT: s_mov_b32 s7, s34
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX11-SDAG-NEXT: s_mov_b32 s6, s34
+; GFX11-SDAG-NEXT: s_and_not1_b32 s33, s33, 63
+; GFX11-SDAG-NEXT: s_mov_b32 s34, s32
+=======
+; GFX11-SDAG-NEXT: s_mov_b32 s6, s34
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-SDAG-NEXT: s_mov_b32 s1, 0
; GFX11-SDAG-NEXT: s_mov_b32 s0, exec_lo
; GFX11-SDAG-NEXT: s_and_not1_b32 s33, s33, 63
@@ -2456,7 +2562,7 @@ bb.2:
ret void
}
-define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i16(i16 %n) {
+define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i16(i16 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_divergent_non_standard_size_i16:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2585,7 +2691,7 @@ define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i16(i16
ret void
}
-define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i64(i64 %n) {
+define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i64(i64 %n) #0 {
; GFX9-SDAG-LABEL: test_dynamic_stackalloc_device_divergent_non_standard_size_i64:
; GFX9-SDAG: ; %bb.0:
; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2706,3 +2812,5 @@ define void @test_dynamic_stackalloc_device_divergent_non_standard_size_i64(i64
store volatile i32 666, ptr addrspace(5) %alloca
ret void
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
index 381b1741517b7..0f535c3a3bdbc 100644
--- a/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
+++ b/llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
@@ -1649,7 +1649,7 @@ define void @too_many_args_use_workitem_id_x_inreg(
i32 inreg %arg0, i32 inreg %arg1, i32 inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, i32 inreg %arg5, i32 inreg %arg6, i32 inreg %arg7,
i32 inreg %arg8, i32 inreg %arg9, i32 inreg %arg10, i32 inreg %arg11, i32 inreg %arg12, i32 inreg %arg13, i32 inreg %arg14, i32 inreg %arg15,
i32 inreg %arg16, i32 inreg %arg17, i32 inreg %arg18, i32 inreg %arg19, i32 inreg %arg20, i32 inreg %arg21, i32 inreg %arg22, i32 inreg %arg23,
- i32 inreg %arg24, i32 inreg %arg25, i32 inreg %arg26, i32 inreg %arg27, i32 inreg %arg28, i32 inreg %arg29, i32 inreg %arg30, i32 inreg %arg31) {
+ i32 inreg %arg24, i32 inreg %arg25, i32 inreg %arg26, i32 inreg %arg27, i32 inreg %arg28, i32 inreg %arg29, i32 inreg %arg30, i32 inreg %arg31) #0 {
;%val = call i32 @llvm.amdgcn.workitem.id.x()
;store volatile i32 %val, ptr addrspace(1) poison
@@ -1727,12 +1727,12 @@ define void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inr
; GFX9-NEXT: s_or_saveexec_b64 s[20:21], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[20:21]
-; GFX9-NEXT: v_writelane_b32 v40, s19, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: s_getpc_b64 s[20:21]
; GFX9-NEXT: s_add_u32 s20, s20, caller_void_func_i32_v2float_inreg at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s21, s21, caller_void_func_i32_v2float_inreg at gotpcrel32@hi+12
; GFX9-NEXT: s_load_dwordx2 s[20:21], s[20:21], 0x0
+; GFX9-NEXT: v_writelane_b32 v40, s19, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s2, s18
; GFX9-NEXT: s_mov_b32 s1, s17
@@ -1759,13 +1759,13 @@ define void @caller_void_func_i32_v2float_inreg(i32 inreg %arg0, <2 x float> inr
; GFX11-NEXT: s_or_saveexec_b32 s16, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s16
-; GFX11-NEXT: v_writelane_b32 v40, s3, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_getpc_b64 s[16:17]
; GFX11-NEXT: s_add_u32 s16, s16, caller_void_func_i32_v2float_inreg at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s17, s17, caller_void_func_i32_v2float_inreg at gotpcrel32@hi+12
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s3, 2
; GFX11-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -1955,7 +1955,7 @@ define void @void_func_v16bf16_inreg(<16 x bfloat> inreg %arg0) #0 {
ret void
}
-define void @void_func_2_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, ptr addrspace(1) %ptr) {
+define void @void_func_2_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_2_i32_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -1981,7 +1981,7 @@ define void @void_func_2_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, ptr addrspa
ret void
}
-define void @void_func_2_i64_inreg(i64 inreg %arg0, i64 inreg %arg1, ptr addrspace(1) %ptr) {
+define void @void_func_2_i64_inreg(i64 inreg %arg0, i64 inreg %arg1, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_2_i64_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2010,7 +2010,7 @@ define void @void_func_2_i64_inreg(i64 inreg %arg0, i64 inreg %arg1, ptr addrspa
ret void
}
-define void @void_func_i64_inreg_i32_inreg_i64_inreg(i64 inreg %arg0, i32 inreg %arg1, i64 inreg %arg2, ptr addrspace(1) %ptr) {
+define void @void_func_i64_inreg_i32_inreg_i64_inreg(i64 inreg %arg0, i32 inreg %arg1, i64 inreg %arg2, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_i64_inreg_i32_inreg_i64_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2046,7 +2046,7 @@ define void @void_func_i64_inreg_i32_inreg_i64_inreg(i64 inreg %arg0, i32 inreg
ret void
}
-define void @void_func_5_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, i32 inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, ptr addrspace(1) %ptr) {
+define void @void_func_5_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, i32 inreg %arg2, i32 inreg %arg3, i32 inreg %arg4, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_5_i32_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2092,7 +2092,7 @@ define void @void_func_5_i32_inreg(i32 inreg %arg0, i32 inreg %arg1, i32 inreg %
ret void
}
-define void @void_func_a5i32_inreg([5 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+define void @void_func_a5i32_inreg([5 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_a5i32_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2123,7 +2123,7 @@ define void @void_func_a5i32_inreg([5 x i32] inreg %arg0, ptr addrspace(1) %ptr)
; Force all implicit inputs to be required
declare void @extern()
-define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_a13i32_inreg:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -2132,7 +2132,6 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: s_or_saveexec_b64 s[40:41], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[40:41]
-; GFX9-NEXT: v_writelane_b32 v40, s29, 2
; GFX9-NEXT: v_mov_b32_e32 v2, s28
; GFX9-NEXT: global_store_dword v[0:1], v2, off offset:48
; GFX9-NEXT: v_mov_b32_e32 v5, s27
@@ -2141,13 +2140,13 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: v_mov_b32_e32 v2, s24
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:32
-; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: v_writelane_b32 v40, s29, 2
; GFX9-NEXT: v_mov_b32_e32 v5, s23
; GFX9-NEXT: v_mov_b32_e32 v4, s22
; GFX9-NEXT: v_mov_b32_e32 v3, s21
; GFX9-NEXT: v_mov_b32_e32 v2, s20
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off offset:16
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s17
; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: s_getpc_b64 s[16:17]
@@ -2156,6 +2155,7 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX9-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
; GFX9-NEXT: v_mov_b32_e32 v5, s19
; GFX9-NEXT: v_mov_b32_e32 v4, s18
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: global_store_dwordx4 v[0:1], v[2:5], off
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -2178,7 +2178,6 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX11-NEXT: s_or_saveexec_b32 s26, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s26
-; GFX11-NEXT: v_writelane_b32 v40, s25, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_dual_mov_b32 v4, s22 :: v_dual_mov_b32 v3, s21
; GFX11-NEXT: v_dual_mov_b32 v2, s20 :: v_dual_mov_b32 v9, s19
@@ -2188,18 +2187,20 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
; GFX11-NEXT: v_dual_mov_b32 v8, s18 :: v_dual_mov_b32 v7, s17
; GFX11-NEXT: v_dual_mov_b32 v6, s16 :: v_dual_mov_b32 v13, s3
; GFX11-NEXT: s_load_b64 s[16:17], s[20:21], 0x0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s25, 2
; GFX11-NEXT: v_dual_mov_b32 v14, s24 :: v_dual_mov_b32 v5, s23
; GFX11-NEXT: v_dual_mov_b32 v12, s2 :: v_dual_mov_b32 v11, s1
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v10, s0
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_clause 0x3
; GFX11-NEXT: global_store_b32 v[0:1], v14, off offset:48
; GFX11-NEXT: global_store_b128 v[0:1], v[2:5], off offset:32
; GFX11-NEXT: global_store_b128 v[0:1], v[6:9], off offset:16
; GFX11-NEXT: global_store_b128 v[0:1], v[10:13], off
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[16:17]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
@@ -2215,28 +2216,28 @@ define void @void_func_a13i32_inreg([13 x i32] inreg %arg0, ptr addrspace(1) %p
ret void
}
-; define void @void_func_a14i32_inreg([14 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+; define void @void_func_a14i32_inreg([14 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; store [14 x i32] %arg0, ptr addrspace(1) %ptr
; call void @extern()
; ret void
; }
; FIXME:
-; define void @void_func_a15i32_inreg([15 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+; define void @void_func_a15i32_inreg([15 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; store [15 x i32] %arg0, ptr addrspace(1) %ptr
; call void @extern()
; ret void
; }
; FIXME:
-; define void @void_func_a16i32_inreg([16 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+; define void @void_func_a16i32_inreg([16 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; store [16 x i32] %arg0, ptr addrspace(1) %ptr
; call void @extern()
; ret void
; }
; FIXME: Should still fail
-define void @void_func_a16i32_inreg__noimplicit([16 x i32] inreg %arg0, ptr addrspace(1) %ptr) {
+define void @void_func_a16i32_inreg__noimplicit([16 x i32] inreg %arg0, ptr addrspace(1) %ptr) #0 {
; GFX9-LABEL: void_func_a16i32_inreg__noimplicit:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
index 3ca36a97981f2..234eaa8af7edf 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
@@ -162,13 +162,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1 at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
+; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-NEXT: v_readlane_b32 s30, v40, 0
@@ -191,14 +191,15 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1 at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
@@ -220,13 +221,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1 at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-SCRATCH-NEXT: v_readlane_b32 s30, v40, 0
@@ -252,9 +253,9 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i1_signext at abs32@hi
@@ -283,13 +284,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_signext at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
@@ -314,13 +315,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_signext at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_signext at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
@@ -345,13 +346,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_signext at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
@@ -381,9 +382,9 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i1_zeroext at abs32@hi
@@ -412,13 +413,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_zeroext at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
@@ -443,13 +444,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-NEXT: s_waitcnt vmcnt(0)
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_zeroext at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_zeroext at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: v_and_b32_e32 v0, 1, v0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
@@ -474,13 +475,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_zeroext at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
@@ -539,11 +540,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -567,11 +568,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x7b
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -595,11 +596,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -624,11 +625,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -655,9 +656,9 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_sbyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_signext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_signext at abs32@lo
@@ -684,13 +685,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_sbyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_signext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -713,13 +714,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_i8 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -742,13 +743,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_i8 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -772,13 +773,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_sbyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_signext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -806,9 +807,9 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ubyte v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_zeroext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_zeroext at abs32@lo
@@ -835,13 +836,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_zeroext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -864,13 +865,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -893,13 +894,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u8 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -923,13 +924,13 @@ define amdgpu_gfx void @test_call_external_void_func_i8_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_zeroext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -986,11 +987,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1014,11 +1015,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x7b
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1042,11 +1043,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1071,11 +1072,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1102,9 +1103,9 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ushort v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i16_signext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i16_signext at abs32@lo
@@ -1131,13 +1132,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_signext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_signext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1160,13 +1161,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1189,13 +1190,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1219,13 +1220,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_signext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_signext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_signext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1253,9 +1254,9 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_ushort v0, v[0:1], off glc
; GFX9-NEXT: s_waitcnt vmcnt(0)
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i16_zeroext at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i16_zeroext at abs32@lo
@@ -1282,13 +1283,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-NEXT: s_waitcnt vmcnt(0)
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_zeroext at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_zeroext at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1311,13 +1312,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off glc dlc
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1340,13 +1341,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off glc dlc
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1370,13 +1371,13 @@ define amdgpu_gfx void @test_call_external_void_func_i16_zeroext(i32) #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off glc dlc
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_zeroext at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_zeroext at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1433,11 +1434,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1461,11 +1462,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 42
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1490,11 +1491,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 42
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1551,11 +1552,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i64 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -1580,10 +1581,10 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0x7b :: v_dual_mov_b32 v1, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i64 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1609,11 +1610,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x7b
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i64 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -1641,10 +1642,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
@@ -1671,14 +1672,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -1701,14 +1702,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1732,14 +1733,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -1799,11 +1800,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -1830,9 +1831,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -1860,11 +1861,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -1894,10 +1895,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i64 at abs32@lo
@@ -1926,14 +1927,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v4, 1
; GFX10-NEXT: v_mov_b32_e32 v5, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i64 at abs32@hi
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -1958,14 +1959,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v5, 2
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 1
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i64 at abs32@lo
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1989,14 +1990,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i64 at abs32@hi
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -2028,10 +2029,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i64 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i64 at abs32@lo
@@ -2062,14 +2063,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v4, 1
; GFX10-NEXT: v_mov_b32_e32 v5, 2
; GFX10-NEXT: v_mov_b32_e32 v6, 3
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v7, 4
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i64 at abs32@lo
@@ -2096,13 +2097,13 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v5, 2
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 1
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v6, 3 :: v_dual_mov_b32 v7, 4
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i64 at abs32@hi
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -2128,14 +2129,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, 3
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v7, 4
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i64 at abs32@lo
@@ -2197,11 +2198,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -2225,11 +2226,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 0x4400
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2253,11 +2254,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2282,11 +2283,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x4400
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -2342,11 +2343,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 4.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -2370,11 +2371,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 4.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -2399,11 +2400,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 4.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -2460,11 +2461,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f32 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -2489,10 +2490,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f32 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2518,11 +2519,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f32 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2581,11 +2582,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f32 at abs32@hi
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -2611,10 +2612,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_mov_b32_e32 v2, 4.0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f32 at abs32@hi
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -2641,11 +2642,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f32 at abs32@hi
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -2707,11 +2708,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-NEXT: v_mov_b32_e32 v3, -1.0
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 0.5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5f32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5f32 at abs32@lo
@@ -2739,9 +2740,9 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1.0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 4.0 :: v_dual_mov_b32 v3, -1.0
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v4, 0.5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5f32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5f32 at abs32@lo
@@ -2770,11 +2771,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 4.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, -1.0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 0.5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5f32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5f32 at abs32@lo
@@ -2835,11 +2836,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f64 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -2864,10 +2865,10 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0x40100000
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f64 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2893,11 +2894,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f64 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -2957,11 +2958,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x40100000
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f64 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f64 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -2988,9 +2989,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40100000
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f64 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -3018,11 +3019,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 0x40100000
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f64 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f64 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -3086,11 +3087,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x40100000
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0x40200000
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f64 at abs32@hi
@@ -3119,9 +3120,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 2.0
; GFX11-NEXT: v_dual_mov_b32 v2, 0 :: v_dual_mov_b32 v3, 0x40100000
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v5, 0x40200000
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f64 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f64 at abs32@lo
@@ -3150,11 +3151,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2.0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 0x40100000
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 0x40200000
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f64 at abs32@hi
@@ -3186,10 +3187,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_ushort v0, v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i8 at abs32@hi
@@ -3219,15 +3220,15 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -3252,14 +3253,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[0:1], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -3285,14 +3286,14 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v0, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[0:1], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -3319,15 +3320,15 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
@@ -3357,10 +3358,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8 at abs32@lo
@@ -3390,14 +3391,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3423,14 +3424,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3456,14 +3457,14 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3494,10 +3495,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dword v0, v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i8 at abs32@lo
@@ -3528,14 +3529,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3562,14 +3563,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3596,14 +3597,14 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -3635,10 +3636,10 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v5i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v5i8 at abs32@lo
@@ -3671,14 +3672,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3707,14 +3708,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b64 v[5:6], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3743,14 +3744,14 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[5:6], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -3784,10 +3785,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i8 at abs32@lo
@@ -3823,14 +3824,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i8 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3862,14 +3863,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3900,14 +3901,14 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -3944,14 +3945,14 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v4, 16
; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX9-NEXT: v_writelane_b32 v40, s30, 0
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i8 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i8 at abs32@lo
; GFX9-NEXT: s_addk_i32 s32, 0x400
@@ -4015,17 +4016,17 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 16
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i8 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i8 at abs32@lo
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(1)
@@ -4087,15 +4088,15 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: v_mov_b32_e32 v0, 0
; GFX11-NEXT: v_dual_mov_b32 v1, 0 :: v_dual_mov_b32 v4, 16
; GFX11-NEXT: v_mov_b32_e32 v5, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
; GFX11-NEXT: global_load_b128 v[16:19], v[4:5], off
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(1)
@@ -4154,17 +4155,17 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 16
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i8 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i8 at abs32@lo
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[16:19], v[4:5], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(1)
@@ -4232,12 +4233,12 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_ubyte v0, v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_i8_ret at abs32@lo
@@ -4268,16 +4269,16 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_ubyte v0, v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: global_store_byte v[40:41], v0, off
@@ -4304,17 +4305,17 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-TRUE16-NEXT: global_store_b8 v[40:41], v0, off
@@ -4340,17 +4341,17 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u8 v0, v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-FAKE16-NEXT: global_store_b8 v[40:41], v0, off
@@ -4377,16 +4378,16 @@ define amdgpu_gfx void @test_call_external_void_func_i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: global_store_byte v[40:41], v0, off
@@ -4420,12 +4421,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_ushort v0, v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i8_ret at abs32@hi
@@ -4461,16 +4462,16 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i8_ret at abs32@lo
; GFX10-NEXT: global_load_ushort v0, v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
@@ -4502,17 +4503,17 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_d16_b16 v0, v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -4546,17 +4547,17 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_u16 v0, v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_and_b32_e32 v1, 0xffff, v0
@@ -4590,16 +4591,16 @@ define amdgpu_gfx void @test_call_external_void_func_v2i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: global_load_ushort v0, v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
@@ -4638,12 +4639,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dword v0, v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
@@ -4682,16 +4683,16 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4726,17 +4727,17 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b32 v0, v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4773,17 +4774,17 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b32 v0, v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4821,16 +4822,16 @@ define amdgpu_gfx void @test_call_external_void_func_v3i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4872,12 +4873,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dword v0, v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i8_ret at abs32@lo
@@ -4917,16 +4918,16 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v0, v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -4962,17 +4963,17 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b32 v0, v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5010,17 +5011,17 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b32 v0, v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5063,16 +5064,16 @@ define amdgpu_gfx void @test_call_external_void_func_v4i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v1, 8, v0
@@ -5115,12 +5116,12 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v5i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v5i8_ret at abs32@lo
@@ -5165,16 +5166,16 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5215,17 +5216,17 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b64 v[5:6], v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5268,17 +5269,17 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b64 v[5:6], v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5326,16 +5327,16 @@ define amdgpu_gfx void @test_call_external_void_func_v5i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[5:6], v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b64 v[3:4], 24, v[5:6]
@@ -5383,12 +5384,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: v_mov_b32_e32 v40, 0
; GFX9-NEXT: v_mov_b32_e32 v41, 0
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
+; GFX9-NEXT: v_writelane_b32 v42, s34, 2
; GFX9-NEXT: v_writelane_b32 v42, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i8_ret at abs32@lo
@@ -5438,16 +5439,16 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: v_mov_b32_e32 v40, 0
; GFX10-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i8_ret at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5493,17 +5494,17 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-TRUE16-NEXT: global_load_b64 v[0:1], v[40:41], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-TRUE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-TRUE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5551,17 +5552,17 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v41, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: global_load_b64 v[0:1], v[40:41], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-FAKE16-NEXT: v_writelane_b32 v42, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(0)
; GFX11-FAKE16-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5616,16 +5617,16 @@ define amdgpu_gfx void @test_call_external_void_func_v8i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[40:41], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: v_lshrrev_b32_e32 v8, 8, v0
@@ -5678,7 +5679,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v44, s34, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
@@ -5689,6 +5689,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX9-NEXT: v_mov_b32_e32 v43, 0
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX9-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
+; GFX9-NEXT: v_writelane_b32 v44, s34, 2
; GFX9-NEXT: v_writelane_b32 v44, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
@@ -5800,7 +5801,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v44, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
@@ -5809,12 +5809,13 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-NEXT: v_mov_b32_e32 v42, 16
; GFX10-NEXT: v_mov_b32_e32 v41, 0
; GFX10-NEXT: v_mov_b32_e32 v43, 0
-; GFX10-NEXT: v_writelane_b32 v44, s30, 0
+; GFX10-NEXT: v_writelane_b32 v44, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i8_ret at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i8_ret at abs32@lo
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX10-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
+; GFX10-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x400
; GFX10-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(1)
@@ -5923,7 +5924,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-TRUE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-TRUE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-TRUE16-NEXT: s_clause 0x3
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
@@ -5932,11 +5932,12 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-TRUE16-NEXT: v_dual_mov_b32 v41, 0 :: v_dual_mov_b32 v42, 16
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v43, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s30, 0
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-TRUE16-NEXT: global_load_b128 v[0:3], v[40:41], off
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-TRUE16-NEXT: global_load_b128 v[16:19], v[42:43], off
+; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 32
; GFX11-TRUE16-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-TRUE16-NEXT: s_waitcnt vmcnt(1)
@@ -6050,7 +6051,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-FAKE16-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-FAKE16-NEXT: s_clause 0x3
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v40, s33 offset:12
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v41, s33 offset:8
@@ -6059,11 +6059,12 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v40, 0
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v41, 0 :: v_dual_mov_b32 v42, 16
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v43, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s30, 0
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX11-FAKE16-NEXT: global_load_b128 v[0:3], v[40:41], off
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX11-FAKE16-NEXT: global_load_b128 v[16:19], v[42:43], off
+; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 32
; GFX11-FAKE16-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-FAKE16-NEXT: s_waitcnt vmcnt(1)
@@ -6202,7 +6203,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:12 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v42, s33 offset:4 ; 4-byte Folded Spill
@@ -6211,12 +6211,13 @@ define amdgpu_gfx void @test_call_external_void_func_v32i8_ret() #0 {
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v42, 16
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v43, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i8_ret at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i8_ret at abs32@lo
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[40:41], off
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[16:19], v[42:43], off
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 32
; GFX10-SCRATCH-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(1)
@@ -6333,8 +6334,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dword v0, v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i16 at abs32@lo
@@ -6361,12 +6362,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6389,12 +6390,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6418,12 +6419,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6451,8 +6452,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
@@ -6479,12 +6480,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6507,12 +6508,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6536,12 +6537,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6569,8 +6570,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
@@ -6597,12 +6598,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6625,12 +6626,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -6654,12 +6655,12 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -6717,11 +6718,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-NEXT: v_mov_b32_e32 v1, 3
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -6746,10 +6747,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 0x20001 :: v_dual_mov_b32 v1, 3
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6775,11 +6776,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 3
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6837,11 +6838,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX10-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -6866,11 +6867,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX11-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6896,11 +6897,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x40003c00
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x4400
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -6928,8 +6929,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
@@ -6956,12 +6957,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -6984,12 +6985,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7013,12 +7014,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7076,11 +7077,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -7105,11 +7106,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX11-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7135,11 +7136,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0x20001
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 0x40003
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7167,8 +7168,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dword v0, v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2f16 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2f16 at abs32@lo
@@ -7195,12 +7196,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7223,12 +7224,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b32 v0, v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7252,12 +7253,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dword v0, v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7285,8 +7286,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
@@ -7313,12 +7314,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7341,12 +7342,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b64 v[0:1], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7370,12 +7371,12 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7433,11 +7434,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -7462,10 +7463,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7491,11 +7492,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -7554,11 +7555,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 4
; GFX10-NEXT: v_mov_b32_e32 v2, 5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32 at abs32@hi
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -7584,10 +7585,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 4
; GFX11-NEXT: v_mov_b32_e32 v2, 5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32 at abs32@hi
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -7614,11 +7615,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32 at abs32@hi
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -7679,11 +7680,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 4
; GFX10-NEXT: v_mov_b32_e32 v2, 5
; GFX10-NEXT: v_mov_b32_e32 v3, 6
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -7710,9 +7711,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 4
; GFX11-NEXT: v_dual_mov_b32 v2, 5 :: v_dual_mov_b32 v3, 6
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -7740,11 +7741,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 5
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 6
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -7774,8 +7775,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
@@ -7802,12 +7803,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -7830,12 +7831,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: global_load_b128 v[0:3], v[0:1], off
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -7859,12 +7860,12 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32() #0 {
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -7924,11 +7925,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
@@ -7955,9 +7956,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -7985,11 +7986,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
@@ -8052,11 +8053,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 5
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i32 at abs32@lo
@@ -8084,9 +8085,9 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v4, 5
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i32 at abs32@lo
@@ -8115,11 +8116,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 5
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i32 at abs32@lo
@@ -8155,12 +8156,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v8, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v8, s[34:35] offset:16
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v8i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v8i32 at abs32@lo
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8185,13 +8186,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v8, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[0:3], v8, s[34:35]
; GFX10-NEXT: global_load_dwordx4 v[4:7], v8, s[34:35] offset:16
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8219,12 +8219,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v4, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: global_load_b128 v[0:3], v4, s[0:1]
; GFX11-NEXT: global_load_b128 v[4:7], v4, s[0:1] offset:16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8253,13 +8253,12 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v8, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v8, s[0:1]
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[4:7], v8, s[0:1] offset:16
-; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8326,11 +8325,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: v_mov_b32_e32 v1, 2
; GFX10-NEXT: v_mov_b32_e32 v2, 3
; GFX10-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 5
; GFX10-NEXT: v_mov_b32_e32 v5, 6
; GFX10-NEXT: v_mov_b32_e32 v6, 7
@@ -8361,9 +8360,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v0, 1 :: v_dual_mov_b32 v1, 2
; GFX11-NEXT: v_dual_mov_b32 v2, 3 :: v_dual_mov_b32 v3, 4
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v4, 5 :: v_dual_mov_b32 v5, 6
; GFX11-NEXT: v_dual_mov_b32 v6, 7 :: v_dual_mov_b32 v7, 8
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32 at abs32@hi
@@ -8393,11 +8392,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v3, 4
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v4, 5
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v5, 6
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v6, 7
@@ -8436,7 +8435,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v16, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v16, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v16, s[34:35] offset:16
@@ -8444,6 +8442,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX9-NEXT: global_load_dwordx4 v[12:15], v16, s[34:35] offset:48
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v16i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v16i32 at abs32@lo
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8468,7 +8467,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v16, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x3
@@ -8476,7 +8474,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-NEXT: global_load_dwordx4 v[4:7], v16, s[34:35] offset:16
; GFX10-NEXT: global_load_dwordx4 v[8:11], v16, s[34:35] offset:32
; GFX10-NEXT: global_load_dwordx4 v[12:15], v16, s[34:35] offset:48
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8504,7 +8502,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v12, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x3
@@ -8512,6 +8509,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX11-NEXT: global_load_b128 v[4:7], v12, s[0:1] offset:16
; GFX11-NEXT: global_load_b128 v[8:11], v12, s[0:1] offset:32
; GFX11-NEXT: global_load_b128 v[12:15], v12, s[0:1] offset:48
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8540,7 +8538,6 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v16, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x3
@@ -8548,7 +8545,7 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32() #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[4:7], v16, s[0:1] offset:16
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[8:11], v16, s[0:1] offset:32
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[12:15], v16, s[0:1] offset:48
-; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8584,7 +8581,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v28, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v28, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v28, s[34:35] offset:16
@@ -8597,6 +8593,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX9-NEXT: global_load_dwordx4 v[28:31], v28, s[34:35] offset:112
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i32 at abs32@lo
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -8621,7 +8618,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v32, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x7
@@ -8633,7 +8629,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-NEXT: global_load_dwordx4 v[20:23], v32, s[34:35] offset:80
; GFX10-NEXT: global_load_dwordx4 v[24:27], v32, s[34:35] offset:96
; GFX10-NEXT: global_load_dwordx4 v[28:31], v32, s[34:35] offset:112
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8661,7 +8657,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v28, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_clause 0x7
@@ -8673,6 +8668,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX11-NEXT: global_load_b128 v[20:23], v28, s[0:1] offset:80
; GFX11-NEXT: global_load_b128 v[24:27], v28, s[0:1] offset:96
; GFX11-NEXT: global_load_b128 v[28:31], v28, s[0:1] offset:112
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8701,7 +8697,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v32, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x7
@@ -8713,7 +8708,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32() #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112
-; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8749,7 +8744,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX9-NEXT: v_mov_b32_e32 v28, 0
; GFX9-NEXT: global_load_dword v32, v[0:1], off
; GFX9-NEXT: s_addk_i32 s32, 0x400
-; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v28, s[34:35]
; GFX9-NEXT: global_load_dwordx4 v[4:7], v28, s[34:35] offset:16
@@ -8760,6 +8754,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX9-NEXT: global_load_dwordx4 v[24:27], v28, s[34:35] offset:96
; GFX9-NEXT: s_nop 0
; GFX9-NEXT: global_load_dwordx4 v[28:31], v28, s[34:35] offset:112
+; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_v32i32_i32 at abs32@lo
; GFX9-NEXT: v_writelane_b32 v40, s31, 1
@@ -8789,7 +8784,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v32, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: global_load_dword v33, v[0:1], off
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
@@ -8802,7 +8796,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-NEXT: global_load_dwordx4 v[20:23], v32, s[34:35] offset:80
; GFX10-NEXT: global_load_dwordx4 v[24:27], v32, s[34:35] offset:96
; GFX10-NEXT: global_load_dwordx4 v[28:31], v32, s[34:35] offset:112
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v32i32_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v32i32_i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -8832,7 +8826,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v28, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: global_load_b32 v32, v[0:1], off
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
@@ -8845,6 +8838,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX11-NEXT: global_load_b128 v[20:23], v28, s[0:1] offset:80
; GFX11-NEXT: global_load_b128 v[24:27], v28, s[0:1] offset:96
; GFX11-NEXT: global_load_b128 v[28:31], v28, s[0:1] offset:112
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v32i32_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v32i32_i32 at abs32@lo
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
@@ -8874,7 +8868,6 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v32, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: global_load_dword v33, v[0:1], off
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
@@ -8887,7 +8880,7 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32(i32) #0 {
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[20:23], v32, s[0:1] offset:80
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[24:27], v32, s[0:1] offset:96
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[28:31], v32, s[0:1] offset:112
-; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v32i32_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v32i32_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -8960,14 +8953,14 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX10-NEXT: v_writelane_b32 v42, s34, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v40, v0
; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: s_mov_b32 s35, external_i32_func_i32 at abs32@hi
+; GFX10-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-NEXT: s_mov_b32 s34, external_i32_func_i32 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: v_mov_b32_e32 v41, v1
+; GFX10-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: global_store_dword v[40:41], v0, off
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
@@ -8998,9 +8991,9 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX11-NEXT: s_clause 0x1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:4
; GFX11-NEXT: scratch_store_b32 off, v41, s33
-; GFX11-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v41, v1 :: v_dual_mov_b32 v40, v0
; GFX11-NEXT: v_mov_b32_e32 v0, 42
+; GFX11-NEXT: v_writelane_b32 v42, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_i32_func_i32 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_i32_func_i32 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
@@ -9034,14 +9027,14 @@ define amdgpu_gfx void @test_call_external_i32_func_i32_imm(ptr addrspace(1) %ou
; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s0, 2
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:4 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v41, s33 ; 4-byte Folded Spill
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v40, v0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 42
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_i32_func_i32 at abs32@hi
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_i32_func_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v41, v1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v42, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: global_store_dword v[40:41], v0, off
; GFX10-SCRATCH-NEXT: s_waitcnt_vscnt null, 0x0
@@ -9078,12 +9071,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_addk_i32 s32, 0x400
-; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_load_ubyte v0, v2, s[34:35]
; GFX9-NEXT: global_load_dword v1, v2, s[34:35] offset:4
; GFX9-NEXT: s_mov_b32 s35, external_void_func_struct_i8_i32 at abs32@hi
; GFX9-NEXT: s_mov_b32 s34, external_void_func_struct_i8_i32 at abs32@lo
+; GFX9-NEXT: v_writelane_b32 v40, s31, 1
; GFX9-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX9-NEXT: v_readlane_b32 s31, v40, 1
; GFX9-NEXT: v_readlane_b32 s30, v40, 0
@@ -9108,13 +9101,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_ubyte v0, v2, s[34:35]
; GFX10-NEXT: global_load_dword v1, v2, s[34:35] offset:4
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_struct_i8_i32 at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
@@ -9142,8 +9134,8 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_add_i32 s32, s32, 16
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: global_load_d16_u8 v0, v1, s[0:1]
@@ -9175,12 +9167,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-FAKE16-NEXT: v_mov_b32_e32 v1, 0
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_add_i32 s32, s32, 16
; GFX11-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: global_load_u8 v0, v1, s[0:1]
; GFX11-FAKE16-NEXT: global_load_b32 v1, v1, s[0:1] offset:4
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_struct_i8_i32 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_struct_i8_i32 at abs32@lo
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s31, 1
@@ -9209,13 +9201,12 @@ define amdgpu_gfx void @test_call_external_void_func_struct_i8_i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v2, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: s_clause 0x1
; GFX10-SCRATCH-NEXT: global_load_ubyte v0, v2, s[0:1]
; GFX10-SCRATCH-NEXT: global_load_dword v1, v2, s[0:1] offset:4
-; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_struct_i8_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_struct_i8_i32 at abs32@lo
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
@@ -9246,8 +9237,8 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 3
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX9-NEXT: v_mov_b32_e32 v0, 8
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -9281,9 +9272,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_byval_struct_i8_i32 at abs32@lo
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:4
; GFX10-NEXT: v_lshrrev_b32_e64 v0, 5, s33
@@ -9313,9 +9304,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-TRUE16-NEXT: v_mov_b16_e32 v0.l, 3
; GFX11-TRUE16-NEXT: v_mov_b32_e32 v1, 8
-; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX11-TRUE16-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
+; GFX11-TRUE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-TRUE16-NEXT: s_clause 0x1
; GFX11-TRUE16-NEXT: scratch_store_b8 off, v0, s33
; GFX11-TRUE16-NEXT: scratch_store_b32 off, v1, s33 offset:4
@@ -9345,9 +9336,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX11-FAKE16-NEXT: s_mov_b32 exec_lo, s1
; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-FAKE16-NEXT: v_dual_mov_b32 v0, 3 :: v_dual_mov_b32 v1, 8
-; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX11-FAKE16-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
+; GFX11-FAKE16-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-FAKE16-NEXT: s_clause 0x1
; GFX11-FAKE16-NEXT: scratch_store_b8 off, v0, s33
; GFX11-FAKE16-NEXT: scratch_store_b32 off, v1, s33 offset:4
@@ -9379,9 +9370,9 @@ define amdgpu_gfx void @test_call_external_void_func_byval_struct_i8_i32() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 3
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_byval_struct_i8_i32 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_byval_struct_i8_i32 at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s33
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v1, s33 offset:4
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, s33
@@ -9417,10 +9408,10 @@ define amdgpu_gfx void @test_call_external_void_func_sret_struct_i8_i32_byval_st
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: v_mov_b32_e32 v0, 3
; GFX9-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX9-NEXT: v_mov_b32_e32 v0, 8
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4
; GFX9-NEXT: v_lshrrev_b32_e64 v0, 6, s33
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -9458,19 +9449,19 @@ define amdgpu_gfx void @test_call_external_void_func_sret_struct_i8_i32_byval_st
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, 8
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_mov_b32 s35, external_void_func_sret_struct_i8_i32_byval_struct_i8_i32 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_sret_struct_i8_i32_byval_struct_i8_i32 at abs32@lo
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s33
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:4
; GFX10-NEXT: v_lshrrev_b32_e64 v0, 5, s33
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_lshrrev_b32_e64 v1, 5, s33
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: v_add_nc_u32_e32 v0, 8, v0
+; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: buffer_load_ubyte v0, off, s[0:3], s33 offset:8
@@ -9694,8 +9685,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: global_load_dwordx4 v[0:3], v0, s[34:35]
@@ -9745,8 +9736,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_mov_b32_e32 v0, 0
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: global_load_b128 v[0:3], v0, s[0:1]
@@ -9793,8 +9784,8 @@ define amdgpu_gfx void @test_call_external_void_func_v16i8() #0 {
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 0
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-SCRATCH-NEXT: global_load_dwordx4 v[0:3], v0, s[0:1]
@@ -10121,13 +10112,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v0, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i1_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i1_inreg at abs32@lo
-; GFX10-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_byte v0, off, s[0:3], s32
+; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-NEXT: v_readlane_b32 s30, v40, 0
@@ -10150,14 +10141,15 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_mov_b32_e32 v0, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i1_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i1_inreg at abs32@lo
-; GFX11-NEXT: v_writelane_b32 v40, s31, 1
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: scratch_store_b8 off, v0, s32
+; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
; GFX11-NEXT: v_readlane_b32 s31, v40, 1
; GFX11-NEXT: v_readlane_b32 s30, v40, 0
; GFX11-NEXT: s_mov_b32 s32, s33
@@ -10179,13 +10171,13 @@ define amdgpu_gfx void @test_call_external_void_func_i1_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_mov_b32_e32 v0, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i1_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i1_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: scratch_store_byte off, v0, s32
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
; GFX10-SCRATCH-NEXT: v_readlane_b32 s30, v40, 0
@@ -10242,11 +10234,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i8_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i8_inreg at abs32@lo
-; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10272,11 +10264,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i8_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i8_inreg at abs32@lo
-; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10303,11 +10295,11 @@ define amdgpu_gfx void @test_call_external_void_func_i8_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i8_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i8_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10367,11 +10359,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i16_inreg at abs32@lo
-; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10397,11 +10389,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i16_inreg at abs32@lo
-; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10428,11 +10420,11 @@ define amdgpu_gfx void @test_call_external_void_func_i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10492,11 +10484,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 42
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 42
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -10522,11 +10514,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 42
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 42
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10553,11 +10545,11 @@ define amdgpu_gfx void @test_call_external_void_func_i32_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 42
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 42
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -10620,11 +10612,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_i64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_i64_inreg at abs32@lo
-; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_movk_i32 s4, 0x7b
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -10653,11 +10645,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_i64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_i64_inreg at abs32@lo
-; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_movk_i32 s4, 0x7b
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -10687,11 +10679,11 @@ define amdgpu_gfx void @test_call_external_void_func_i64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_i64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_i64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x7b
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -10761,9 +10753,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -10798,9 +10790,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -10836,9 +10828,9 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -10917,11 +10909,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i64_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -10956,11 +10948,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i64_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -10996,11 +10988,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -11082,9 +11074,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 8
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -11125,9 +11117,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 8
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -11169,9 +11161,9 @@ define amdgpu_gfx void @test_call_external_void_func_v3i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 8
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -11268,9 +11260,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b64 s[34:35], 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -11317,9 +11309,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b64 s[0:1], 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -11367,9 +11359,9 @@ define amdgpu_gfx void @test_call_external_void_func_v4i64_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b64 s[0:1], 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -11452,11 +11444,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f16_inreg at abs32@lo
-; GFX10-NEXT: s_movk_i32 s4, 0x4400
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_movk_i32 s4, 0x4400
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -11482,11 +11474,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f16_inreg at abs32@lo
-; GFX11-NEXT: s_movk_i32 s4, 0x4400
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_movk_i32 s4, 0x4400
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11513,11 +11505,11 @@ define amdgpu_gfx void @test_call_external_void_func_f16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x4400
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_movk_i32 s4, 0x4400
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11577,11 +11569,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 4.0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 4.0
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -11607,11 +11599,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 4.0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 4.0
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11638,11 +11630,11 @@ define amdgpu_gfx void @test_call_external_void_func_f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 4.0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 4.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -11705,11 +11697,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -11738,11 +11730,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -11772,11 +11764,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -11845,11 +11837,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 5
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -11881,11 +11873,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 5
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -11918,11 +11910,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 5
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12000,11 +11992,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 7
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5f32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5f32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1.0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12042,11 +12034,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 7
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5f32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5f32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1.0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12085,11 +12077,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5f32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 7
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5f32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5f32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12164,11 +12156,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_f64_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0x40100000
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -12197,11 +12189,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_f64_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0x40100000
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -12231,11 +12223,11 @@ define amdgpu_gfx void @test_call_external_void_func_f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0x40100000
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -12307,11 +12299,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f64_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12346,11 +12338,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f64_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12386,11 +12378,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12474,11 +12466,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 8
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f64_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f64_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2.0
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -12519,11 +12511,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 8
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f64_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f64_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2.0
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -12565,11 +12557,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f64_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 8
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f64_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f64_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2.0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -12644,11 +12636,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dword s4, s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -12674,11 +12666,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b32 s4, s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -12705,11 +12697,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -12772,8 +12764,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16_inreg at abs32@hi
@@ -12804,8 +12796,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
@@ -12837,8 +12829,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
@@ -12906,8 +12898,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16_inreg at abs32@hi
@@ -12938,8 +12930,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
@@ -12971,8 +12963,8 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
@@ -13041,11 +13033,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i16_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0x20001
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0x20001
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 3
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13074,11 +13066,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i16_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0x20001
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0x20001
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 3
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13108,11 +13100,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 3
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13178,11 +13170,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3f16_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0x40003c00
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0x40003c00
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_movk_i32 s5, 0x4400
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13211,11 +13203,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3f16_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0x40003c00
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0x40003c00
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_movk_i32 s5, 0x4400
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13245,11 +13237,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3f16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3f16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x40003c00
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x40003c00
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_movk_i32 s5, 0x4400
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13314,8 +13306,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16_inreg at abs32@hi
@@ -13346,8 +13338,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
@@ -13379,8 +13371,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
@@ -13449,11 +13441,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i16_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 0x20001
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 0x20001
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 0x40003
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13482,11 +13474,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i16_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 0x20001
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 0x20001
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 0x40003
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13516,11 +13508,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i16_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 0x20001
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 0x40003
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13583,11 +13575,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dword s4, s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2f16_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2f16_inreg at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
@@ -13613,11 +13605,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b32 s4, s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2f16_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2f16_inreg at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -13644,11 +13636,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2f16_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 3
+; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dword s4, s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2f16_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2f16_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -13711,8 +13703,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[34:35], 0x0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32_inreg at abs32@hi
@@ -13743,8 +13735,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_load_b64 s[4:5], s[0:1], 0x0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
@@ -13776,8 +13768,8 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
@@ -13846,11 +13838,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -13879,11 +13871,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -13913,11 +13905,11 @@ define amdgpu_gfx void @test_call_external_void_func_v2i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 4
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 2
@@ -13986,11 +13978,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 5
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 3
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 3
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 4
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14022,11 +14014,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 5
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 3
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 3
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 4
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14059,11 +14051,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_imm_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 5
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 4
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14138,11 +14130,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 3
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 3
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 4
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14177,11 +14169,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 3
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 3
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 4
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14217,11 +14209,11 @@ define amdgpu_gfx void @test_call_external_void_func_v3i32_i32_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3i32_i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3i32_i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 3
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 4
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14296,8 +14288,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -14332,8 +14324,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -14369,8 +14361,8 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -14449,11 +14441,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 6
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14488,11 +14480,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 6
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14528,11 +14520,11 @@ define amdgpu_gfx void @test_call_external_void_func_v4i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 6
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14613,11 +14605,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 7
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v5i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v5i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -14655,11 +14647,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 7
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v5i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v5i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -14698,11 +14690,11 @@ define amdgpu_gfx void @test_call_external_void_func_v5i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 7
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v5i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v5i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -14790,9 +14782,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -14836,9 +14828,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -14883,9 +14875,9 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -14986,11 +14978,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 10
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8i32_inreg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8i32_inreg at abs32@lo
-; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, 1
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, 2
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
@@ -15037,11 +15029,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 10
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8i32_inreg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8i32_inreg at abs32@lo
-; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
+; GFX11-NEXT: s_mov_b32 s4, 1
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, 2
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
@@ -15089,11 +15081,11 @@ define amdgpu_gfx void @test_call_external_void_func_v8i32_imm_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 10
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8i32_inreg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8i32_inreg at abs32@lo
-; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-SCRATCH-NEXT: s_mov_b32 s4, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: s_mov_b32 s5, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
@@ -15206,9 +15198,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 18
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -15268,9 +15260,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 18
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -15331,9 +15323,9 @@ define amdgpu_gfx void @test_call_external_void_func_v16i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 18
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -15505,9 +15497,9 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 28
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -15612,11 +15604,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 28
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s2, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -15715,10 +15707,10 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_inreg() #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 28
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_add_i32 s2, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -15936,9 +15928,9 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 28
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_load_dwordx2 s[34:35], s[34:35], 0x0
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-NEXT: v_writelane_b32 v40, s7, 3
@@ -16048,11 +16040,11 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 28
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GFX11-NEXT: s_add_i32 s3, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: v_writelane_b32 v40, s6, 2
; GFX11-NEXT: v_writelane_b32 v40, s7, 3
@@ -16155,10 +16147,10 @@ define amdgpu_gfx void @test_call_external_void_func_v32i32_i32_inreg(i32) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 28
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x0
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_add_i32 s3, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s6, 2
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s7, 3
@@ -16271,9 +16263,9 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GFX9-NEXT: buffer_load_dword v33, off, s[0:3], s33 offset:4
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
; GFX9-NEXT: s_mov_b32 s35, stack_passed_f64_arg at abs32@hi
@@ -16304,11 +16296,10 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: buffer_load_dword v32, off, s[0:3], s33
; GFX10-NEXT: buffer_load_dword v33, off, s[0:3], s33 offset:4
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: s_mov_b32 s35, stack_passed_f64_arg at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, stack_passed_f64_arg at abs32@lo
@@ -16316,6 +16307,7 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-NEXT: buffer_store_dword v32, off, s[0:3], s32
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: buffer_store_dword v33, off, s[0:3], s32 offset:4
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -16338,12 +16330,12 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:8 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: scratch_load_b64 v[32:33], off, s33
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
+; GFX11-NEXT: v_writelane_b32 v40, s0, 2
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: s_mov_b32 s1, stack_passed_f64_arg at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, stack_passed_f64_arg at abs32@lo
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: scratch_store_b64 off, v[32:33], s32
@@ -16368,12 +16360,12 @@ define amdgpu_gfx void @stack_passed_arg_alignment_v32i32_f64(<32 x i32> %val, d
; GFX10-SCRATCH-NEXT: scratch_store_dword off, v40, s33 offset:8 ; 4-byte Folded Spill
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: scratch_load_dwordx2 v[32:33], off, s33
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, stack_passed_f64_arg at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, stack_passed_f64_arg at abs32@lo
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_waitcnt vmcnt(0)
; GFX10-SCRATCH-NEXT: scratch_store_dwordx2 off, v[32:33], s32
@@ -16403,13 +16395,13 @@ define amdgpu_gfx void @stack_12xv3i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 12
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
; GFX9-NEXT: v_mov_b32_e32 v0, 14
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -16665,7 +16657,6 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 8
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -16680,6 +16671,7 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 13
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:20
; GFX9-NEXT: v_mov_b32_e32 v0, 14
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 15
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -16740,18 +16732,18 @@ define amdgpu_gfx void @stack_8xv5i32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 8
; GFX10-NEXT: v_mov_b32_e32 v1, 9
; GFX10-NEXT: v_mov_b32_e32 v2, 10
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_mov_b32_e32 v3, 14
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
; GFX10-NEXT: v_mov_b32_e32 v0, 11
; GFX10-NEXT: v_mov_b32_e32 v1, 12
; GFX10-NEXT: v_mov_b32_e32 v2, 13
+; GFX10-NEXT: v_mov_b32_e32 v3, 14
; GFX10-NEXT: v_mov_b32_e32 v4, 15
; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
@@ -16949,7 +16941,6 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX9-NEXT: s_or_saveexec_b64 s[36:37], -1
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[36:37]
-; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: s_addk_i32 s32, 0x400
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41000000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32
@@ -16964,6 +16955,7 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41500000
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:20
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41600000
+; GFX9-NEXT: v_writelane_b32 v40, s34, 2
; GFX9-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:24
; GFX9-NEXT: v_mov_b32_e32 v0, 0x41700000
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
@@ -17024,18 +17016,18 @@ define amdgpu_gfx void @stack_8xv5f32() #0 {
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
-; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: v_mov_b32_e32 v0, 0x41000000
; GFX10-NEXT: v_mov_b32_e32 v1, 0x41100000
; GFX10-NEXT: v_mov_b32_e32 v2, 0x41200000
; GFX10-NEXT: s_addk_i32 s32, 0x200
-; GFX10-NEXT: v_mov_b32_e32 v3, 0x41600000
+; GFX10-NEXT: v_writelane_b32 v40, s34, 2
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX10-NEXT: buffer_store_dword v1, off, s[0:3], s32 offset:4
; GFX10-NEXT: buffer_store_dword v2, off, s[0:3], s32 offset:8
; GFX10-NEXT: v_mov_b32_e32 v0, 0x41300000
; GFX10-NEXT: v_mov_b32_e32 v1, 0x41400000
; GFX10-NEXT: v_mov_b32_e32 v2, 0x41500000
+; GFX10-NEXT: v_mov_b32_e32 v3, 0x41600000
; GFX10-NEXT: v_mov_b32_e32 v4, 0x41700000
; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:12
@@ -17266,10 +17258,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17293,10 +17285,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17321,10 +17313,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16(i16 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17380,10 +17372,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v1bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v1bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17407,10 +17399,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17435,10 +17427,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16(i16 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17494,10 +17486,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17521,10 +17513,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17549,10 +17541,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16(i32 %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17608,10 +17600,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17635,10 +17627,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17663,10 +17655,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16(<3 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17722,10 +17714,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17749,10 +17741,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17777,10 +17769,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16(<4 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17836,10 +17828,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17863,10 +17855,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -17891,10 +17883,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16(<8 x i16> %arg) #0 {
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -17950,10 +17942,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -17977,10 +17969,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18005,10 +17997,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16(<16 x i16> %arg) #0
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18064,10 +18056,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18091,10 +18083,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18119,10 +18111,10 @@ define amdgpu_gfx void @test_call_external_void_func_bf16_inreg(i16 inreg %arg)
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18178,10 +18170,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v1bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v1bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18205,10 +18197,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18233,10 +18225,10 @@ define amdgpu_gfx void @test_call_external_void_func_v1bf16_inreg(i16 inreg %arg
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v1bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v1bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18292,10 +18284,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v2bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v2bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18319,10 +18311,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18347,10 +18339,10 @@ define amdgpu_gfx void @test_call_external_void_func_v2bf16_inreg(i32 inreg %arg
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v2bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v2bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18406,10 +18398,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v3bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v3bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18433,10 +18425,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18461,10 +18453,10 @@ define amdgpu_gfx void @test_call_external_void_func_v3bf16_inreg(<3 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v3bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v3bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18520,10 +18512,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v4bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v4bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18547,10 +18539,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18575,10 +18567,10 @@ define amdgpu_gfx void @test_call_external_void_func_v4bf16_inreg(<4 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v4bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v4bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18634,10 +18626,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v8bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v8bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18661,10 +18653,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18689,10 +18681,10 @@ define amdgpu_gfx void @test_call_external_void_func_v8bf16_inreg(<8 x i16> inre
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v8bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v8bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
@@ -18748,10 +18740,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_v16bf16 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_v16bf16 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -18775,10 +18767,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -18803,10 +18795,10 @@ define amdgpu_gfx void @test_call_external_void_func_v16bf16_inreg(<16 x i16> in
; GFX10-SCRATCH-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-SCRATCH-NEXT: s_mov_b32 exec_lo, s1
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s0, 2
-; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: s_mov_b32 s1, external_void_func_v16bf16 at abs32@hi
; GFX10-SCRATCH-NEXT: s_mov_b32 s0, external_void_func_v16bf16 at abs32@lo
; GFX10-SCRATCH-NEXT: s_add_i32 s32, s32, 16
+; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-SCRATCH-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-SCRATCH-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX10-SCRATCH-NEXT: v_readlane_b32 s31, v40, 1
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
index 77c34b69820ce..124de7e00f020 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-preserved-registers.ll
@@ -49,9 +49,9 @@ define amdgpu_gfx void @test_call_external_void_func_void_clobber_s30_s31_call_e
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 4
+; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, external_void_func_void at abs32@lo
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s5, 1
; GFX10-NEXT: s_mov_b32 s5, external_void_func_void at abs32@hi
; GFX10-NEXT: v_writelane_b32 v40, s30, 2
@@ -83,9 +83,9 @@ define amdgpu_gfx void @test_call_external_void_func_void_clobber_s30_s31_call_e
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 4
+; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, external_void_func_void at abs32@lo
-; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: v_writelane_b32 v40, s5, 1
; GFX11-NEXT: s_mov_b32 s5, external_void_func_void at abs32@hi
; GFX11-NEXT: v_writelane_b32 v40, s30, 2
@@ -246,10 +246,10 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_s31(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: ;;#ASMSTART
@@ -283,10 +283,10 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_s31(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: ;;#ASMSTART
@@ -362,16 +362,16 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_v31(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 2
-; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s31, 1
+; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def v31
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: v_mov_b32_e32 v40, v31
+; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_mov_b32_e32 v31, v40
; GFX10-NEXT: ;;#ASMSTART
@@ -399,18 +399,18 @@ define amdgpu_gfx void @test_call_void_func_void_mayclobber_v31(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 2
-; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s31, 1
+; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def v31
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: v_mov_b32_e32 v40, v31
+; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
-; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
+; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
; GFX11-NEXT: v_mov_b32_e32 v31, v40
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; use v31
@@ -480,15 +480,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s33(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s33
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: v_writelane_b32 v40, s30, 1
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, s33
+; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_mov_b32 s33, s4
@@ -517,15 +517,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s33(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s33
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, s33
+; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_mov_b32 s33, s4
@@ -597,15 +597,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s34(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s34
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: s_mov_b32 s4, s34
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
+; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
+; GFX10-NEXT: s_mov_b32 s4, s34
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: v_writelane_b32 v40, s30, 1
-; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: s_mov_b32 s34, s4
@@ -634,15 +634,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_s34(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s34
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, s34
+; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_mov_b32 s34, s4
@@ -712,15 +712,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_v40(ptr addrspace(1)
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 2
-; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s31, 1
+; GFX10-NEXT: v_writelane_b32 v41, s30, 0
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def v40
; GFX10-NEXT: ;;#ASMEND
+; GFX10-NEXT: v_writelane_b32 v41, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; use v40
@@ -747,15 +747,15 @@ define amdgpu_gfx void @test_call_void_func_void_preserves_v40(ptr addrspace(1)
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 2
-; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s31, 1
+; GFX11-NEXT: v_writelane_b32 v41, s30, 0
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def v40
; GFX11-NEXT: ;;#ASMEND
+; GFX11-NEXT: v_writelane_b32 v41, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; use v40
@@ -870,10 +870,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s33() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, void_func_void_clobber_s33 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, void_func_void_clobber_s33 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -897,10 +897,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s33() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, void_func_void_clobber_s33 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, void_func_void_clobber_s33 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -955,10 +955,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s34() #0 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 2
-; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: s_mov_b32 s35, void_func_void_clobber_s34 at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, void_func_void_clobber_s34 at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
+; GFX10-NEXT: v_writelane_b32 v40, s30, 0
; GFX10-NEXT: v_writelane_b32 v40, s31, 1
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: v_readlane_b32 s31, v40, 1
@@ -982,10 +982,10 @@ define amdgpu_gfx void @test_call_void_func_void_clobber_s34() #0 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 2
-; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: s_mov_b32 s1, void_func_void_clobber_s34 at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, void_func_void_clobber_s34 at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
+; GFX11-NEXT: v_writelane_b32 v40, s30, 0
; GFX11-NEXT: v_writelane_b32 v40, s31, 1
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
@@ -1049,15 +1049,15 @@ define amdgpu_gfx void @callee_saved_sgpr_kernel() #1 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v40, s34, 3
-; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s40
; GFX10-NEXT: ;;#ASMEND
-; GFX10-NEXT: v_writelane_b32 v40, s30, 1
+; GFX10-NEXT: v_writelane_b32 v40, s4, 0
; GFX10-NEXT: s_mov_b32 s4, s40
+; GFX10-NEXT: v_writelane_b32 v40, s30, 1
; GFX10-NEXT: v_writelane_b32 v40, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
@@ -1085,15 +1085,15 @@ define amdgpu_gfx void @callee_saved_sgpr_kernel() #1 {
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v40, s0, 3
-; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s40
; GFX11-NEXT: ;;#ASMEND
-; GFX11-NEXT: v_writelane_b32 v40, s30, 1
+; GFX11-NEXT: v_writelane_b32 v40, s4, 0
; GFX11-NEXT: s_mov_b32 s4, s40
+; GFX11-NEXT: v_writelane_b32 v40, s30, 1
; GFX11-NEXT: v_writelane_b32 v40, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
@@ -1172,12 +1172,11 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s35
; GFX10-NEXT: v_writelane_b32 v41, s34, 3
-; GFX10-NEXT: v_writelane_b32 v41, s4, 0
; GFX10-NEXT: s_mov_b32 s35, external_void_func_void at abs32@hi
; GFX10-NEXT: s_mov_b32 s34, external_void_func_void at abs32@lo
; GFX10-NEXT: s_addk_i32 s32, 0x200
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
-; GFX10-NEXT: v_writelane_b32 v41, s30, 1
+; GFX10-NEXT: v_writelane_b32 v41, s4, 0
; GFX10-NEXT: ;;#ASMSTART
; GFX10-NEXT: ; def s40
; GFX10-NEXT: ;;#ASMEND
@@ -1186,6 +1185,7 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX10-NEXT: ; def v32
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: v_mov_b32_e32 v40, v32
+; GFX10-NEXT: v_writelane_b32 v41, s30, 1
; GFX10-NEXT: v_writelane_b32 v41, s31, 2
; GFX10-NEXT: s_swappc_b64 s[30:31], s[34:35]
; GFX10-NEXT: ;;#ASMSTART
@@ -1217,12 +1217,11 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:4 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
; GFX11-NEXT: v_writelane_b32 v41, s0, 3
-; GFX11-NEXT: v_writelane_b32 v41, s4, 0
; GFX11-NEXT: s_mov_b32 s1, external_void_func_void at abs32@hi
; GFX11-NEXT: s_mov_b32 s0, external_void_func_void at abs32@lo
; GFX11-NEXT: s_add_i32 s32, s32, 16
; GFX11-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
-; GFX11-NEXT: v_writelane_b32 v41, s30, 1
+; GFX11-NEXT: v_writelane_b32 v41, s4, 0
; GFX11-NEXT: ;;#ASMSTART
; GFX11-NEXT: ; def s40
; GFX11-NEXT: ;;#ASMEND
@@ -1231,6 +1230,7 @@ define amdgpu_gfx void @callee_saved_sgpr_vgpr_kernel() #1 {
; GFX11-NEXT: ; def v32
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: v_mov_b32_e32 v40, v32
+; GFX11-NEXT: v_writelane_b32 v41, s30, 1
; GFX11-NEXT: v_writelane_b32 v41, s31, 2
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
; GFX11-NEXT: ;;#ASMSTART
diff --git a/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll b/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
index 20666560a7ec7..e6ceaf54e0756 100644
--- a/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
+++ b/llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
@@ -2914,7 +2914,43 @@ define amdgpu_gfx void @call_72xi32() #1 {
; GFX10-NEXT: s_mov_b32 s38, s34
; GFX10-NEXT: s_mov_b32 s34, s32
; GFX10-NEXT: s_add_i32 s32, s32, 0x14000
+<<<<<<< HEAD
; GFX10-NEXT: v_writelane_b32 v63, s30, 0
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v43, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v46, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v47, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v59, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v60, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v61, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v62, off, s[0:3], s33 ; 4-byte Folded Spill
+; GFX10-NEXT: v_writelane_b32 v63, s30, 0
+; GFX10-NEXT: v_mov_b32_e32 v1, 0
+=======
+; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v43, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v46, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v47, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v59, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v60, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v61, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
+; GFX10-NEXT: buffer_store_dword v62, off, s[0:3], s33 ; 4-byte Folded Spill
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
@@ -2957,12 +2993,26 @@ define amdgpu_gfx void @call_72xi32() #1 {
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:156
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:160
; GFX10-NEXT: v_lshrrev_b32_e64 v0, 5, s33
+<<<<<<< HEAD
; GFX10-NEXT: v_mov_b32_e32 v1, 0
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+=======
+; GFX10-NEXT: v_writelane_b32 v63, s30, 0
+; GFX10-NEXT: v_mov_b32_e32 v1, 0
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0
+; GFX10-NEXT: v_add_nc_u32_e32 v0, 0x200, v0
; GFX10-NEXT: v_mov_b32_e32 v4, 0
+<<<<<<< HEAD
; GFX10-NEXT: v_add_nc_u32_e32 v0, 0x200, v0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+; GFX10-NEXT: v_mov_b32_e32 v5, 0
+; GFX10-NEXT: v_add_nc_u32_e32 v0, 0x200, v0
+=======
+; GFX10-NEXT: v_mov_b32_e32 v5, 0
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX10-NEXT: v_mov_b32_e32 v6, 0
; GFX10-NEXT: v_mov_b32_e32 v7, 0
; GFX10-NEXT: v_mov_b32_e32 v8, 0
@@ -3196,8 +3246,14 @@ define amdgpu_gfx void @call_72xi32() #1 {
; GFX11-NEXT: s_mov_b32 s3, s0
; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
; GFX11-NEXT: v_dual_mov_b32 v2, s2 :: v_dual_mov_b32 v3, s3
+<<<<<<< HEAD
; GFX11-NEXT: s_mov_b32 s39, s34
; GFX11-NEXT: s_mov_b32 s34, s32
+||||||| parent of e811d0543c02 (Use nounwind to avoid touching unrelated tests)
+=======
+; GFX11-NEXT: s_mov_b32 s36, s34
+; GFX11-NEXT: s_mov_b32 s34, s32
+>>>>>>> e811d0543c02 (Use nounwind to avoid touching unrelated tests)
; GFX11-NEXT: s_addk_i32 s32, 0xa00
; GFX11-NEXT: s_clause 0xd ; 56-byte Folded Spill
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:52
diff --git a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
index 5a344c8ee37f9..df784a6e00cfc 100644
--- a/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
+++ b/llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
@@ -3,243 +3,32 @@
declare fastcc void @bar()
-define fastcc i32 @foo() {
+define fastcc i32 @foo() #0 {
; CHECK-LABEL: name: foo
; CHECK: bb.0 (%ir-block.0):
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: liveins: $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr30, $sgpr31, $vgpr31, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr28
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr29
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr30
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr31
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr32
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr33
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr34
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr35
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr36
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr37
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr38
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr39
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr144
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr145
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr146
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr147
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr148
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr149
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr150
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr151
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr160
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr161
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr162
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr163
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr164
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr165
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr166
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr167
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr176
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr177
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr178
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr179
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr180
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr181
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr182
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr183
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr192
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr193
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr194
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr195
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr196
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr197
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr198
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr199
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr208
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr209
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr210
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr211
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr212
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr213
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr214
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr215
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr224
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr225
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr226
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr227
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr228
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr229
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr230
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr231
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
; CHECK-NEXT: S_WAITCNT 0
; CHECK-NEXT: $sgpr16 = S_MOV_B32 $sgpr33
; CHECK-NEXT: $sgpr33 = S_MOV_B32 $sgpr32
; CHECK-NEXT: $sgpr17 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: BUFFER_STORE_DWORD_OFFSET $vgpr40, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (store (s32) into %stack.2, addrspace 5)
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr40, 0
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr17
- ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr33, $vgpr40, 2, 32
- ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $sgpr33
; CHECK-NEXT: $sgpr32 = frame-setup S_ADDK_I32 $sgpr32, 512, implicit-def dead $scc
+ ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr16, 2, undef $vgpr40
; CHECK-NEXT: BUNDLE implicit-def $sgpr16_sgpr17, implicit-def $sgpr16, implicit-def $scc, implicit-def $sgpr17 {
; CHECK-NEXT: $sgpr16_sgpr17 = S_GETPC_B64
; CHECK-NEXT: $sgpr16 = S_ADD_U32 internal $sgpr16, target-flags(amdgpu-gotprel32-lo) @bar + 4, implicit-def $scc
; CHECK-NEXT: $sgpr17 = S_ADDC_U32 internal $sgpr17, target-flags(amdgpu-gotprel32-hi) @bar + 12, implicit-def $scc, implicit internal $scc
; CHECK-NEXT: }
- ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr40
- ; CHECK-NEXT: renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM killed renamable $sgpr16_sgpr17, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
- ; CHECK-NEXT: S_WAITCNT 49279
; CHECK-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
; CHECK-NEXT: BUFFER_GL1_INV implicit $exec
; CHECK-NEXT: BUFFER_GL0_INV implicit $exec
+ ; CHECK-NEXT: renamable $sgpr16_sgpr17 = S_LOAD_DWORDX2_IMM killed renamable $sgpr16_sgpr17, 0, 0 :: (dereferenceable invariant load (s64) from got, addrspace 4)
+ ; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr30, 0, $vgpr40
; CHECK-NEXT: $vgpr40 = V_WRITELANE_B32 killed $sgpr31, 1, $vgpr40
+ ; CHECK-NEXT: S_WAITCNT 49279
; CHECK-NEXT: dead $sgpr30_sgpr31 = SI_CALL killed renamable $sgpr16_sgpr17, @bar, csr_amdgpu, implicit killed $sgpr4_sgpr5, implicit killed $sgpr6_sgpr7, implicit killed $sgpr8_sgpr9, implicit killed $sgpr10_sgpr11, implicit killed $sgpr12, implicit killed $sgpr13, implicit killed $sgpr14, implicit killed $sgpr15, implicit killed $vgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; CHECK-NEXT: $vcc_lo = S_MOV_B32 $exec_lo
; CHECK-NEXT: {{ $}}
@@ -257,7 +46,6 @@ define fastcc i32 @foo() {
; CHECK-NEXT: $sgpr5 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; CHECK-NEXT: $vgpr40 = BUFFER_LOAD_DWORD_OFFSET $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr33, 0, 0, 0, implicit $exec :: (load (s32) from %stack.2, addrspace 5)
; CHECK-NEXT: $exec_lo = S_MOV_B32 killed $sgpr5
- ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa_register $sgpr32
; CHECK-NEXT: $sgpr33 = S_MOV_B32 killed $sgpr4
; CHECK-NEXT: S_WAITCNT 16240
; CHECK-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31, implicit undef $vgpr0
@@ -268,3 +56,5 @@ define fastcc i32 @foo() {
1:
br label %1
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
index db80f5479d36b..bd655a88704fa 100644
--- a/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
+++ b/llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
@@ -16,7 +16,7 @@
; so eliminateFrameIndex would not adjust the access to use the
; correct FP offset.
-define amdgpu_kernel void @local_stack_offset_uses_sp(ptr addrspace(1) %out) {
+define amdgpu_kernel void @local_stack_offset_uses_sp(ptr addrspace(1) %out) #1 {
; MUBUF-LABEL: local_stack_offset_uses_sp:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_add_u32 s0, s0, s17
@@ -103,21 +103,21 @@ entry:
ret void
}
-define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
+define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) #1 {
; MUBUF-LABEL: func_local_stack_offset_uses_sp:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MUBUF-NEXT: s_mov_b32 s5, s33
; MUBUF-NEXT: s_add_i32 s33, s32, 0x7ffc0
-; MUBUF-NEXT: s_mov_b32 s6, s34
; MUBUF-NEXT: s_and_b32 s33, s33, 0xfff80000
-; MUBUF-NEXT: s_mov_b32 s34, s32
; MUBUF-NEXT: v_lshrrev_b32_e64 v3, 6, s33
; MUBUF-NEXT: v_add_u32_e32 v3, 0x3000, v3
+; MUBUF-NEXT: s_mov_b32 s6, s34
; MUBUF-NEXT: v_add_u32_e32 v2, 64, v3
; MUBUF-NEXT: v_mov_b32_e32 v3, 0
; MUBUF-NEXT: v_mov_b32_e32 v4, 0x2000
; MUBUF-NEXT: s_mov_b32 s4, 0
+; MUBUF-NEXT: s_mov_b32 s34, s32
; MUBUF-NEXT: s_add_i32 s32, s32, 0x200000
; MUBUF-NEXT: buffer_store_dword v3, v4, s[0:3], s33 offen
; MUBUF-NEXT: s_waitcnt vmcnt(0)
@@ -145,11 +145,11 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; MUBUF-NEXT: s_waitcnt vmcnt(0)
; MUBUF-NEXT: s_mov_b32 s32, s34
; MUBUF-NEXT: s_mov_b32 s34, s6
+; MUBUF-NEXT: s_mov_b32 s33, s5
; MUBUF-NEXT: v_add_co_u32_e32 v2, vcc, v4, v6
; MUBUF-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v7, vcc
; MUBUF-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; MUBUF-NEXT: s_waitcnt vmcnt(0)
-; MUBUF-NEXT: s_mov_b32 s33, s5
; MUBUF-NEXT: s_setpc_b64 s[30:31]
;
; FLATSCR-LABEL: func_local_stack_offset_uses_sp:
@@ -157,8 +157,8 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s2, s33
; FLATSCR-NEXT: s_add_i32 s33, s32, 0x1fff
-; FLATSCR-NEXT: s_mov_b32 s3, s34
; FLATSCR-NEXT: s_and_b32 s33, s33, 0xffffe000
+; FLATSCR-NEXT: s_mov_b32 s3, s34
; FLATSCR-NEXT: s_mov_b32 s34, s32
; FLATSCR-NEXT: s_add_i32 s32, s32, 0x8000
; FLATSCR-NEXT: v_mov_b32_e32 v2, 0
@@ -186,11 +186,11 @@ define void @func_local_stack_offset_uses_sp(ptr addrspace(1) %out) {
; FLATSCR-NEXT: s_waitcnt vmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s32, s34
; FLATSCR-NEXT: s_mov_b32 s34, s3
+; FLATSCR-NEXT: s_mov_b32 s33, s2
; FLATSCR-NEXT: v_add_co_u32_e32 v2, vcc, v2, v4
; FLATSCR-NEXT: v_addc_co_u32_e32 v3, vcc, v3, v5, vcc
; FLATSCR-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; FLATSCR-NEXT: s_waitcnt vmcnt(0)
-; FLATSCR-NEXT: s_mov_b32 s33, s2
; FLATSCR-NEXT: s_setpc_b64 s[30:31]
entry:
%pin.low = alloca i32, align 8192, addrspace(5)
@@ -206,7 +206,7 @@ entry:
ret void
}
-define amdgpu_kernel void @local_stack_offset_uses_sp_flat(ptr addrspace(1) %out) {
+define amdgpu_kernel void @local_stack_offset_uses_sp_flat(ptr addrspace(1) %out) #1 {
; MUBUF-LABEL: local_stack_offset_uses_sp_flat:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_add_u32 s0, s0, s17
@@ -347,3 +347,4 @@ entry:
declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture writeonly, i8, i32, i1 immarg) #0
attributes #0 = { argmemonly nounwind willreturn writeonly }
+attributes #1 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/nested-calls.ll b/llvm/test/CodeGen/AMDGPU/nested-calls.ll
index 94e997cf49ddb..ccaf0ac5377e4 100644
--- a/llvm/test/CodeGen/AMDGPU/nested-calls.ll
+++ b/llvm/test/CodeGen/AMDGPU/nested-calls.ll
@@ -18,8 +18,8 @@ define void @test_func_call_external_void_func_i32_imm() #0 {
; GCN-NEXT: s_or_saveexec_b64 s[18:19], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[18:19]
-; GCN-NEXT: v_writelane_b32 v40, s16, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s16, 2
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, external_void_func_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, external_void_func_i32 at gotpcrel32@hi+12
@@ -52,8 +52,8 @@ define void @test_func_call_external_void_func_i32_imm_stack_use() #0 {
; GCN-NEXT: s_or_saveexec_b64 s[18:19], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[18:19]
-; GCN-NEXT: v_writelane_b32 v40, s16, 2
; GCN-NEXT: s_addk_i32 s32, 0x1400
+; GCN-NEXT: v_writelane_b32 v40, s16, 2
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, external_void_func_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, external_void_func_i32 at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll b/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
index 7155c8e085470..6b6c60ebe2a9e 100644
--- a/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
+++ b/llvm/test/CodeGen/AMDGPU/no-source-locations-in-prologue.ll
@@ -267,7 +267,7 @@ entry:
; Function Attrs: convergent nounwind
declare void @_ZL13sleep_foreverv() #0
-attributes #0 = { nounwind "frame-pointer"="all" }
+attributes #0 = { "frame-pointer"="all" }
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!1638, !1639, !1640, !1641}
diff --git a/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll b/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
index a2c86bd09404a..eb1a392ef554a 100644
--- a/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
+++ b/llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
@@ -116,7 +116,7 @@ bb.2:
; ASSUME1024: .amdhsa_private_segment_fixed_size 1040
; ASSUME1024: ; ScratchSize: 1040
-define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
+define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #2 {
; MUBUF-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align64:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_load_dwordx2 s[4:5], s[8:9], 0x8
@@ -210,13 +210,13 @@ bb.1:
; ASSUME1024: ; ScratchSize: 1088
-define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {
+define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #2 {
; MUBUF-LABEL: func_non_entry_block_static_alloca_align4:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MUBUF-NEXT: s_mov_b32 s7, s33
-; MUBUF-NEXT: s_mov_b32 s33, s32
; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
+; MUBUF-NEXT: s_mov_b32 s33, s32
; MUBUF-NEXT: s_addk_i32 s32, 0x400
; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc
; MUBUF-NEXT: s_cbranch_execz .LBB2_3
@@ -250,8 +250,8 @@ define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i3
; FLATSCR: ; %bb.0: ; %entry
; FLATSCR-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; FLATSCR-NEXT: s_mov_b32 s3, s33
-; FLATSCR-NEXT: s_mov_b32 s33, s32
; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
+; FLATSCR-NEXT: s_mov_b32 s33, s32
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc
; FLATSCR-NEXT: s_cbranch_execz .LBB2_3
@@ -306,16 +306,16 @@ bb.2:
ret void
}
-define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
+define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #2 {
; MUBUF-LABEL: func_non_entry_block_static_alloca_align64:
; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MUBUF-NEXT: s_mov_b32 s7, s33
; MUBUF-NEXT: s_add_i32 s33, s32, 0xfc0
; MUBUF-NEXT: s_mov_b32 s8, s34
+; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_and_b32 s33, s33, 0xfffff000
; MUBUF-NEXT: s_mov_b32 s34, s32
-; MUBUF-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; MUBUF-NEXT: s_addk_i32 s32, 0x2000
; MUBUF-NEXT: s_and_saveexec_b64 s[4:5], vcc
; MUBUF-NEXT: s_cbranch_execz .LBB3_2
@@ -350,9 +350,9 @@ define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i
; FLATSCR-NEXT: s_mov_b32 s3, s33
; FLATSCR-NEXT: s_add_i32 s33, s32, 63
; FLATSCR-NEXT: s_mov_b32 s4, s34
+; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_andn2_b32 s33, s33, 63
; FLATSCR-NEXT: s_mov_b32 s34, s32
-; FLATSCR-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
; FLATSCR-NEXT: s_addk_i32 s32, 0x80
; FLATSCR-NEXT: s_and_saveexec_b64 s[0:1], vcc
; FLATSCR-NEXT: s_cbranch_execz .LBB3_2
@@ -403,6 +403,7 @@ declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-cluster-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-cluster-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-cluster-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
+attributes #2 = { nounwind }
!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 CODE_OBJECT_VERSION}
diff --git a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
index c61241c65b326..4db196d4dd96c 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain-preserve.mir
@@ -5,13 +5,15 @@
declare amdgpu_cs_chain void @callee()
declare amdgpu_gfx void @gfx_callee()
- define amdgpu_cs_chain_preserve void @preserve_active_lanes_above_args() {ret void}
- define amdgpu_cs_chain_preserve void @preserve_all_lanes_wwm_above_args() {ret void}
- define amdgpu_cs_chain_preserve void @dont_preserve_args() {ret void}
- define amdgpu_cs_chain_preserve void @preserve_inactive_lanes_wwm_args() {ret void}
- define amdgpu_cs_chain_preserve void @dont_preserve_if_no_chain_calls() {ret void}
- define amdgpu_cs_chain_preserve void @dont_preserve_v0_v7() {ret void}
- define amdgpu_cs_chain_preserve void @dont_preserve_sgpr() {ret void}
+ define amdgpu_cs_chain_preserve void @preserve_active_lanes_above_args() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @preserve_all_lanes_wwm_above_args() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @dont_preserve_args() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @preserve_inactive_lanes_wwm_args() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @dont_preserve_if_no_chain_calls() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @dont_preserve_v0_v7() #0 {ret void}
+ define amdgpu_cs_chain_preserve void @dont_preserve_sgpr() #0 {ret void}
+
+ attributes #0 = { nounwind }
...
---
@@ -36,114 +38,6 @@ body: |
; GCN-LABEL: name: preserve_active_lanes_above_args
; GCN: liveins: $sgpr0, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: SCRATCH_STORE_DWORD_ST killed $vgpr10, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
; GCN-NEXT: renamable $vgpr10 = V_MOV_B32_e32 10, implicit $exec
; GCN-NEXT: $vgpr8 = COPY killed renamable $vgpr10
@@ -177,125 +71,8 @@ body: |
; GCN-LABEL: name: preserve_all_lanes_wwm_above_args
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr10, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr10, 0
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr10 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr10
@@ -337,122 +114,6 @@ body: |
; GCN-LABEL: name: dont_preserve_args
; GCN: liveins: $sgpr0, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 10, implicit $exec
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
@@ -484,125 +145,8 @@ body: |
; GCN-LABEL: name: preserve_inactive_lanes_wwm_args
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9, $vgpr10
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr9, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr9, 0
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
@@ -644,17 +188,6 @@ body: |
; GCN-LABEL: name: dont_preserve_if_no_chain_calls
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
; GCN-NEXT: S_NOP 0, implicit-def $vgpr0, implicit-def $vgpr1, implicit-def $vgpr2, implicit-def $vgpr3, implicit-def $vgpr4, implicit-def $vgpr5, implicit-def $vgpr6, implicit-def $vgpr7
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
@@ -691,116 +224,6 @@ body: |
; GCN-LABEL: name: dont_preserve_v0_v7
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
@@ -839,114 +262,6 @@ body: |
; GCN-LABEL: name: dont_preserve_sgpr
; GCN: liveins: $sgpr0
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
; GCN-NEXT: $sgpr0 = COPY killed renamable $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
index b4f4412373509..d0c673e1cdbdf 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
@@ -7,12 +7,14 @@
declare amdgpu_cs_chain void @callee()
declare amdgpu_gfx void @gfx_callee()
- define amdgpu_cs_chain void @preserve_inactive_wwm() {ret void}
- define amdgpu_cs_chain void @dont_preserve_wwm_if_no_chain_calls() {ret void}
- define amdgpu_cs_chain void @dont_preserve_wwm_if_init_whole_wave() {ret void}
- define amdgpu_cs_chain void @dont_preserve_non_wwm() {ret void}
- define amdgpu_cs_chain void @dont_preserve_v0_v7() {ret void}
- define amdgpu_cs_chain void @dont_preserve_sgpr() {ret void}
+ define amdgpu_cs_chain void @preserve_inactive_wwm() #0 {ret void}
+ define amdgpu_cs_chain void @dont_preserve_wwm_if_no_chain_calls() #0 {ret void}
+ define amdgpu_cs_chain void @dont_preserve_wwm_if_init_whole_wave() #0 {ret void}
+ define amdgpu_cs_chain void @dont_preserve_non_wwm() #0 {ret void}
+ define amdgpu_cs_chain void @dont_preserve_v0_v7() #0 {ret void}
+ define amdgpu_cs_chain void @dont_preserve_sgpr() #0 {ret void}
+
+ attributes #0 = { nounwind }
...
---
@@ -37,127 +39,9 @@ body: |
; GCN-LABEL: name: preserve_inactive_wwm
; GCN: liveins: $sgpr0, $sgpr35, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $sgpr1 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr8, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr8, 0
; GCN-NEXT: SCRATCH_STORE_DWORD_ST $vgpr9, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr9, 128
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
@@ -191,18 +75,6 @@ body: |
; GCN-LABEL: name: dont_preserve_wwm_if_no_chain_calls
; GCN: liveins: $sgpr35, $vgpr8
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
; GCN-NEXT: $vgpr8 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr8
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr8, 0
@@ -236,114 +108,6 @@ body: |
; GCN-LABEL: name: dont_preserve_wwm_if_init_whole_wave
; GCN: liveins: $sgpr0, $sgpr35
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (p0) from got, addrspace 4)
; GCN-NEXT: SI_CS_CHAIN_TC_W32 killed renamable $sgpr4_sgpr5, @callee, 0, -1, amdgpu_allvgprs, implicit $sgpr0, implicit $vgpr1
@@ -369,116 +133,6 @@ body: |
; GCN-LABEL: name: dont_preserve_non_wwm
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr8, $vgpr16
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $vgpr16 = V_MOV_B32_e32 16, implicit $exec
; GCN-NEXT: renamable $vgpr8 = V_MOV_B32_e32 8, implicit $exec
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
@@ -510,118 +164,6 @@ body: |
; GCN-LABEL: name: dont_preserve_v0_v7
; GCN: liveins: $sgpr0, $sgpr35, $vgpr0, $vgpr7, $vgpr8, $vgpr9
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR $sgpr35, 0, killed $vgpr0
; GCN-NEXT: $sgpr35 = S_MOV_B32 5
; GCN-NEXT: $sgpr35 = SI_RESTORE_S32_FROM_VGPR $vgpr0, 0
@@ -660,114 +202,6 @@ body: |
; GCN-LABEL: name: dont_preserve_sgpr
; GCN: liveins: $sgpr0
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr6
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr7
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr8
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr9
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr10
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr11
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr12
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr13
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr14
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr15
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr16
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr17
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr18
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr19
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr20
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr21
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr23
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr24
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr25
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr26
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr27
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr28
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr29
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr30
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr31
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr64
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr65
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr66
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr67
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr68
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr69
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr70
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr71
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr72
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr73
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr74
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr75
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr76
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr77
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr78
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr79
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr80
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr81
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr82
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr83
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr84
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr85
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr86
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr87
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr88
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr89
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr90
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr91
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr92
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr93
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr94
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr95
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr96
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr97
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr98
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr99
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr100
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr101
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr102
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr103
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr104
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr105
; GCN-NEXT: renamable $sgpr1 = S_ADD_I32 killed renamable $sgpr0, renamable $sgpr0, implicit-def dead $scc
; GCN-NEXT: $sgpr0 = COPY killed renamable $sgpr1
; GCN-NEXT: renamable $sgpr4_sgpr5 = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @callee + 4, target-flags(amdgpu-gotprel32-hi) @callee + 12, implicit-def dead $scc
diff --git a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
index 55914bacb0dc1..c9208bfa15c63 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
@@ -59,10 +59,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v2_partial_agpr
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; MUBUF-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
@@ -73,10 +69,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v2_partial_agpr
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr0, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1 :: (store (s32) into %stack.0, addrspace 5)
@@ -104,11 +96,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v3_partial_agpr
; MUBUF-V2A: liveins: $agpr0
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -121,11 +108,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v3_partial_agpr
; FLATSCR-V2A: liveins: $agpr0
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr0_vgpr1_vgpr2
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed $vgpr0_vgpr1, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit killed $vgpr0_vgpr1_vgpr2 :: (store (s64) into %stack.0, align 4, addrspace 5)
@@ -153,12 +135,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v4_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -173,12 +149,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v4_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3
@@ -210,13 +180,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v5_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -233,13 +196,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v5_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4
@@ -271,14 +227,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v6_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
@@ -297,14 +245,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v6_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
; FLATSCR-V2A-NEXT: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5
@@ -340,16 +280,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v8_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -372,16 +302,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v8_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-V2A-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr7, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
@@ -415,24 +335,6 @@ body: |
; MUBUF-V2A-LABEL: name: test_spill_v16_partial_agpr
; MUBUF-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; MUBUF-V2A-NEXT: {{ $}}
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_def_aspace_cfa $sgpr32, 0, 6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
- ; MUBUF-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
; MUBUF-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s32) into %stack.0, addrspace 5)
; MUBUF-V2A-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, implicit $exec :: (store (s32) into %stack.0 + 4, addrspace 5)
@@ -471,24 +373,6 @@ body: |
; FLATSCR-V2A-LABEL: name: test_spill_v16_partial_agpr
; FLATSCR-V2A: liveins: $agpr0, $agpr1, $agpr2, $agpr3, $agpr4
; FLATSCR-V2A-NEXT: {{ $}}
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
- ; FLATSCR-V2A-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
; FLATSCR-V2A-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr0_vgpr1_vgpr2_vgpr3, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 :: (store (s128) into %stack.0, align 4, addrspace 5)
; FLATSCR-V2A-NEXT: SCRATCH_STORE_DWORDX4_SADDR killed $vgpr4_vgpr5_vgpr6_vgpr7, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s128) into %stack.0 + 16, align 4, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir b/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
index 023bcc563cdcd..a418e5c631b88 100644
--- a/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+++ b/llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
@@ -1,16 +1,18 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,+wavefrontsize32,-wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=W32
-# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,-wavefrontsize32,+wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=W64
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,+wavefrontsize32,-wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,W32
+# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+block-vgpr-csr,-wavefrontsize32,+wavefrontsize64 -start-before=si-lower-sgpr-spills -stop-after=prologepilog -verify-machineinstrs -o - %s | FileCheck %s --check-prefixes=CHECK,W64
--- |
- define void @one_block() { ret void }
- define void @one_block_csr_only() { ret void }
- define void @multiple_blocks() { ret void }
- define void @reg_tuples() { ret void }
- define void @locals() { ret void }
- define void @other_regs() { ret void }
- define amdgpu_kernel void @entry_func() { ret void }
- define void @multiple_basic_blocks() { ret void }
+ define void @one_block() #0 { ret void }
+ define void @one_block_csr_only() #0 { ret void }
+ define void @multiple_blocks() #0 { ret void }
+ define void @reg_tuples() #0 { ret void }
+ define void @locals() #0 { ret void }
+ define void @other_regs() #0 { ret void }
+ define amdgpu_kernel void @entry_func() #0 { ret void }
+ define void @multiple_basic_blocks() #0 { ret void }
+
+ attributes #0 = { nounwind }
...
# Block load/store v42 and v45. The mask should be 0x9.
@@ -23,61 +25,15 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; W32-LABEL: name: one_block
- ; W32: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: $m0 = S_MOV_B32 9
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; W32-NEXT: $m0 = S_MOV_B32 9
- ; W32-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: one_block
- ; W64: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: $m0 = S_MOV_B32 9
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; W64-NEXT: $m0 = S_MOV_B32 9
- ; W64-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: one_block
+ ; CHECK: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 9
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; CHECK-NEXT: $m0 = S_MOV_B32 9
+ ; CHECK-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -93,61 +49,15 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; W32-LABEL: name: one_block_csr_only
- ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: $m0 = S_MOV_B32 16711935
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
- ; W32-NEXT: $m0 = S_MOV_B32 16711935
- ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: one_block_csr_only
- ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: $m0 = S_MOV_B32 16711935
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
- ; W64-NEXT: $m0 = S_MOV_B32 16711935
- ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: one_block_csr_only
+ ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 16711935
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
+ ; CHECK-NEXT: $m0 = S_MOV_B32 16711935
+ ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr42, implicit-def $vgpr43, implicit-def $vgpr44, implicit-def $vgpr45, implicit-def $vgpr46, implicit-def $vgpr47, implicit-def $vgpr48, implicit-def $vgpr49, implicit-def $vgpr50, implicit-def $vgpr51, implicit-def $vgpr52, implicit-def $vgpr53, implicit-def $vgpr54, implicit-def $vgpr55, implicit-def $vgpr56, implicit-def $vgpr57, implicit-def $vgpr58, implicit-def $vgpr59, implicit-def $vgpr60, implicit-def $vgpr61, implicit-def $vgpr62, implicit-def $vgpr63, implicit-def $vgpr64, implicit-def $vgpr65, implicit-def $vgpr66
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -167,125 +77,23 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; W32-LABEL: name: multiple_blocks
- ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
- ; W32-NEXT: $m0 = S_MOV_B32 3
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 65
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 1
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
- ; W32-NEXT: $m0 = S_MOV_B32 1
- ; W32-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 65
- ; W32-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 3
- ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: multiple_blocks
- ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr112
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr113
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr114
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr115
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr116
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr117
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr118
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr119
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr128
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr129
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr130
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr131
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr132
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr133
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr134
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr135
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr240
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr241
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr242
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr243
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr244
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr245
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr246
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr247
- ; W64-NEXT: $m0 = S_MOV_B32 3
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 65
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 1
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
- ; W64-NEXT: $m0 = S_MOV_B32 1
- ; W64-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 65
- ; W64-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 3
- ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: multiple_blocks
+ ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 3
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 65
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 1
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
+ ; CHECK-NEXT: $m0 = S_MOV_B32 1
+ ; CHECK-NEXT: $vgpr232_vgpr233_vgpr234_vgpr235_vgpr236_vgpr237_vgpr238_vgpr239_vgpr240_vgpr241_vgpr242_vgpr243_vgpr244_vgpr245_vgpr246_vgpr247_vgpr248_vgpr249_vgpr250_vgpr251_vgpr252_vgpr253_vgpr254_vgpr255_vgpr256_vgpr257_vgpr258_vgpr259_vgpr260_vgpr261_vgpr262_vgpr263 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr233, implicit $vgpr234, implicit $vgpr235, implicit $vgpr236, implicit $vgpr237, implicit $vgpr238, implicit $vgpr239, implicit $vgpr248, implicit $vgpr249, implicit $vgpr250, implicit $vgpr251, implicit $vgpr252, implicit $vgpr253, implicit $vgpr254, implicit $vgpr255 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 65
+ ; CHECK-NEXT: $vgpr104_vgpr105_vgpr106_vgpr107_vgpr108_vgpr109_vgpr110_vgpr111_vgpr112_vgpr113_vgpr114_vgpr115_vgpr116_vgpr117_vgpr118_vgpr119_vgpr120_vgpr121_vgpr122_vgpr123_vgpr124_vgpr125_vgpr126_vgpr127_vgpr128_vgpr129_vgpr130_vgpr131_vgpr132_vgpr133_vgpr134_vgpr135 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 4, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr105, implicit $vgpr106, implicit $vgpr107, implicit $vgpr108, implicit $vgpr109, implicit $vgpr111, implicit $vgpr120, implicit $vgpr121, implicit $vgpr122, implicit $vgpr123, implicit $vgpr124, implicit $vgpr125, implicit $vgpr126, implicit $vgpr127 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 3
+ ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 32, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40, implicit-def $vgpr41, implicit-def $vgpr104, implicit-def $vgpr110, implicit-def $vgpr232
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -303,101 +111,19 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; W32-LABEL: name: reg_tuples
- ; W32: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
- ; W32-NEXT: $m0 = S_MOV_B32 7
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 3
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
- ; W32-NEXT: $m0 = S_MOV_B32 3
- ; W32-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; W32-NEXT: $m0 = S_MOV_B32 7
- ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: reg_tuples
- ; W64: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr80
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr81
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr82
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr83
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr84
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr85
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr86
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr87
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr96
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr97
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr98
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr99
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr100
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr101
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr102
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr103
- ; W64-NEXT: $m0 = S_MOV_B32 7
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 3
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
- ; W64-NEXT: $m0 = S_MOV_B32 3
- ; W64-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
- ; W64-NEXT: $m0 = S_MOV_B32 7
- ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: reg_tuples
+ ; CHECK: liveins: $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 7
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 3
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.1, align 4, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
+ ; CHECK-NEXT: $m0 = S_MOV_B32 3
+ ; CHECK-NEXT: $vgpr72_vgpr73_vgpr74_vgpr75_vgpr76_vgpr77_vgpr78_vgpr79_vgpr80_vgpr81_vgpr82_vgpr83_vgpr84_vgpr85_vgpr86_vgpr87_vgpr88_vgpr89_vgpr90_vgpr91_vgpr92_vgpr93_vgpr94_vgpr95_vgpr96_vgpr97_vgpr98_vgpr99_vgpr100_vgpr101_vgpr102_vgpr103 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr74, implicit $vgpr75, implicit $vgpr76, implicit $vgpr77, implicit $vgpr78, implicit $vgpr79, implicit $vgpr88, implicit $vgpr89, implicit $vgpr90, implicit $vgpr91, implicit $vgpr92, implicit $vgpr93, implicit $vgpr94, implicit $vgpr95 :: (load (s1024) from %stack.1, align 4, addrspace 5)
+ ; CHECK-NEXT: $m0 = S_MOV_B32 7
+ ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 8, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42, implicit-def $vgpr70_vgpr71_vgpr72_vgpr73
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -421,65 +147,17 @@ stack:
body: |
bb.0:
liveins: $sgpr30_sgpr31, $vgpr48
- ; W32-LABEL: name: locals
- ; W32: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: $m0 = S_MOV_B32 1
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; W32-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; W32-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr40
- ; W32-NEXT: $m0 = S_MOV_B32 1
- ; W32-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: locals
- ; W64: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: $m0 = S_MOV_B32 1
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
- ; W64-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
- ; W64-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr40
- ; W64-NEXT: $m0 = S_MOV_B32 1
- ; W64-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: locals
+ ; CHECK: liveins: $vgpr48, $sgpr30_sgpr31, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 1
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.2, align 4, addrspace 5)
+ ; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
+ ; CHECK-NEXT: SCRATCH_STORE_DWORD_SADDR $vgpr48, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr40
+ ; CHECK-NEXT: $m0 = S_MOV_B32 1
+ ; CHECK-NEXT: $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr41, implicit $vgpr42, implicit $vgpr43, implicit $vgpr44, implicit $vgpr45, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63 :: (load (s1024) from %stack.2, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
SCRATCH_STORE_DWORD_SADDR $vgpr48, %stack.0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.0, addrspace 5)
SCRATCH_STORE_DWORD_SADDR $vgpr48, %stack.1, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
S_NOP 0, implicit-def $vgpr40
@@ -506,32 +184,10 @@ body: |
; W32-LABEL: name: other_regs
; W32: liveins: $sgpr48, $sgpr30_sgpr31, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23, $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
; W32-NEXT: $sgpr0 = S_OR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 512
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
- ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 640
; W32-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr44, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
- ; W32-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr44, 768
; W32-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
; W32-NEXT: $m0 = S_MOV_B32 9
; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.4, align 4, addrspace 5)
@@ -551,32 +207,10 @@ body: |
; W64-LABEL: name: other_regs
; W64: liveins: $sgpr48, $sgpr30_sgpr31, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, $vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23, $vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $vgpr32_vgpr33_vgpr34_vgpr35_vgpr36_vgpr37_vgpr38_vgpr39_vgpr40, $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71
; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr22
; W64-NEXT: $sgpr0_sgpr1 = S_OR_SAVEEXEC_B64 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr41, $sgpr32, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.1, addrspace 5)
- ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr41, 1024
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr42, $sgpr32, 20, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.2, addrspace 5)
- ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr42, 1280
; W64-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr44, $sgpr32, 24, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.3, addrspace 5)
- ; W64-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr44, 1536
; W64-NEXT: $exec = S_MOV_B64 killed $sgpr0_sgpr1
; W64-NEXT: $m0 = S_MOV_B32 9
; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.4, align 4, addrspace 5)
@@ -608,27 +242,11 @@ machineFunctionInfo:
body: |
bb.0:
liveins: $sgpr30_sgpr31
- ; W32-LABEL: name: entry_func
- ; W32: liveins: $sgpr30_sgpr31
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr42
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr45
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: entry_func
- ; W64: liveins: $sgpr30_sgpr31
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr42
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr45
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: entry_func
+ ; CHECK: liveins: $sgpr30_sgpr31
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45, implicit-def $vgpr51
S_SETPC_B64_return $sgpr30_sgpr31
...
@@ -639,89 +257,29 @@ tracksRegLiveness: true
machineFunctionInfo:
stackPtrOffsetReg: $sgpr32
body: |
- ; W32-LABEL: name: multiple_basic_blocks
- ; W32: bb.0:
- ; W32-NEXT: successors: %bb.1(0x80000000)
- ; W32-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; W32-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W32-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W32-NEXT: $m0 = S_MOV_B32 11
- ; W32-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; W32-NEXT: S_BRANCH %bb.1
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: bb.1:
- ; W32-NEXT: successors: %bb.2(0x80000000)
- ; W32-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
- ; W32-NEXT: S_BRANCH %bb.2
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: bb.2:
- ; W32-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W32-NEXT: {{ $}}
- ; W32-NEXT: $m0 = S_MOV_B32 11
- ; W32-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W32-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
- ;
- ; W64-LABEL: name: multiple_basic_blocks
- ; W64: bb.0:
- ; W64-NEXT: successors: %bb.1(0x80000000)
- ; W64-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
- ; W64-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr48
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr49
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr50
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr51
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr52
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr53
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr54
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr55
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr64
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr65
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr66
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr67
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr68
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr69
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr70
- ; W64-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr71
- ; W64-NEXT: $m0 = S_MOV_B32 11
- ; W64-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
- ; W64-NEXT: S_BRANCH %bb.1
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: bb.1:
- ; W64-NEXT: successors: %bb.2(0x80000000)
- ; W64-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
- ; W64-NEXT: S_BRANCH %bb.2
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: bb.2:
- ; W64-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
- ; W64-NEXT: {{ $}}
- ; W64-NEXT: $m0 = S_MOV_B32 11
- ; W64-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
- ; W64-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
+ ; CHECK-LABEL: name: multiple_basic_blocks
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.1(0x80000000)
+ ; CHECK-NEXT: liveins: $vgpr44, $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 11
+ ; CHECK-NEXT: SCRATCH_STORE_BLOCK_SADDR $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0 :: (store (s1024) into %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
+ ; CHECK-NEXT: S_BRANCH %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.2(0x80000000)
+ ; CHECK-NEXT: liveins: $vgpr44, $sgpr30_sgpr31
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: S_NOP 0, implicit-def $vgpr43, implicit $vgpr44
+ ; CHECK-NEXT: S_BRANCH %bb.2
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: liveins: $sgpr30_sgpr31, $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $m0 = S_MOV_B32 11
+ ; CHECK-NEXT: $vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47_vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55_vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63_vgpr64_vgpr65_vgpr66_vgpr67_vgpr68_vgpr69_vgpr70_vgpr71_vgpr72_vgpr73 = SCRATCH_LOAD_BLOCK_SADDR $sgpr32, 0, 0, implicit $exec, implicit $flat_scr, implicit $m0, implicit $vgpr44, implicit $vgpr46, implicit $vgpr47, implicit $vgpr56, implicit $vgpr57, implicit $vgpr58, implicit $vgpr59, implicit $vgpr60, implicit $vgpr61, implicit $vgpr62, implicit $vgpr63, implicit $vgpr72, implicit $vgpr73 :: (load (s1024) from %stack.0, align 4, addrspace 5)
+ ; CHECK-NEXT: S_SETPC_B64_return $sgpr30_sgpr31
bb.0:
liveins: $sgpr30_sgpr31, $vgpr44
S_NOP 0, implicit-def $vgpr42, implicit-def $vgpr45
diff --git a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
index fb3042e678ee5..1521ad5219174 100644
--- a/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
+++ b/llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
@@ -17,9 +17,6 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
; GFX906-NEXT: s_mov_b64 exec, -1
; GFX906-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill
; GFX906-NEXT: s_mov_b64 exec, s[18:19]
-; GFX906-NEXT: v_writelane_b32 v41, s16, 4
-; GFX906-NEXT: v_writelane_b32 v41, s34, 2
-; GFX906-NEXT: v_writelane_b32 v41, s35, 3
; GFX906-NEXT: s_mov_b32 s21, s15
; GFX906-NEXT: ; implicit-def: $vgpr39 : SGPR spill to VGPR lane
; GFX906-NEXT: s_mov_b32 s22, s14
@@ -33,8 +30,11 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
; GFX906-NEXT: v_writelane_b32 v39, s26, 4
; GFX906-NEXT: v_writelane_b32 v39, s27, 5
; GFX906-NEXT: v_writelane_b32 v39, s8, 6
+; GFX906-NEXT: v_writelane_b32 v41, s16, 4
; GFX906-NEXT: v_writelane_b32 v39, s9, 7
+; GFX906-NEXT: v_writelane_b32 v41, s34, 2
; GFX906-NEXT: v_writelane_b32 v39, s6, 8
+; GFX906-NEXT: v_writelane_b32 v41, s35, 3
; GFX906-NEXT: v_writelane_b32 v39, s7, 9
; GFX906-NEXT: v_writelane_b32 v41, s30, 0
; GFX906-NEXT: v_writelane_b32 v39, s4, 10
@@ -843,5 +843,5 @@ define void @preserve_wwm_copy_dstreg(ptr %parg0, ptr %parg1, ptr %parg2) #0 {
declare void @foo()
-attributes #0 = { "amdgpu-num-vgpr"="42" "amdgpu-num-sgpr"="40"}
+attributes #0 = { nounwind "amdgpu-num-vgpr"="42" "amdgpu-num-sgpr"="40"}
diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
index 9e61fa0e681cc..925984b15367d 100644
--- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
@@ -30,65 +30,15 @@ body: |
; GCN-NEXT: successors: %bb.1(0x80000000)
; GCN-NEXT: liveins: $vcc_hi, $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $sgpr102, $sgpr103, $vgpr0
; GCN-NEXT: {{ $}}
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr1
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr2
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr3
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr32
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr34
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr35
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr36
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr37
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr38
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr39
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr40
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr41
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr42
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr43
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr44
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr45
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr46
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr47
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr48
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr49
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr50
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr51
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr52
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr53
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr54
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr55
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr56
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr57
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr58
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr59
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr60
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr61
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr62
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $sgpr63
; GCN-NEXT: $vcc_hi = frame-setup COPY $sgpr33
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION register $sgpr33, <badreg>
; GCN-NEXT: $sgpr33 = frame-setup COPY $sgpr32
; GCN-NEXT: $sgpr0 = S_XOR_SAVEEXEC_B32 -1, implicit-def $exec, implicit-def dead $scc, implicit $exec
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr1, $sgpr33, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.69, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr1, 0
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr2, $sgpr33, 4, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.70, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr2, 128
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr3, $sgpr33, 8, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.71, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr3, 256
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr4, $sgpr33, 12, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.72, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr4, 384
; GCN-NEXT: SCRATCH_STORE_DWORD_SADDR killed $vgpr5, $sgpr33, 16, 0, implicit $exec, implicit $flat_scr :: (store (s32) into %stack.73, addrspace 5)
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION offset $vgpr5, 512
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
- ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x41, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
; GCN-NEXT: $sgpr32 = frame-setup S_ADD_I32 $sgpr32, 24, implicit-def dead $scc
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr4, 0, $vgpr2
; GCN-NEXT: $vgpr2 = SI_SPILL_S32_TO_VGPR $sgpr5, 1, $vgpr2
@@ -256,7 +206,6 @@ body: |
; GCN-NEXT: $vgpr4 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 12, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.72, addrspace 5)
; GCN-NEXT: $vgpr5 = SCRATCH_LOAD_DWORD_SADDR $sgpr33, 16, 0, implicit $exec, implicit $flat_scr :: (load (s32) from %stack.73, addrspace 5)
; GCN-NEXT: $exec_lo = S_MOV_B32 killed $sgpr0
- ; GCN-NEXT: frame-destroy CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
; GCN-NEXT: $sgpr33 = frame-destroy COPY $vcc_hi
; GCN-NEXT: S_ENDPGM 0
bb.0:
diff --git a/llvm/test/CodeGen/AMDGPU/sibling-call.ll b/llvm/test/CodeGen/AMDGPU/sibling-call.ll
index 3c3a2f11fc96a..00214ef36e1f0 100644
--- a/llvm/test/CodeGen/AMDGPU/sibling-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/sibling-call.ll
@@ -231,8 +231,8 @@ define fastcc i32 @sibling_call_i32_fastcc_i32_byval_i32_byval_parent(i32 %a, pt
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: buffer_load_dword v1, off, s[0:3], s33
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: s_getpc_b64 s[4:5]
@@ -382,8 +382,8 @@ define fastcc i32 @no_sibling_call_callee_more_stack_space(i32 %a, i32 %b) #1 {
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v40, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, i32_fastcc_i32_i32_a32i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, i32_fastcc_i32_i32_a32i32 at gotpcrel32@hi+12
@@ -450,8 +450,8 @@ define fastcc i32 @sibling_call_i32_fastcc_i32_i32_other_call(i32 %a, i32 %b, i3
; GCN-NEXT: s_or_saveexec_b64 s[6:7], -1
; GCN-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[6:7]
-; GCN-NEXT: v_writelane_b32 v42, s4, 2
; GCN-NEXT: s_addk_i32 s32, 0x400
+; GCN-NEXT: v_writelane_b32 v42, s4, 2
; GCN-NEXT: s_getpc_b64 s[4:5]
; GCN-NEXT: s_add_u32 s4, s4, i32_fastcc_i32_i32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s5, s5, i32_fastcc_i32_i32 at gotpcrel32@hi+12
diff --git a/llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir b/llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
index bb87b6e52da89..cd9a4d07b870d 100644
--- a/llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill-restore-partial-copy.mir
@@ -30,6 +30,66 @@ body: |
; GFX950-LABEL: name: full_copy
; GFX950: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27, $agpr28, $agpr29
; GFX950-NEXT: {{ $}}
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
; GFX950-NEXT: renamable $agpr0_agpr1 = IMPLICIT_DEF
; GFX950-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
; GFX950-NEXT: renamable $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27 = IMPLICIT_DEF
@@ -136,6 +196,66 @@ body: |
; GFX950-LABEL: name: partial_copy
; GFX950: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25, $agpr26, $agpr27
; GFX950-NEXT: {{ $}}
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; GFX950-NEXT: renamable $agpr0_agpr1 = IMPLICIT_DEF
; GFX950-NEXT: renamable $agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
; GFX950-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF
@@ -241,6 +361,68 @@ body: |
; GFX950-LABEL: name: full_spill
; GFX950: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $agpr10, $agpr11, $agpr12, $agpr13, $agpr14, $agpr15, $agpr16, $agpr17, $agpr18, $agpr19, $agpr20, $agpr21, $agpr22, $agpr23, $agpr24, $agpr25
; GFX950-NEXT: {{ $}}
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr26
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr27
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr30
+ ; GFX950-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr31
; GFX950-NEXT: renamable $agpr0_agpr1 = IMPLICIT_DEF
; GFX950-NEXT: renamable $agpr26_agpr27 = IMPLICIT_DEF
; GFX950-NEXT: renamable $agpr28_agpr29_agpr30_agpr31 = IMPLICIT_DEF
diff --git a/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir b/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
index 9da556326326f..d87bc0a2c9306 100644
--- a/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
+++ b/llvm/test/CodeGen/AMDGPU/spill_kill_v16.mir
@@ -40,6 +40,9 @@ body: |
; SRAMECC-EXPANDED: bb.0:
; SRAMECC-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; SRAMECC-EXPANDED-NEXT: {{ $}}
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; SRAMECC-EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
@@ -112,6 +115,9 @@ body: |
; SRAMECC-EXPANDED: bb.0:
; SRAMECC-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; SRAMECC-EXPANDED-NEXT: {{ $}}
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; SRAMECC-EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
@@ -184,6 +190,9 @@ body: |
; SRAMECC-EXPANDED: bb.0:
; SRAMECC-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; SRAMECC-EXPANDED-NEXT: {{ $}}
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; SRAMECC-EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 4, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, align 4, addrspace 5)
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit renamable $vgpr0_lo16
diff --git a/llvm/test/CodeGen/AMDGPU/spillv16.mir b/llvm/test/CodeGen/AMDGPU/spillv16.mir
index 5f1c3b4679b72..ce8645599094c 100644
--- a/llvm/test/CodeGen/AMDGPU/spillv16.mir
+++ b/llvm/test/CodeGen/AMDGPU/spillv16.mir
@@ -55,6 +55,9 @@ body: |
; SRAMECC-EXPANDED: bb.0:
; SRAMECC-EXPANDED-NEXT: successors: %bb.1(0x80000000)
; SRAMECC-EXPANDED-NEXT: {{ $}}
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x35, 0x24, 0x36, 0xe9, 0x02
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
+ ; SRAMECC-EXPANDED-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
; SRAMECC-EXPANDED-NEXT: S_NOP 0, implicit-def renamable $vgpr0_lo16, implicit-def renamable $vgpr0_hi16
; SRAMECC-EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_hi16, $sgpr32, 2, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.1, addrspace 5)
; SRAMECC-EXPANDED-NEXT: SCRATCH_STORE_SHORT_SADDR_t16 killed $vgpr0_lo16, $sgpr32, 0, 0, implicit $exec, implicit $flat_scr :: (store (s16) into %stack.0, addrspace 5)
diff --git a/llvm/test/CodeGen/AMDGPU/stack-realign.ll b/llvm/test/CodeGen/AMDGPU/stack-realign.ll
index cf827945fb5f7..52d9a30ffb8ba 100644
--- a/llvm/test/CodeGen/AMDGPU/stack-realign.ll
+++ b/llvm/test/CodeGen/AMDGPU/stack-realign.ll
@@ -45,8 +45,6 @@ define void @needs_align16_stack_align4(i32 %idx) #2 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0x3c0
; GCN-NEXT: s_and_b32 s33, s33, 0xfffffc00
-; GCN-NEXT: s_mov_b32 s5, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GCN-NEXT: v_lshrrev_b32_e64 v2, 6, s33
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v2
@@ -59,6 +57,8 @@ define void @needs_align16_stack_align4(i32 %idx) #2 {
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_or_b32_e32 v1, 8, v0
; GCN-NEXT: v_mov_b32_e32 v2, 3
+; GCN-NEXT: s_mov_b32 s5, s34
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_addk_i32 s32, 0x2800
; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0)
@@ -84,8 +84,6 @@ define void @needs_align32(i32 %idx) #0 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0x7c0
; GCN-NEXT: s_and_b32 s33, s33, 0xfffff800
-; GCN-NEXT: s_mov_b32 s5, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GCN-NEXT: v_lshrrev_b32_e64 v2, 6, s33
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v2
@@ -98,6 +96,8 @@ define void @needs_align32(i32 %idx) #0 {
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_or_b32_e32 v1, 8, v0
; GCN-NEXT: v_mov_b32_e32 v2, 3
+; GCN-NEXT: s_mov_b32 s5, s34
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_addk_i32 s32, 0x3000
; GCN-NEXT: buffer_store_dword v2, v1, s[0:3], 0 offen
; GCN-NEXT: s_waitcnt vmcnt(0)
@@ -122,10 +122,10 @@ define void @force_realign4(i32 %idx) #1 {
; GCN-NEXT: s_mov_b32 s4, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xc0
; GCN-NEXT: s_and_b32 s33, s33, 0xffffff00
-; GCN-NEXT: s_mov_b32 s5, s34
-; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GCN-NEXT: v_lshrrev_b32_e64 v1, 6, s33
+; GCN-NEXT: s_mov_b32 s5, s34
+; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: s_addk_i32 s32, 0xd00
; GCN-NEXT: v_add_u32_e32 v0, vcc, v0, v1
; GCN-NEXT: v_mov_b32_e32 v1, 3
@@ -174,7 +174,7 @@ define amdgpu_kernel void @kernel_call_align16_from_8() #0 {
}
; The call sequence should keep the stack on call aligned to 4
-define amdgpu_kernel void @kernel_call_align16_from_5() {
+define amdgpu_kernel void @kernel_call_align16_from_5() #6 {
; GCN-LABEL: kernel_call_align16_from_5:
; GCN: ; %bb.0:
; GCN-NEXT: s_add_i32 s12, s12, s17
@@ -207,7 +207,7 @@ define amdgpu_kernel void @kernel_call_align16_from_5() {
ret void
}
-define amdgpu_kernel void @kernel_call_align4_from_5() {
+define amdgpu_kernel void @kernel_call_align4_from_5() #6 {
; GCN-LABEL: kernel_call_align4_from_5:
; GCN: ; %bb.0:
; GCN-NEXT: s_add_i32 s12, s12, s17
@@ -291,9 +291,9 @@ define void @func_call_align1024_bp_gets_vgpr_spill(<32 x i32> %a, i32 %b) #0 {
; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:1028 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b64 exec, s[18:19]
; GCN-NEXT: v_writelane_b32 v40, s16, 2
+; GCN-NEXT: v_mov_b32_e32 v32, 0
; GCN-NEXT: v_writelane_b32 v40, s34, 3
; GCN-NEXT: s_mov_b32 s34, s32
-; GCN-NEXT: v_mov_b32_e32 v32, 0
; GCN-NEXT: buffer_store_dword v32, off, s[0:3], s33 offset:1024
; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: buffer_load_dword v32, off, s[0:3], s34
@@ -342,8 +342,8 @@ define i32 @needs_align1024_stack_args_used_inside_loop(ptr addrspace(5) nocaptu
; GCN-NEXT: s_mov_b32 s11, s33
; GCN-NEXT: s_add_i32 s33, s32, 0xffc0
; GCN-NEXT: s_mov_b32 s14, s34
-; GCN-NEXT: s_and_b32 s33, s33, 0xffff0000
; GCN-NEXT: s_mov_b32 s34, s32
+; GCN-NEXT: s_and_b32 s33, s33, 0xffff0000
; GCN-NEXT: v_lshrrev_b32_e64 v1, 6, s34
; GCN-NEXT: v_mov_b32_e32 v0, 0
; GCN-NEXT: s_mov_b32 s10, 0
@@ -412,12 +412,12 @@ define void @no_free_scratch_sgpr_for_bp_copy(<32 x i32> %a, i32 %b) #0 {
; GCN-LABEL: no_free_scratch_sgpr_for_bp_copy:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GCN-NEXT: s_mov_b32 s40, s33
-; GCN-NEXT: s_add_i32 s33, s32, 0x1fc0
-; GCN-NEXT: s_and_b32 s33, s33, 0xffffe000
; GCN-NEXT: s_mov_b32 s41, s34
; GCN-NEXT: s_mov_b32 s34, s32
; GCN-NEXT: buffer_load_dword v0, off, s[0:3], s34 offset:4
+; GCN-NEXT: s_mov_b32 s40, s33
+; GCN-NEXT: s_add_i32 s33, s32, 0x1fc0
+; GCN-NEXT: s_and_b32 s33, s33, 0xffffe000
; GCN-NEXT: s_addk_i32 s32, 0x6000
; GCN-NEXT: s_mov_b32 s32, s34
; GCN-NEXT: s_mov_b32 s34, s41
@@ -691,3 +691,4 @@ attributes #2 = { noinline nounwind alignstack=4 }
attributes #3 = { noinline nounwind "no-realign-stack" }
attributes #4 = { noinline nounwind "frame-pointer"="all"}
attributes #5 = { noinline nounwind "amdgpu-waves-per-eu"="6,6" }
+attributes #6 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll b/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
index 6be2c490e3ea8..5c83491e7289e 100644
--- a/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
+++ b/llvm/test/CodeGen/AMDGPU/strictfp_f16_abi_promote.ll
@@ -184,8 +184,8 @@ define void @outgoing_f16_arg(ptr %ptr) #0 {
; GFX7-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[18:19]
-; GFX7-NEXT: v_writelane_b32 v40, s16, 2
; GFX7-NEXT: flat_load_ushort v0, v[0:1]
+; GFX7-NEXT: v_writelane_b32 v40, s16, 2
; GFX7-NEXT: v_writelane_b32 v40, s30, 0
; GFX7-NEXT: s_mov_b32 s17, f16_user at abs32@hi
; GFX7-NEXT: s_mov_b32 s16, f16_user at abs32@lo
@@ -218,8 +218,8 @@ define void @outgoing_v2f16_arg(ptr %ptr) #0 {
; GFX7-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX7-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX7-NEXT: s_mov_b64 exec, s[18:19]
-; GFX7-NEXT: v_writelane_b32 v40, s16, 2
; GFX7-NEXT: flat_load_dword v1, v[0:1]
+; GFX7-NEXT: v_writelane_b32 v40, s16, 2
; GFX7-NEXT: v_writelane_b32 v40, s30, 0
; GFX7-NEXT: s_mov_b32 s17, v2f16_user at abs32@hi
; GFX7-NEXT: s_mov_b32 s16, v2f16_user at abs32@lo
@@ -555,4 +555,4 @@ declare <2 x half> @llvm.experimental.constrained.fptrunc.v2f16.v2f32(<2 x float
declare <3 x half> @llvm.experimental.constrained.fptrunc.v3f16.v3f32(<3 x float>, metadata, metadata) #0
declare <4 x half> @llvm.experimental.constrained.fptrunc.v4f16.v4f32(<4 x float>, metadata, metadata) #0
-attributes #0 = { strictfp }
+attributes #0 = { strictfp nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
index eecc9f22db415..5c6fcd4f977e3 100644
--- a/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
+++ b/llvm/test/CodeGen/AMDGPU/swdev504645-global-fold.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck %s
-define void @test_load_zext() {
+define void @test_load_zext() #0 {
; CHECK-LABEL: test_load_zext:
; CHECK: ; %bb.0: ; %.entry
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -10,8 +10,8 @@ define void @test_load_zext() {
; CHECK-NEXT: s_or_saveexec_b64 s[2:3], -1
; CHECK-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
; CHECK-NEXT: s_mov_b64 exec, s[2:3]
-; CHECK-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-NEXT: s_add_i32 s32, s32, 16
+; CHECK-NEXT: v_writelane_b32 v40, s0, 2
; CHECK-NEXT: s_getpc_b64 s[0:1]
; CHECK-NEXT: s_add_u32 s0, s0, has_spgr_args at gotpcrel32@lo+4
; CHECK-NEXT: s_addc_u32 s1, s1, has_spgr_args at gotpcrel32@hi+12
@@ -41,4 +41,6 @@ declare void @has_spgr_args(i32 inreg)
declare i32 @llvm.amdgcn.reloc.constant(metadata) #0
+attributes #0 = { nounwind }
+
!0 = !{!"DescriptorBuffer", i32 4, i32 8, i32 0, i32 0}
diff --git a/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll b/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
index 153ea2957dd75..d76b2e5f2358d 100644
--- a/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
+++ b/llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
@@ -8,7 +8,7 @@ declare hidden void @void_func_i32_inreg(i32 inreg)
; ERR: error: <unknown>:0:0: in function tail_call_i32_inreg_divergent void (i32): illegal VGPR to SGPR copy
; ERR: error: <unknown>:0:0: in function indirect_tail_call_i32_inreg_divergent void (i32): illegal VGPR to SGPR copy
-define void @tail_call_i32_inreg_divergent(i32 %vgpr) {
+define void @tail_call_i32_inreg_divergent(i32 %vgpr) #0 {
; CHECK-LABEL: tail_call_i32_inreg_divergent:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -42,7 +42,7 @@ define void @tail_call_i32_inreg_divergent(i32 %vgpr) {
@constant = external hidden addrspace(4) constant ptr
-define void @indirect_tail_call_i32_inreg_divergent(i32 %vgpr) {
+define void @indirect_tail_call_i32_inreg_divergent(i32 %vgpr) #0 {
; CHECK-LABEL: indirect_tail_call_i32_inreg_divergent:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -51,8 +51,8 @@ define void @indirect_tail_call_i32_inreg_divergent(i32 %vgpr) {
; CHECK-NEXT: s_or_saveexec_b64 s[18:19], -1
; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; CHECK-NEXT: s_mov_b64 exec, s[18:19]
-; CHECK-NEXT: v_writelane_b32 v40, s16, 2
; CHECK-NEXT: s_addk_i32 s32, 0x400
+; CHECK-NEXT: v_writelane_b32 v40, s16, 2
; CHECK-NEXT: s_getpc_b64 s[16:17]
; CHECK-NEXT: s_add_u32 s16, s16, constant at rel32@lo+4
; CHECK-NEXT: s_addc_u32 s17, s17, constant at rel32@hi+12
@@ -76,3 +76,5 @@ define void @indirect_tail_call_i32_inreg_divergent(i32 %vgpr) {
tail call void %fptr(i32 inreg %vgpr)
ret void
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll b/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
index 4e842f74689f3..e9e61f5c49a7a 100644
--- a/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
+++ b/llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
@@ -4,7 +4,7 @@
declare void @wobble()
-define internal fastcc void @widget() {
+define internal fastcc void @widget() #0 {
; GFX90A-LABEL: widget:
; GFX90A: ; %bb.0: ; %bb
; GFX90A-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -13,8 +13,8 @@ define internal fastcc void @widget() {
; GFX90A-NEXT: s_or_saveexec_b64 s[18:19], -1
; GFX90A-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX90A-NEXT: s_mov_b64 exec, s[18:19]
-; GFX90A-NEXT: v_writelane_b32 v40, s16, 2
; GFX90A-NEXT: s_addk_i32 s32, 0x400
+; GFX90A-NEXT: v_writelane_b32 v40, s16, 2
; GFX90A-NEXT: s_getpc_b64 s[16:17]
; GFX90A-NEXT: s_add_u32 s16, s16, wobble at gotpcrel32@lo+4
; GFX90A-NEXT: s_addc_u32 s17, s17, wobble at gotpcrel32@hi+12
@@ -28,7 +28,7 @@ bb:
unreachable
}
-define amdgpu_kernel void @kernel(ptr addrspace(1) %arg1.global, i1 %tmp3.i.i, i32 %tmp5.i.i, i32 %tmp427.i, i1 %tmp438.i, double %tmp27.i, i1 %tmp48.i) {
+define amdgpu_kernel void @kernel(ptr addrspace(1) %arg1.global, i1 %tmp3.i.i, i32 %tmp5.i.i, i32 %tmp427.i, i1 %tmp438.i, double %tmp27.i, i1 %tmp48.i) #0 {
; GLOBALNESS1-LABEL: kernel:
; GLOBALNESS1: ; %bb.0: ; %bb
; GLOBALNESS1-NEXT: s_mov_b64 s[36:37], s[6:7]
@@ -761,3 +761,4 @@ bb73.i: ; preds = %bb70.i
br label %bb5.backedge
}
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll b/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
index f137f429ebe26..e78d62561238b 100644
--- a/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
+++ b/llvm/test/CodeGen/AMDGPU/unfold-masked-merge-scalar-variablemask.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 < %s | FileCheck --check-prefix=GCN %s
-define i32 @s_out32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out32:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -19,7 +19,7 @@ define i32 @s_out32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
ret i32 %r
}
-define i64 @s_out64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) {
+define i64 @s_out64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) #0 {
; GCN-LABEL: s_out64:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -37,7 +37,7 @@ define i64 @s_out64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) {
ret i64 %r
}
-define i32 @s_in32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in32:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -54,7 +54,7 @@ define i32 @s_in32(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
ret i32 %r
}
-define i64 @s_in64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) {
+define i64 @s_in64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) #0 {
; GCN-LABEL: s_in64:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -73,7 +73,7 @@ define i64 @s_in64(i64 inreg %x, i64 inreg %y, i64 inreg %mask) {
; ============================================================================ ;
; Commutativity tests.
; ============================================================================ ;
-define i32 @s_in_commutativity_0_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_0_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_0_0_1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -90,7 +90,7 @@ define i32 @s_in_commutativity_0_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_commutativity_0_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_0_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_0_1_0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -107,7 +107,7 @@ define i32 @s_in_commutativity_0_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @in_commutativity_0_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @in_commutativity_0_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: in_commutativity_0_1_1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -124,7 +124,7 @@ define i32 @in_commutativity_0_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask)
ret i32 %r
}
-define i32 @s_in_commutativity_1_0_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_1_0_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_1_0_0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -141,7 +141,7 @@ define i32 @s_in_commutativity_1_0_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_commutativity_1_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_1_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_1_0_1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -158,7 +158,7 @@ define i32 @s_in_commutativity_1_0_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_commutativity_1_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_1_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_1_1_0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -175,7 +175,7 @@ define i32 @s_in_commutativity_1_1_0(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_commutativity_1_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_commutativity_1_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_commutativity_1_1_1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -194,7 +194,7 @@ define i32 @s_in_commutativity_1_1_1(i32 inreg %x, i32 inreg %y, i32 inreg %mask
; ============================================================================ ;
; Y is an 'and' too.
; ============================================================================ ;
-define i32 @s_in_complex_y0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %mask) {
+define i32 @s_in_complex_y0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_complex_y0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -213,7 +213,7 @@ define i32 @s_in_complex_y0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32
ret i32 %r
}
-define i32 @s_in_complex_y1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %mask) {
+define i32 @s_in_complex_y1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_complex_y1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -234,7 +234,7 @@ define i32 @s_in_complex_y1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32
; ============================================================================ ;
; M is an 'xor' too.
; ============================================================================ ;
-define i32 @s_in_complex_m0(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_m0(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_m0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -253,7 +253,7 @@ define i32 @s_in_complex_m0(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inre
ret i32 %r
}
-define i32 @s_in_complex_m1(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_m1(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_m1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -274,7 +274,7 @@ define i32 @s_in_complex_m1(i32 inreg %x, i32 inreg %y, i32 inreg %m_a, i32 inre
; ============================================================================ ;
; Both Y and M are complex.
; ============================================================================ ;
-define i32 @s_in_complex_y0_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_y0_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_y0_m0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -295,7 +295,7 @@ define i32 @s_in_complex_y0_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low,
ret i32 %r
}
-define i32 @s_in_complex_y1_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_y1_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_y1_m0:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -316,7 +316,7 @@ define i32 @s_in_complex_y1_m0(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low,
ret i32 %r
}
-define i32 @s_in_complex_y0_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_y0_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_y0_m1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -337,7 +337,7 @@ define i32 @s_in_complex_y0_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low,
ret i32 %r
}
-define i32 @s_in_complex_y1_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) {
+define i32 @s_in_complex_y1_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low, i32 inreg %m_a, i32 inreg %m_b) #0 {
; GCN-LABEL: s_in_complex_y1_m1:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -360,7 +360,7 @@ define i32 @s_in_complex_y1_m1(i32 inreg %x, i32 inreg %y_hi, i32 inreg %y_low,
; ============================================================================ ;
; Various cases with %x and/or %y being a constant
; ============================================================================ ;
-define i32 @s_out_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_varx_mone:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -376,7 +376,7 @@ define i32 @s_out_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_varx_mone:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -392,7 +392,7 @@ define i32 @s_in_constant_varx_mone(i32 inreg %x, i32 inreg %y, i32 inreg %mask)
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_out_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_varx_mone_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -408,7 +408,7 @@ define i32 @s_out_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inr
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_in_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_varx_mone_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -425,7 +425,7 @@ define i32 @s_in_constant_varx_mone_invmask(i32 inreg %x, i32 inreg %y, i32 inre
ret i32 %r
}
-define i32 @s_out_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_varx_42:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -443,7 +443,7 @@ define i32 @s_out_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask)
ret i32 %r
}
-define i32 @in_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @in_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: in_constant_varx_42:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -461,7 +461,7 @@ define i32 @in_constant_varx_42(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_out_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_varx_42_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -480,7 +480,7 @@ define i32 @s_out_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_in_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_varx_42_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -498,7 +498,7 @@ define i32 @s_in_constant_varx_42_invmask(i32 inreg %x, i32 inreg %y, i32 inreg
ret i32 %r
}
-define i32 @s_out_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_mone_vary:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -513,7 +513,7 @@ define i32 @s_out_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask
ret i32 %r
}
-define i32 @s_in_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_mone_vary:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -528,7 +528,7 @@ define i32 @s_in_constant_mone_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask)
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_out_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_mone_vary_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -545,7 +545,7 @@ define i32 @s_out_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inr
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_in_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_mone_vary_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -560,7 +560,7 @@ define i32 @s_in_constant_mone_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inre
ret i32 %r
}
-define i32 @s_out_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_42_vary:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -578,7 +578,7 @@ define i32 @s_out_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask)
ret i32 %r
}
-define i32 @s_in_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_42_vary:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -596,7 +596,7 @@ define i32 @s_in_constant_42_vary(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_out_constant_42_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_out_constant_42_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_out_constant_42_vary_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -615,7 +615,7 @@ define i32 @s_out_constant_42_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg
}
; This is not a canonical form. Testing for completeness only.
-define i32 @s_in_constant_42_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_in_constant_42_vary_invmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_in_constant_42_vary_invmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -648,12 +648,12 @@ define i32 @s_in_multiuse_A(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg
; GCN-NEXT: s_mov_b32 exec_lo, s16
; GCN-NEXT: v_writelane_b32 v40, s2, 4
; GCN-NEXT: s_add_i32 s32, s32, 16
-; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, use32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, use32 at gotpcrel32@hi+12
; GCN-NEXT: s_xor_b32 s0, s0, s1
; GCN-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
+; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: v_writelane_b32 v40, s31, 1
; GCN-NEXT: v_writelane_b32 v40, s34, 2
; GCN-NEXT: s_mov_b32 s34, s1
@@ -693,16 +693,16 @@ define i32 @s_in_multiuse_B(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg
; GCN-NEXT: s_or_saveexec_b32 s16, -1
; GCN-NEXT: scratch_store_b32 off, v40, s33 ; 4-byte Folded Spill
; GCN-NEXT: s_mov_b32 exec_lo, s16
-; GCN-NEXT: v_writelane_b32 v40, s2, 4
; GCN-NEXT: s_add_i32 s32, s32, 16
; GCN-NEXT: s_getpc_b64 s[16:17]
; GCN-NEXT: s_add_u32 s16, s16, use32 at gotpcrel32@lo+4
; GCN-NEXT: s_addc_u32 s17, s17, use32 at gotpcrel32@hi+12
-; GCN-NEXT: v_writelane_b32 v40, s30, 0
+; GCN-NEXT: v_writelane_b32 v40, s2, 4
; GCN-NEXT: s_load_b64 s[16:17], s[16:17], 0x0
; GCN-NEXT: s_xor_b32 s0, s0, s1
; GCN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
; GCN-NEXT: v_mov_b32_e32 v0, s0
+; GCN-NEXT: v_writelane_b32 v40, s30, 0
; GCN-NEXT: v_writelane_b32 v40, s31, 1
; GCN-NEXT: v_writelane_b32 v40, s34, 2
; GCN-NEXT: s_mov_b32 s34, s1
@@ -732,7 +732,7 @@ define i32 @s_in_multiuse_B(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg
}
; Various bad variants
-define i32 @s_n0_badmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask, i32 inreg %mask2) {
+define i32 @s_n0_badmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask, i32 inreg %mask2) #0 {
; GCN-LABEL: s_n0_badmask:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -749,7 +749,7 @@ define i32 @s_n0_badmask(i32 inreg %x, i32 inreg %y, i32 inreg %mask, i32 inreg
ret i32 %r
}
-define i32 @s_n0_badxor(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
+define i32 @s_n0_badxor(i32 inreg %x, i32 inreg %y, i32 inreg %mask) #0 {
; GCN-LABEL: s_n0_badxor:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -767,7 +767,7 @@ define i32 @s_n0_badxor(i32 inreg %x, i32 inreg %y, i32 inreg %mask) {
ret i32 %r
}
-define i32 @s_n1_thirdvar(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg %mask) {
+define i32 @s_n1_thirdvar(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg %mask) #0 {
; GCN-LABEL: s_n1_thirdvar:
; GCN: ; %bb.0:
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -783,3 +783,5 @@ define i32 @s_n1_thirdvar(i32 inreg %x, i32 inreg %y, i32 inreg %z, i32 inreg %m
%r = xor i32 %n1, %z
ret i32 %r
}
+
+attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll b/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
index 5beb2237466a8..9ce8859c410fc 100644
--- a/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
+++ b/llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
@@ -5,7 +5,7 @@
declare void @extern_func() #2
-define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp, float %bias, float %zcompare, float %s, float %t, float %clamp) {
+define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp, float %bias, float %zcompare, float %s, float %t, float %clamp) #3 {
; The vgpr tuple8 operand in image_gather4_c_b_cl instruction needs not be
; preserved across the call and should get 8 scratch registers.
; GFX9-LABEL: non_preserved_vgpr_tuple8:
@@ -16,7 +16,6 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX9-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[6:7]
-; GFX9-NEXT: v_writelane_b32 v44, s4, 2
; GFX9-NEXT: v_mov_b32_e32 v36, v16
; GFX9-NEXT: v_mov_b32_e32 v35, v15
; GFX9-NEXT: v_mov_b32_e32 v34, v14
@@ -36,6 +35,7 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: ;;#ASMEND
; GFX9-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[4:11], s[4:7] dmask:0x1
; GFX9-NEXT: s_addk_i32 s32, 0x800
+; GFX9-NEXT: v_writelane_b32 v44, s4, 2
; GFX9-NEXT: s_getpc_b64 s[4:5]
; GFX9-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
@@ -72,7 +72,6 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s5
-; GFX10-NEXT: v_writelane_b32 v44, s4, 2
; GFX10-NEXT: v_mov_b32_e32 v36, v16
; GFX10-NEXT: v_mov_b32_e32 v35, v15
; GFX10-NEXT: v_mov_b32_e32 v34, v14
@@ -92,12 +91,12 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: ;;#ASMEND
; GFX10-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v44, s4, 2
; GFX10-NEXT: s_getpc_b64 s[4:5]
; GFX10-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX10-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
-; GFX10-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
+; GFX10-NEXT: v_writelane_b32 v44, s30, 0
; GFX10-NEXT: v_writelane_b32 v44, s31, 1
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
@@ -130,7 +129,6 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v44, s33 offset:16 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-NEXT: v_dual_mov_b32 v36, v16 :: v_dual_mov_b32 v35, v15
; GFX11-NEXT: v_dual_mov_b32 v34, v14 :: v_dual_mov_b32 v33, v13
; GFX11-NEXT: v_mov_b32_e32 v32, v12
@@ -149,11 +147,12 @@ define <4 x float> @non_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: ;;#ASMEND
; GFX11-NEXT: image_gather4_c_b_cl v[40:43], v[32:36], s[0:7], s[0:3] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX11-NEXT: s_add_i32 s32, s32, 32
+; GFX11-NEXT: v_writelane_b32 v44, s0, 2
; GFX11-NEXT: s_getpc_b64 s[0:1]
; GFX11-NEXT: s_add_u32 s0, s0, extern_func at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s1, s1, extern_func at gotpcrel32@hi+12
-; GFX11-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-NEXT: v_writelane_b32 v44, s30, 0
; GFX11-NEXT: v_writelane_b32 v44, s31, 1
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
; GFX11-NEXT: s_swappc_b64 s[30:31], s[0:1]
@@ -194,7 +193,7 @@ main_body:
ret <4 x float> %v
}
-define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp, float %bias, float %zcompare, float %s, float %t, float %clamp) {
+define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp, float %bias, float %zcompare, float %s, float %t, float %clamp) #3 {
; The vgpr tuple8 operand in image_gather4_c_b_cl instruction needs to be preserved
; across the call and should get allcoated to 8 CSRs.
; Only the lower 5 sub-registers of the tuple are preserved.
@@ -207,7 +206,6 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: s_or_saveexec_b64 s[6:7], -1
; GFX9-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
; GFX9-NEXT: s_mov_b64 exec, s[6:7]
-; GFX9-NEXT: v_writelane_b32 v45, s4, 2
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX9-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
@@ -220,6 +218,7 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX9-NEXT: v_mov_b32_e32 v40, v12
; GFX9-NEXT: image_gather4_c_b_cl v[0:3], v[40:44], s[4:11], s[4:7] dmask:0x1
; GFX9-NEXT: s_addk_i32 s32, 0x800
+; GFX9-NEXT: v_writelane_b32 v45, s4, 2
; GFX9-NEXT: s_getpc_b64 s[4:5]
; GFX9-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX9-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
@@ -257,7 +256,6 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill
; GFX10-NEXT: s_waitcnt_depctr 0xffe3
; GFX10-NEXT: s_mov_b32 exec_lo, s5
-; GFX10-NEXT: v_writelane_b32 v45, s4, 2
; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
; GFX10-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
@@ -265,18 +263,18 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX10-NEXT: buffer_store_dword v44, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX10-NEXT: image_gather4_c_b_cl v[0:3], v[12:16], s[4:11], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX10-NEXT: s_addk_i32 s32, 0x400
-; GFX10-NEXT: s_waitcnt_depctr 0xffe3
+; GFX10-NEXT: v_writelane_b32 v45, s4, 2
; GFX10-NEXT: s_getpc_b64 s[4:5]
; GFX10-NEXT: s_add_u32 s4, s4, extern_func at gotpcrel32@lo+4
; GFX10-NEXT: s_addc_u32 s5, s5, extern_func at gotpcrel32@hi+12
-; GFX10-NEXT: v_writelane_b32 v45, s30, 0
-; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX10-NEXT: v_mov_b32_e32 v40, v16
+; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
; GFX10-NEXT: v_mov_b32_e32 v41, v15
+; GFX10-NEXT: v_writelane_b32 v45, s30, 0
; GFX10-NEXT: v_mov_b32_e32 v42, v14
-; GFX10-NEXT: v_writelane_b32 v45, s31, 1
; GFX10-NEXT: v_mov_b32_e32 v43, v13
; GFX10-NEXT: v_mov_b32_e32 v44, v12
+; GFX10-NEXT: v_writelane_b32 v45, s31, 1
; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: global_store_dwordx4 v[0:1], v[0:3], off
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
@@ -308,7 +306,6 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: s_or_saveexec_b32 s1, -1
; GFX11-NEXT: scratch_store_b32 off, v45, s33 offset:20 ; 4-byte Folded Spill
; GFX11-NEXT: s_mov_b32 exec_lo, s1
-; GFX11-NEXT: v_writelane_b32 v45, s0, 2
; GFX11-NEXT: s_clause 0x4
; GFX11-NEXT: scratch_store_b32 off, v40, s33 offset:16
; GFX11-NEXT: scratch_store_b32 off, v41, s33 offset:12
@@ -317,15 +314,16 @@ define <4 x float> @call_preserved_vgpr_tuple8(<8 x i32> %rsrc, <4 x i32> %samp,
; GFX11-NEXT: scratch_store_b32 off, v44, s33
; GFX11-NEXT: image_gather4_c_b_cl v[0:3], v[12:16], s[0:7], s[0:3] dmask:0x1 dim:SQ_RSRC_IMG_2D
; GFX11-NEXT: s_add_i32 s32, s32, 32
+; GFX11-NEXT: v_writelane_b32 v45, s0, 2
; GFX11-NEXT: s_getpc_b64 s[0:1]
; GFX11-NEXT: s_add_u32 s0, s0, extern_func at gotpcrel32@lo+4
; GFX11-NEXT: s_addc_u32 s1, s1, extern_func at gotpcrel32@hi+12
-; GFX11-NEXT: v_writelane_b32 v45, s30, 0
-; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
; GFX11-NEXT: v_dual_mov_b32 v40, v16 :: v_dual_mov_b32 v41, v15
+; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
+; GFX11-NEXT: v_writelane_b32 v45, s30, 0
; GFX11-NEXT: v_dual_mov_b32 v42, v14 :: v_dual_mov_b32 v43, v13
-; GFX11-NEXT: v_writelane_b32 v45, s31, 1
; GFX11-NEXT: v_mov_b32_e32 v44, v12
+; GFX11-NEXT: v_writelane_b32 v45, s31, 1
; GFX11-NEXT: s_waitcnt vmcnt(0)
; GFX11-NEXT: global_store_b128 v[0:1], v[0:3], off
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
@@ -367,3 +365,4 @@ declare <4 x float> @llvm.amdgcn.image.gather4.c.b.cl.2d.v4f32.f32.f32(i32 immar
attributes #0 = { nounwind writeonly }
attributes #1 = { nounwind readonly }
attributes #2 = { "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
+attributes #3 = { nounwind }
diff --git a/llvm/test/CodeGen/AMDGPU/wave32.ll b/llvm/test/CodeGen/AMDGPU/wave32.ll
index fe3a6c59f1728..1805add14e47a 100644
--- a/llvm/test/CodeGen/AMDGPU/wave32.ll
+++ b/llvm/test/CodeGen/AMDGPU/wave32.ll
@@ -5,7 +5,7 @@
; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -amdgpu-early-ifcvt=1 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1064 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck -check-prefixes=GCN,GFX1032,GFX10DEFWAVE %s
-define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vopc_i32:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -38,7 +38,7 @@ define amdgpu_kernel void @test_vopc_i32(ptr addrspace(1) %arg) {
ret void
}
-define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vopc_f32:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -71,7 +71,7 @@ define amdgpu_kernel void @test_vopc_f32(ptr addrspace(1) %arg) {
ret void
}
-define amdgpu_ps void @test_vopc_vcmp(float %x) {
+define amdgpu_ps void @test_vopc_vcmp(float %x) #1 {
; GFX1032-LABEL: test_vopc_vcmp:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: v_cmp_nle_f32_e32 vcc_lo, 0, v0
@@ -98,7 +98,7 @@ define amdgpu_ps void @test_vopc_vcmp(float %x) {
ret void
}
-define amdgpu_kernel void @test_vopc_2xf16(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vopc_2xf16(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vopc_2xf16:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x24
@@ -197,7 +197,7 @@ define amdgpu_kernel void @test_vcmp_vcnd_f16(ptr addrspace(1) %out, half %x) #0
ret void
}
-define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vop3_cmp_f32_sop_and:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
@@ -236,7 +236,7 @@ define amdgpu_kernel void @test_vop3_cmp_f32_sop_and(ptr addrspace(1) %arg) {
ret void
}
-define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vop3_cmp_i32_sop_xor:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
@@ -275,7 +275,7 @@ define amdgpu_kernel void @test_vop3_cmp_i32_sop_xor(ptr addrspace(1) %arg) {
ret void
}
-define amdgpu_kernel void @test_vop3_cmp_u32_sop_or(ptr addrspace(1) %arg) {
+define amdgpu_kernel void @test_vop3_cmp_u32_sop_or(ptr addrspace(1) %arg) #1 {
; GFX1032-LABEL: test_vop3_cmp_u32_sop_or:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x24
@@ -1409,7 +1409,7 @@ define amdgpu_kernel void @test_br_cc_f16(
; GFX1064-NEXT: s_endpgm
ptr addrspace(1) %r,
ptr addrspace(1) %a,
- ptr addrspace(1) %b) {
+ ptr addrspace(1) %b) #1 {
entry:
%a.val = load half, ptr addrspace(1) %a
%b.val = load half, ptr addrspace(1) %b
@@ -1865,7 +1865,7 @@ break:
ret <4 x float> %c.iv
}
-define amdgpu_ps float @test_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) {
+define amdgpu_ps float @test_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) #1 {
; GFX1032-LABEL: test_wwm1:
; GFX1032: ; %bb.0: ; %main_body
; GFX1032-NEXT: s_or_saveexec_b32 s0, -1
@@ -1891,7 +1891,7 @@ main_body:
ret float %out.0
}
-define amdgpu_ps float @test_wwm2(i32 inreg %idx) {
+define amdgpu_ps float @test_wwm2(i32 inreg %idx) #1 {
; GFX1032-LABEL: test_wwm2:
; GFX1032: ; %bb.0: ; %main_body
; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
@@ -1952,7 +1952,7 @@ endif:
ret float %out.2
}
-define amdgpu_ps float @test_strict_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) {
+define amdgpu_ps float @test_strict_wwm1(i32 inreg %idx0, i32 inreg %idx1, float %src0, float %src1) #1 {
; GFX1032-LABEL: test_strict_wwm1:
; GFX1032: ; %bb.0: ; %main_body
; GFX1032-NEXT: s_or_saveexec_b32 s0, -1
@@ -1978,7 +1978,7 @@ main_body:
ret float %out.0
}
-define amdgpu_ps float @test_strict_wwm2(i32 inreg %idx) {
+define amdgpu_ps float @test_strict_wwm2(i32 inreg %idx) #1 {
; GFX1032-LABEL: test_strict_wwm2:
; GFX1032: ; %bb.0: ; %main_body
; GFX1032-NEXT: v_mbcnt_lo_u32_b32 v0, -1, 0
@@ -2119,7 +2119,7 @@ main_body:
ret float %out.2
}
-define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, float %a) {
+define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src, float %a) #1 {
; GFX1032-LABEL: test_intr_fcmp_i64:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -2146,7 +2146,7 @@ define amdgpu_kernel void @test_intr_fcmp_i64(ptr addrspace(1) %out, float %src,
ret void
}
-define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) {
+define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) #1 {
; GFX1032-LABEL: test_intr_icmp_i64:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_clause 0x1
@@ -2176,7 +2176,7 @@ define amdgpu_kernel void @test_intr_icmp_i64(ptr addrspace(1) %out, i32 %src) {
ret void
}
-define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, float %a) {
+define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src, float %a) #1 {
; GFX1032-LABEL: test_intr_fcmp_i32:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x24
@@ -2202,7 +2202,7 @@ define amdgpu_kernel void @test_intr_fcmp_i32(ptr addrspace(1) %out, float %src,
ret void
}
-define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) {
+define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) #1 {
; GFX1032-LABEL: test_intr_icmp_i32:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: s_clause 0x1
@@ -2231,7 +2231,7 @@ define amdgpu_kernel void @test_intr_icmp_i32(ptr addrspace(1) %out, i32 %src) {
ret void
}
-define amdgpu_ps void @test_wqm_vote(float %a) {
+define amdgpu_ps void @test_wqm_vote(float %a) #1 {
; GFX1032-LABEL: test_wqm_vote:
; GFX1032: ; %bb.0:
; GFX1032-NEXT: v_cmp_neq_f32_e32 vcc_lo, 0, v0
@@ -2452,7 +2452,7 @@ main_body:
ret float %s.10
}
-define amdgpu_kernel void @icmp64(i32 %n, i32 %s) {
+define amdgpu_kernel void @icmp64(i32 %n, i32 %s) #1 {
; GFX1032-LABEL: icmp64:
; GFX1032: ; %bb.0: ; %entry
; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28
@@ -2547,7 +2547,7 @@ if.end2: ; preds = %if.end
ret void
}
-define amdgpu_kernel void @fcmp64(float %n, float %s) {
+define amdgpu_kernel void @fcmp64(float %n, float %s) #1 {
; GFX1032-LABEL: fcmp64:
; GFX1032: ; %bb.0: ; %entry
; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28
@@ -2759,7 +2759,7 @@ if.end2: ; preds = %if.end
ret void
}
-define amdgpu_kernel void @icmp32(i32 %n, i32 %s) {
+define amdgpu_kernel void @icmp32(i32 %n, i32 %s) #1 {
; GFX1032-LABEL: icmp32:
; GFX1032: ; %bb.0: ; %entry
; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28
@@ -2853,7 +2853,7 @@ if.end2: ; preds = %if.end
ret void
}
-define amdgpu_kernel void @fcmp32(float %n, float %s) {
+define amdgpu_kernel void @fcmp32(float %n, float %s) #1 {
; GFX1032-LABEL: fcmp32:
; GFX1032: ; %bb.0: ; %entry
; GFX1032-NEXT: s_load_dword s0, s[4:5], 0x28
@@ -3076,13 +3076,13 @@ define void @callee_no_stack_with_call() #1 {
; GFX1032-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX1032-NEXT: s_waitcnt_depctr 0xffe3
; GFX1032-NEXT: s_mov_b32 exec_lo, s17
-; GFX1032-NEXT: v_writelane_b32 v40, s16, 2
; GFX1032-NEXT: s_addk_i32 s32, 0x200
+; GFX1032-NEXT: v_writelane_b32 v40, s16, 2
; GFX1032-NEXT: s_getpc_b64 s[16:17]
; GFX1032-NEXT: s_add_u32 s16, s16, external_void_func_void at gotpcrel32@lo+4
; GFX1032-NEXT: s_addc_u32 s17, s17, external_void_func_void at gotpcrel32@hi+12
-; GFX1032-NEXT: v_writelane_b32 v40, s30, 0
; GFX1032-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
+; GFX1032-NEXT: v_writelane_b32 v40, s30, 0
; GFX1032-NEXT: v_writelane_b32 v40, s31, 1
; GFX1032-NEXT: s_waitcnt lgkmcnt(0)
; GFX1032-NEXT: s_swappc_b64 s[30:31], s[16:17]
@@ -3107,13 +3107,13 @@ define void @callee_no_stack_with_call() #1 {
; GFX1064-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
; GFX1064-NEXT: s_waitcnt_depctr 0xffe3
; GFX1064-NEXT: s_mov_b64 exec, s[18:19]
-; GFX1064-NEXT: v_writelane_b32 v40, s16, 2
; GFX1064-NEXT: s_addk_i32 s32, 0x400
+; GFX1064-NEXT: v_writelane_b32 v40, s16, 2
; GFX1064-NEXT: s_getpc_b64 s[16:17]
; GFX1064-NEXT: s_add_u32 s16, s16, external_void_func_void at gotpcrel32@lo+4
; GFX1064-NEXT: s_addc_u32 s17, s17, external_void_func_void at gotpcrel32@hi+12
-; GFX1064-NEXT: v_writelane_b32 v40, s30, 0
; GFX1064-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
+; GFX1064-NEXT: v_writelane_b32 v40, s30, 0
; GFX1064-NEXT: v_writelane_b32 v40, s31, 1
; GFX1064-NEXT: s_waitcnt lgkmcnt(0)
; GFX1064-NEXT: s_swappc_b64 s[30:31], s[16:17]
diff --git a/llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll b/llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
index 49031e1d818f0..50195bc5bf414 100644
--- a/llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+++ b/llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
@@ -9,7 +9,7 @@
; The EXEC mask should be set to -1 for the duration of the function
; and restored to its original value in the epilogue.
; We will also need to restore the inactive lanes for any allocated VGPRs.
-define amdgpu_gfx_whole_wave i32 @basic_test(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave i32 @basic_test(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: basic_test:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -136,7 +136,7 @@ define amdgpu_gfx_whole_wave i32 @basic_test(i1 %active, i32 %a, i32 %b) {
}
; Make sure we don't crash if there's only one use for %active.
-define amdgpu_gfx_whole_wave i32 @single_use_of_active(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave i32 @single_use_of_active(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: single_use_of_active:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -260,7 +260,7 @@ define amdgpu_gfx_whole_wave i32 @single_use_of_active(i1 %active, i32 %a, i32 %
}
; Make sure we don't crash if %active is not used at all.
-define amdgpu_gfx_whole_wave i32 @unused_active(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave i32 @unused_active(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: unused_active:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -353,7 +353,7 @@ define amdgpu_gfx_whole_wave i32 @unused_active(i1 %active, i32 %a, i32 %b) {
; For any used VGPRs (including those used for SGPR spills), we need to restore the inactive lanes.
; For CSR VGPRs, we need to restore all lanes.
-define amdgpu_gfx_whole_wave i32 @csr(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave i32 @csr(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: csr:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -558,7 +558,7 @@ define amdgpu_gfx_whole_wave i32 @csr(i1 %active, i32 %a, i32 %b) {
}
; Save and restore all lanes of v40.
-define amdgpu_gfx_whole_wave void @csr_vgpr_only(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave void @csr_vgpr_only(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: csr_vgpr_only:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -650,7 +650,7 @@ define amdgpu_gfx_whole_wave void @csr_vgpr_only(i1 %active, i32 %a, i32 %b) {
ret void
}
-define amdgpu_gfx_whole_wave void @sgpr_spill_only(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave void @sgpr_spill_only(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: sgpr_spill_only:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -767,7 +767,7 @@ define amdgpu_gfx_whole_wave void @sgpr_spill_only(i1 %active, i32 %a, i32 %b) {
ret void
}
-define amdgpu_gfx_whole_wave void @realign_stack(i1 %active, i32 %x) {
+define amdgpu_gfx_whole_wave void @realign_stack(i1 %active, i32 %x) #0 {
; DAGISEL-LABEL: realign_stack:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -897,7 +897,7 @@ define amdgpu_gfx_whole_wave void @realign_stack(i1 %active, i32 %x) {
ret void
}
-define amdgpu_gfx_whole_wave i32 @multiple_blocks(i1 %active, i32 %a, i32 %b) {
+define amdgpu_gfx_whole_wave i32 @multiple_blocks(i1 %active, i32 %a, i32 %b) #0 {
; DAGISEL-LABEL: multiple_blocks:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1058,7 +1058,7 @@ if.end:
ret i32 %e
}
-define amdgpu_gfx_whole_wave i64 @ret_64(i1 %active, i64 %a, i64 %b) {
+define amdgpu_gfx_whole_wave i64 @ret_64(i1 %active, i64 %a, i64 %b) #0 {
; DAGISEL-LABEL: ret_64:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1216,7 +1216,7 @@ define amdgpu_gfx_whole_wave i64 @ret_64(i1 %active, i64 %a, i64 %b) {
ret i64 %ret
}
-define amdgpu_gfx_whole_wave void @inreg_args(i1 %active, i32 inreg %i32, <4 x i32> inreg %v4i32, float inreg %float, ptr addrspace(5) inreg %ptr, ptr addrspace(5) inreg %ptr2) {
+define amdgpu_gfx_whole_wave void @inreg_args(i1 %active, i32 inreg %i32, <4 x i32> inreg %v4i32, float inreg %float, ptr addrspace(5) inreg %ptr, ptr addrspace(5) inreg %ptr2) #0 {
; DAGISEL-LABEL: inreg_args:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -1418,7 +1418,7 @@ define amdgpu_gfx_whole_wave void @inreg_args(i1 %active, i32 inreg %i32, <4 x i
declare amdgpu_gfx <2 x half> @gfx_callee(<2 x half> %x, <2 x half> %y)
-define amdgpu_gfx_whole_wave <2 x half> @call_gfx_from_whole_wave(i1 %active, <2 x half> %x, <2 x half> %y) {
+define amdgpu_gfx_whole_wave <2 x half> @call_gfx_from_whole_wave(i1 %active, <2 x half> %x, <2 x half> %y) #0 {
; DAGISEL-LABEL: call_gfx_from_whole_wave:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -4667,7 +4667,7 @@ define amdgpu_gfx_whole_wave <2 x half> @call_gfx_from_whole_wave(i1 %active, <2
ret <2 x half> %ret
}
-define amdgpu_gfx_whole_wave <2 x half> @tail_call_gfx_from_whole_wave(i1 %active, <2 x half> %x, <2 x half> %y) {
+define amdgpu_gfx_whole_wave <2 x half> @tail_call_gfx_from_whole_wave(i1 %active, <2 x half> %x, <2 x half> %y) #0 {
; This should not be turned into a tail call.
; DAGISEL-LABEL: tail_call_gfx_from_whole_wave:
; DAGISEL: ; %bb.0:
@@ -7815,7 +7815,7 @@ define amdgpu_gfx_whole_wave <2 x half> @tail_call_gfx_from_whole_wave(i1 %activ
declare amdgpu_gfx_whole_wave float @callee(i1 %active, <8 x float> %x)
-define amdgpu_cs void @call_from_entry(<8 x float> %x, ptr %p) {
+define amdgpu_cs void @call_from_entry(<8 x float> %x, ptr %p) #0 {
; DAGISEL-LABEL: call_from_entry:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_mov_b32 s1, callee at abs32@hi
@@ -7872,7 +7872,7 @@ define amdgpu_cs void @call_from_entry(<8 x float> %x, ptr %p) {
ret void
}
-define amdgpu_gfx_whole_wave void @call_from_whole_wave(i1 %unused, <8 x float> %x, ptr %p) {
+define amdgpu_gfx_whole_wave void @call_from_whole_wave(i1 %unused, <8 x float> %x, ptr %p) #0 {
; DAGISEL-LABEL: call_from_whole_wave:
; DAGISEL: ; %bb.0:
; DAGISEL-NEXT: s_wait_loadcnt_dscnt 0x0
@@ -11149,3 +11149,5 @@ define amdgpu_gfx_whole_wave void @call_from_whole_wave(i1 %unused, <8 x float>
store float %ret, ptr %p
ret void
}
+
+attributes #0 = { nounwind }
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