[llvm-branch-commits] [llvm] [DAGCombiner] Relax nsz constraint with fp->int->fp optimizations (PR #164503)

Guy David via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Nov 17 03:08:40 PST 2025


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@@ -6075,6 +6075,35 @@ bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
       Op, [](ConstantFPSDNode *C) { return !C->isZero(); });
 }
 
+bool SelectionDAG::allUsesSignedZeroInsensitive(SDValue Op) const {
+  assert(Op.getValueType().isFloatingPoint());
+  return all_of(Op->uses(), [&](SDUse &Use) {
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guy-david wrote:

Sounds good, limiting it to two uses for now. I will look into implementing it via demanded-bits in the near future.
Moving the SelectionDAG patch to https://github.com/llvm/llvm-project/pull/165011 because I don't want it to be tightly coupled to the fp-to-int-to-fp optimization.

https://github.com/llvm/llvm-project/pull/164503


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