[llvm-branch-commits] [llvm] [AMDGPU][SIMemoryLegalizer] Combine GFX10-11 CacheControl Classes (PR #168058)

[Pierre van Houtryve via llvm-branch-commits]

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@@ -443,14 +443,27 @@ class SIGfx6CacheControl : public SICacheControl {
                      Position Pos) const override;
 };
 
-class SIGfx10CacheControl : public SIGfx6CacheControl {
+/// Generates code sequences for the memory model of GFX10/11.
+class SIGfx10CacheControl final : public SICacheControl {
 public:
-  SIGfx10CacheControl(const GCNSubtarget &ST) : SIGfx6CacheControl(ST) {}
+  SIGfx10CacheControl(const GCNSubtarget &ST) : SICacheControl(ST) {}
 
   bool enableLoadCacheBypass(const MachineBasicBlock::iterator &MI,
                              SIAtomicScope Scope,
                              SIAtomicAddrSpace AddrSpace) const override;
 
+  bool enableStoreCacheBypass(const MachineBasicBlock::iterator &MI,
+                              SIAtomicScope Scope,
+                              SIAtomicAddrSpace AddrSpace) const override {
+    return false;
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Pierre-vh wrote:

I'd prefer to keep everything pure virtual so one can just look at the `SIGfxNCacheControl` class and see all semantics straight away. e.g. if store bypass does nothing, it's useful information to see in the subclass

Though, I don't have a strong opinion. If you think it's better to have the bass class return false by default, that's ok



https://github.com/llvm/llvm-project/pull/168058