[llvm-branch-commits] [llvm] [LoopVectorize] Support vectorization of compressing patterns in VPlan (PR #140723)

[Florian Hahn via llvm-branch-commits]

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@@ -3193,6 +3239,9 @@ class LLVM_ABI_FOR_TEST VPWidenMemoryRecipe : public VPRecipeBase,
   /// Whether the consecutive accessed addresses are in reverse order.
   bool Reverse;
 
+  /// Whether the consecutive accessed addresses are compressed with mask value.
+  bool Compressed;
+
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fhahn wrote:

This corresponds 1-1 to an intrinsic, right? Can we just use VPWidenIntrinsicRecipe?

https://github.com/llvm/llvm-project/pull/140723