[llvm-branch-commits] [llvm] [dwarf] make dwarf fission compatible with RISCV relaxations 2/2 (PR #164813)
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Thu Nov 6 13:47:34 PST 2025
https://github.com/dlav-sc updated https://github.com/llvm/llvm-project/pull/164813
>From 833329169cadc9a1223a19dd5a50faff0501f92b Mon Sep 17 00:00:00 2001
From: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: Thu, 18 Sep 2025 02:05:39 +0000
Subject: [PATCH 1/3] [dwarf] make dwarf fission compatible with RISCV
relaxations 2/2
This patch makes DWARF fission compatible with RISC-V relaxations by
using indirect addressing for the DW_AT_high_pc attribute. This
eliminates the remaining relocations in .dwo files.
---
.../CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 8 ++--
llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll | 44 +++++++++++++------
2 files changed, 35 insertions(+), 17 deletions(-)
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
index 751d3735d3b2b..2e4a26ef70bc2 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
@@ -493,10 +493,12 @@ void DwarfCompileUnit::attachLowHighPC(DIE &D, const MCSymbol *Begin,
assert(End->isDefined() && "Invalid end label");
addLabelAddress(D, dwarf::DW_AT_low_pc, Begin);
- if (DD->getDwarfVersion() < 4)
- addLabelAddress(D, dwarf::DW_AT_high_pc, End);
- else
+ if (DD->getDwarfVersion() >= 4 &&
+ (!isDwoUnit() || !llvm::isRangeRelaxable(Begin, End))) {
addLabelDelta(D, dwarf::DW_AT_high_pc, End, Begin);
+ return;
+ }
+ addLabelAddress(D, dwarf::DW_AT_high_pc, End);
}
// Add info for Wasm-global-based relocation.
diff --git a/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll b/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
index f8ab7fc5ad900..64f83ba1a7d7f 100644
--- a/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
+++ b/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
@@ -1,12 +1,13 @@
; RUN: llc -dwarf-version=5 -split-dwarf-file=foo.dwo -O0 %s -mtriple=riscv64-unknown-linux-gnu -filetype=obj -o %t
; RUN: llvm-dwarfdump -v %t | FileCheck --check-prefix=DWARF5 %s
; RUN: llvm-dwarfdump --debug-info %t 2> %t.txt
-; RUN: FileCheck --input-file=%t.txt %s --check-prefix=RELOCS --implicit-check-not=warning:
+; RUN: FileCheck --input-file=%t.txt %s --check-prefix=RELOCS --allow-empty --implicit-check-not=warning:
; RUN: llc -dwarf-version=4 -split-dwarf-file=foo.dwo -O0 %s -mtriple=riscv64-unknown-linux-gnu -filetype=obj -o %t
; RUN: llvm-dwarfdump -v %t | FileCheck --check-prefix=DWARF4 %s
; RUN: llvm-dwarfdump --debug-info %t 2> %t.txt
-; RUN: FileCheck --input-file=%t.txt %s --check-prefix=RELOCS --implicit-check-not=warning:
+; RUN: FileCheck --input-file=%t.txt %s --check-prefix=RELOCS --allow-empty --implicit-check-not=warning:
+; RUN: llvm-objdump -h %t | FileCheck --check-prefix=HDR %s
; In the RISC-V architecture, the .text section is subject to
; relaxation, meaning the start address of each function can change
@@ -49,60 +50,75 @@
; clang -g -S -gsplit-dwarf --target=riscv64 -march=rv64gc -O0 relax_dwo_ranges.cpp
-; Currently, square() still uses an offset to represent the function's end address,
-; which requires a relocation here.
-; RELOCS: warning: unexpected relocations for dwo section '.debug_info.dwo'
+; RELOCS-NOT: warning: unexpected relocations for dwo section '.debug_info.dwo'
+; Make sure we don't produce any relocations in any .dwo section
+; HDR-NOT: .rela.{{.*}}.dwo
+
+; Ensure that 'square()' function uses indexed start and end addresses
; DWARF5: .debug_info.dwo contents:
; DWARF5: DW_TAG_subprogram
-; DWARF5-NEXT: DW_AT_low_pc [DW_FORM_addrx] (indexed (00000000) address = 0x0000000000000000 ".text")
-; DWARF5-NEXT: DW_AT_high_pc [DW_FORM_data4] (0x00000000)
+; DWARF5-NEXT: DW_AT_low_pc [DW_FORM_addrx] (indexed (00000000) address = 0x0000000000000000 ".text")
+; DWARF5-NEXT: DW_AT_high_pc [DW_FORM_addrx] (indexed (00000001) address = 0x0000000000000044 ".text")
; DWARF5: DW_AT_name {{.*}} "square")
; DWARF5: DW_TAG_formal_parameter
+; HDR-NOT: .rela.{{.*}}.dwo
+
; Ensure there is no unnecessary addresses in .o file
; DWARF5: .debug_addr contents:
; DWARF5: Addrs: [
; DWARF5-NEXT: 0x0000000000000000
+; DWARF5-NEXT: 0x0000000000000044
; DWARF5-NEXT: 0x0000000000000046
; DWARF5-NEXT: 0x000000000000006c
; DWARF5-NEXT: 0x00000000000000b0
; DWARF5-NEXT: ]
+; HDR-NOT: .rela.{{.*}}.dwo
+
; Ensure that 'boo()' and 'main()' use DW_RLE_startx_length and DW_RLE_startx_endx
; entries respectively
; DWARF5: .debug_rnglists.dwo contents:
; DWARF5: ranges:
-; DWARF5-NEXT: 0x00000014: [DW_RLE_startx_length]: 0x0000000000000001, 0x0000000000000024 => [0x0000000000000046, 0x000000000000006a)
+; DWARF5-NEXT: 0x00000014: [DW_RLE_startx_length]: 0x0000000000000002, 0x0000000000000024 => [0x0000000000000046, 0x000000000000006a)
; DWARF5-NEXT: 0x00000017: [DW_RLE_end_of_list ]
-; DWARF5-NEXT: 0x00000018: [DW_RLE_startx_endx ]: 0x0000000000000002, 0x0000000000000003 => [0x000000000000006c, 0x00000000000000b0)
+; DWARF5-NEXT: 0x00000018: [DW_RLE_startx_endx ]: 0x0000000000000003, 0x0000000000000004 => [0x000000000000006c, 0x00000000000000b0)
; DWARF5-NEXT: 0x0000001b: [DW_RLE_end_of_list ]
; DWARF5-EMPTY:
+; HDR-NOT: .rela.{{.*}}.dwo
+
; DWARF4: .debug_info.dwo contents:
; DWARF4: DW_TAG_subprogram
-; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000000) address = 0x0000000000000000 ".text")
-; DWARF4-NEXT: DW_AT_high_pc [DW_FORM_data4] (0x00000000)
+; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000000) address = 0x0000000000000000 ".text")
+; DWARF4-NEXT: DW_AT_high_pc [DW_FORM_GNU_addr_index] (indexed (00000001) address = 0x0000000000000044 ".text")
; DWARF4: DW_AT_name {{.*}} "square")
; DWARF4: DW_TAG_subprogram
-; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000001) address = 0x0000000000000046 ".text")
+; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000002) address = 0x0000000000000046 ".text")
; DWARF4-NEXT: DW_AT_high_pc [DW_FORM_data4] (0x00000024)
; DWARF4: DW_AT_name {{.*}} "boo")
; DWARF4: DW_TAG_subprogram
-; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000002) address = 0x000000000000006c ".text")
-; DWARF4-NEXT: DW_AT_high_pc [DW_FORM_data4] (0x00000000)
+; DWARF4-NEXT: DW_AT_low_pc [DW_FORM_GNU_addr_index] (indexed (00000003) address = 0x000000000000006c ".text")
+; DWARF4-NEXT: DW_AT_high_pc [DW_FORM_GNU_addr_index] (indexed (00000004) address = 0x00000000000000b0 ".text")
; DWARF4: DW_AT_name {{.*}} "main")
+; HDR-NOT: .rela.{{.*}}.dwo
+
; Ensure there is no unnecessary addresses in .o file
; DWARF4: .debug_addr contents:
; DWARF4: Addrs: [
; DWARF4-NEXT: 0x0000000000000000
+; DWARF4-NEXT: 0x0000000000000044
; DWARF4-NEXT: 0x0000000000000046
; DWARF4-NEXT: 0x000000000000006c
+; DWARF4-NEXT: 0x00000000000000b0
; DWARF4-NEXT: ]
+; HDR-NOT: .rela.{{.*}}.dwo
+
; Function Attrs: mustprogress noinline optnone
define dso_local noundef signext i32 @_Z6squarei(i32 noundef signext %0) #0 !dbg !11 {
%2 = alloca i32, align 4
>From 69b448cac3f1bdcc7e959d15feb622e1ef8a1b3b Mon Sep 17 00:00:00 2001
From: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: Wed, 5 Nov 2025 23:17:46 +0000
Subject: [PATCH 2/3] fix
---
llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll b/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
index 64f83ba1a7d7f..49148c06ec7e4 100644
--- a/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
+++ b/llvm/test/DebugInfo/RISCV/relax_dwo_ranges.ll
@@ -50,7 +50,7 @@
; clang -g -S -gsplit-dwarf --target=riscv64 -march=rv64gc -O0 relax_dwo_ranges.cpp
-; RELOCS-NOT: warning: unexpected relocations for dwo section '.debug_info.dwo'
+; RELOCS-NOT: warning:
; Make sure we don't produce any relocations in any .dwo section
; HDR-NOT: .rela.{{.*}}.dwo
>From 5f9115dc2a035c6ade93d7af511518df4eaaf90a Mon Sep 17 00:00:00 2001
From: Daniil Avdeev <daniil.avdeev at syntacore.com>
Date: Thu, 6 Nov 2025 20:30:17 +0000
Subject: [PATCH 3/3] fix
---
.../CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 3 ++-
llvm/test/DebugInfo/X86/fission-ranges.ll | 20 +++++++++----------
2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
index 2e4a26ef70bc2..1742c413e745f 100644
--- a/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
@@ -27,6 +27,7 @@
#include "llvm/IR/DebugInfo.h"
#include "llvm/IR/GlobalVariable.h"
#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCObjectStreamer.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSymbol.h"
@@ -494,7 +495,7 @@ void DwarfCompileUnit::attachLowHighPC(DIE &D, const MCSymbol *Begin,
addLabelAddress(D, dwarf::DW_AT_low_pc, Begin);
if (DD->getDwarfVersion() >= 4 &&
- (!isDwoUnit() || !llvm::isRangeRelaxable(Begin, End))) {
+ (!isDwoUnit() || llvm::absoluteSymbolDiff(Begin, End).has_value())) {
addLabelDelta(D, dwarf::DW_AT_high_pc, End, Begin);
return;
}
diff --git a/llvm/test/DebugInfo/X86/fission-ranges.ll b/llvm/test/DebugInfo/X86/fission-ranges.ll
index be0a3759973c3..ba0a6e87dd916 100644
--- a/llvm/test/DebugInfo/X86/fission-ranges.ll
+++ b/llvm/test/DebugInfo/X86/fission-ranges.ll
@@ -45,21 +45,21 @@
; if they've changed due to a bugfix, change in register allocation, etc.
; CHECK: [[A]]:
-; CHECK-NEXT: DW_LLE_startx_length (0x00000001, 0x00000011): DW_OP_consts +0, DW_OP_stack_value
-; CHECK-NEXT: DW_LLE_startx_length (0x00000002, 0x0000000b): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length (0x00000003, 0x00000012): DW_OP_breg7 RSP-4
+; CHECK-NEXT: DW_LLE_startx_length (0x00000002, 0x00000011): DW_OP_consts +0, DW_OP_stack_value
+; CHECK-NEXT: DW_LLE_startx_length (0x00000004, 0x0000000b): DW_OP_reg0 RAX
+; CHECK-NEXT: DW_LLE_startx_length (0x00000005, 0x00000012): DW_OP_breg7 RSP-4
; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[E]]:
-; CHECK-NEXT: DW_LLE_startx_length (0x00000004, 0x0000000b): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length (0x00000005, 0x0000005a): DW_OP_breg7 RSP-36
+; CHECK-NEXT: DW_LLE_startx_length (0x00000006, 0x0000000b): DW_OP_reg0 RAX
+; CHECK-NEXT: DW_LLE_startx_length (0x00000007, 0x0000005a): DW_OP_breg7 RSP-36
; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[B]]:
-; CHECK-NEXT: DW_LLE_startx_length (0x00000006, 0x0000000b): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length (0x00000007, 0x00000042): DW_OP_breg7 RSP-24
+; CHECK-NEXT: DW_LLE_startx_length (0x00000008, 0x0000000b): DW_OP_reg0 RAX
+; CHECK-NEXT: DW_LLE_startx_length (0x00000009, 0x00000042): DW_OP_breg7 RSP-24
; CHECK-NEXT: DW_LLE_end_of_list ()
; CHECK: [[D]]:
-; CHECK-NEXT: DW_LLE_startx_length (0x00000008, 0x0000000b): DW_OP_reg0 RAX
-; CHECK-NEXT: DW_LLE_startx_length (0x00000009, 0x0000002a): DW_OP_breg7 RSP-12
+; CHECK-NEXT: DW_LLE_startx_length (0x0000000a, 0x0000000b): DW_OP_reg0 RAX
+; CHECK-NEXT: DW_LLE_startx_length (0x0000000b, 0x0000002a): DW_OP_breg7 RSP-12
; CHECK-NEXT: DW_LLE_end_of_list ()
; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)
@@ -69,7 +69,7 @@
; (9 is the last index in debug_loc.dwo, making 10 entries of 8 bytes each,
; 10 * 8 == 80 base 10 == 50 base 16)
-; HDR: .debug_addr 00000050
+; HDR: .debug_addr 00000060
; HDR-NOT: .rela.{{.*}}.dwo
; Check for the existence of a DWARF v5-style range list table in the .debug_rnglists
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