[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)
Petar Avramovic via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu May 22 07:10:53 PDT 2025
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@@ -133,6 +133,43 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy,
MI.eraseFromParent();
}
+void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) {
+ Register Dst = MI.getOperand(0).getReg();
+ LLT Ty = MRI.getType(Dst);
+ Register Src = MI.getOperand(1).getReg();
+ unsigned Opc = MI.getOpcode();
+ int TrueExtCst = (Opc == G_SEXT ? -1 : 1);
+ if (Ty == S32 || Ty == S16) {
+ auto True = B.buildConstant({VgprRB, Ty}, TrueExtCst);
+ auto False = B.buildConstant({VgprRB, Ty}, 0);
+ B.buildSelect(Dst, Src, True, False);
+ } else if (Ty == S64) {
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petar-avramovic wrote:
this is used for S1 {S|Z|A}EXT to S16/S32/S64, iirc pointers are not legal here, and vectors types are scalarized in legalizer
https://github.com/llvm/llvm-project/pull/132383
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