[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for bit shifts and sext-inreg (PR #132385)

[Matt Arsenault via llvm-branch-commits]

================
@@ -171,6 +171,59 @@ void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) {
   MI.eraseFromParent();
 }
 
+std::pair<Register, Register> RegBankLegalizeHelper::unpackZExt(Register Reg) {
----------------
arsenm wrote:

const? 

https://github.com/llvm/llvm-project/pull/132385