[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

[Matt Arsenault via llvm-branch-commits]

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@@ -133,6 +133,43 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, LLT WideTy,
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) {
+  Register Dst = MI.getOperand(0).getReg();
+  LLT Ty = MRI.getType(Dst);
+  Register Src = MI.getOperand(1).getReg();
+  unsigned Opc = MI.getOpcode();
+  int TrueExtCst = (Opc == G_SEXT ? -1 : 1);
+  if (Ty == S32 || Ty == S16) {
+    auto True = B.buildConstant({VgprRB, Ty}, TrueExtCst);
+    auto False = B.buildConstant({VgprRB, Ty}, 0);
+    B.buildSelect(Dst, Src, True, False);
+  } else if (Ty == S64) {
+    auto True = B.buildConstant({VgprRB_S32}, TrueExtCst);
+    auto False = B.buildConstant({VgprRB_S32}, 0);
+    auto Lo = B.buildSelect({VgprRB_S32}, Src, True, False);
+    MachineInstrBuilder Hi;
+    switch (Opc) {
+    case G_SEXT:
+      Hi = Lo;
+      break;
+    case G_ZEXT:
+      Hi = False;
+      break;
+    case G_ANYEXT:
+      Hi = B.buildUndef({VgprRB_S32});
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arsenm wrote:

poison, but not sure the poison PR got merged yet

https://github.com/llvm/llvm-project/pull/132383