[llvm-branch-commits] [AMDGPU] Set AS8 address width to 48 bits (PR #139419)

Krzysztof Drewniak via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue May 13 12:45:10 PDT 2025


krzysz00 wrote:

> Technically true, but why not just call it 64?

Because we really don't want to be doing 64-bit arithmetic on a buffer resource - that'll spill over to the stride bits

That is, while `ptr addrspace(1)` (or x86's pointers) have 48 "real" address bits that are stored as 64 bits by making pointers that aren't sign-extensions of the 48-bit value invalid, a buffer resource actually uses those missing bits for strides.

So if I have a buffer resource and I underflow the pointer - say by doing `null - 4`, doing the computation in 64 bits will change the stride field, enable swizzling, and so on, while on a regular pointer it'll just get me the `0xff...fc` pointer

https://github.com/llvm/llvm-project/pull/139419


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