[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for select (PR #132384)

[Fabian Ritter via llvm-branch-commits]

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@@ -492,7 +511,8 @@ LLT RegBankLegalizeHelper::getBTyFromID(RegBankLLTMappingApplyID ID, LLT Ty) {
   case UniInVgprB64:
     if (Ty == LLT::scalar(64) || Ty == LLT::fixed_vector(2, 32) ||
         Ty == LLT::fixed_vector(4, 16) || Ty == LLT::pointer(0, 64) ||
-        Ty == LLT::pointer(1, 64) || Ty == LLT::pointer(4, 64))
+        Ty == LLT::pointer(1, 64) || Ty == LLT::pointer(4, 64) ||
+        Ty == LLT::pointer(999, 64))
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ritter-x2a wrote:

7 and 8 are bigger than that (see [here](https://llvm.org/docs/AMDGPUUsage.html#amdgpu-address-spaces-table), but I don't know if we support them in Global ISel). We treat everything above `AMDGPUAS::MAX_AMDGPU_ADDRESS` as an alias to the 64-bit flat AS [here](https://github.com/llvm/llvm-project/blob/54ff03532148bfc48ace062e453eaad8ec74fdda/llvm/include/llvm/Support/AMDGPUAddrSpace.h#L94).

https://github.com/llvm/llvm-project/pull/132384