[llvm-branch-commits] [llvm] [LV] Reduce register usage for scaled reductions (PR #133090)

[Nicholas Guy via llvm-branch-commits]

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@@ -5026,10 +5026,23 @@ calculateRegisterUsage(VPlan &Plan, ArrayRef<ElementCount> VFs,
             // even in the scalar case.
             RegUsage[ClassID] += 1;
           } else {
+            // The output from scaled phis and scaled reductions actually have
+            // fewer lanes than the VF.
+            auto VF = VFs[J];
+            if (auto *ReductionR = dyn_cast<VPReductionPHIRecipe>(R))
+              VF = VF.divideCoefficientBy(ReductionR->getVFScaleFactor());
+            else if (auto *PartialReductionR =
+                         dyn_cast<VPPartialReductionRecipe>(R))
+              VF = VF.divideCoefficientBy(PartialReductionR->getScaleFactor());
+            if (VF != VFs[J])
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NickGuy-Arm wrote:

Nit: If the condition is only used for debug output then can it be moved to inside the LLVM_DEBUG

https://github.com/llvm/llvm-project/pull/133090