[llvm-branch-commits] [llvm] [GlobalISel] Combine redundant sext_inreg (PR #131624)

[Christudasan Devadasan via llvm-branch-commits]

================
@@ -0,0 +1,87 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1030 -run-pass=amdgpu-regbank-combiner -verify-machineinstrs %s -o - | FileCheck %s
----------------
cdevadas wrote:

Ditto.

https://github.com/llvm/llvm-project/pull/131624