[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: add RegBankLegalize rules for extends and trunc (PR #132383)

[Pierre van Houtryve via llvm-branch-commits]

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@@ -489,22 +489,61 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
       .Uni(B32, {{SgprB32}, {Sgpr32AExtBoolInReg, SgprB32, SgprB32}});
 
   addRulesForGOpcs({G_ANYEXT})
+      .Any({{UniS16, S1}, {{None}, {None}}}) // should be combined away
       .Any({{UniS32, S1}, {{None}, {None}}}) // should be combined away
-      .Any({{UniS32, S16}, {{Sgpr32}, {Sgpr16}}});
+      .Any({{UniS64, S1}, {{None}, {None}}}) // should be combined away
+      .Any({{{DivS16, S1}}, {{Vgpr16}, {Vcc}, VccExtToSel}})
+      .Any({{{DivS32, S1}}, {{Vgpr32}, {Vcc}, VccExtToSel}})
+      .Any({{{DivS64, S1}}, {{Vgpr64}, {Vcc}, VccExtToSel}})
+      .Any({{UniS64, S32}, {{Sgpr64}, {Sgpr32}, Ext32To64}})
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Pierre-vh wrote:

unrelated to the patch: These should be better documented, otherwise it's very hard to read what's actually happening here. I had to go find 2 different struct signatures before getting an idea of what these lines do.

A small comment on top `RegBankLegalizeRules` that explains how many braces are needed and how the  arguments are laid out could go a long way.

I also feel like we could eliminate one or even two sets of braces by just making them arguments, further helping readability. It could just be an overload that's preferred when manually writing the rules, and keep the current signature if we're pushing rules using a loop or something?



https://github.com/llvm/llvm-project/pull/132383