[llvm-branch-commits] [llvm] [llvm] Add option to emit `callgraph` section (PR #87574)
Paul Kirth via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Mar 17 14:05:40 PDT 2025
================
@@ -0,0 +1,93 @@
+# Test MIR printer and parser for type id field in callSites. It is used
+# for propogating call site type identifiers to emit in the call graph section.
+
+# RUN: llc --call-graph-section %s -run-pass=none -o - | FileCheck %s
+# CHECK: name: main
+# CHECK: callSites:
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: []
+# CHECK-NEXT: - { bb: {{.*}}, offset: {{.*}}, fwdArgRegs: [], typeId:
+# CHECK-NEXT: 1234567890 }
+
+--- |
+ define dso_local noundef i32 @_Z3addii(i32 noundef %a, i32 noundef %b) !type !0 !type !0 {
+ entry:
+ %a.addr = alloca i32, align 4
+ %b.addr = alloca i32, align 4
+ store i32 %a, ptr %a.addr, align 4
+ store i32 %b, ptr %b.addr, align 4
+ %a_val = load i32, ptr %a.addr, align 4
+ %b_val = load i32, ptr %b.addr, align 4
+ %add = add nsw i32 %a_val, %b_val
+ ret i32 %add
+ }
+
+ define dso_local noundef i32 @_Z8multiplyii(i32 noundef %a, i32 noundef %b) !type !0 !type !0 {
+ entry:
+ %a.addr = alloca i32, align 4
+ %b.addr = alloca i32, align 4
+ store i32 %a, ptr %a.addr, align 4
+ store i32 %b, ptr %b.addr, align 4
+ %a_val = load i32, ptr %a.addr, align 4
+ %b_val = load i32, ptr %b.addr, align 4
+ %mul = mul nsw i32 %a_val, %b_val
+ ret i32 %mul
+ }
+
+ define dso_local noundef ptr @_Z13get_operationb(i1 noundef zeroext %is_addition) !type !1 !type !1 {
+ entry:
+ %is_addition.addr = alloca i8, align 1
+ %storedv = zext i1 %is_addition to i8
+ store i8 %storedv, ptr %is_addition.addr, align 1
+ %is_addition_val = load i8, ptr %is_addition.addr, align 1
+ %loadedv = trunc i8 %is_addition_val to i1
+ br i1 %loadedv, label %cond.end, label %cond.false
+
+ cond.false: ; preds = %entry
+ br label %cond.end
+
+ cond.end: ; preds = %cond.false, %entry
+ %cond = phi ptr [ @_Z8multiplyii, %cond.false ], [ @_Z3addii, %entry ]
+ ret ptr %cond
+ }
+
+ define dso_local noundef i32 @main(i32 noundef %argc) !type !2 !type !2 {
+ entry:
+ %retval = alloca i32, align 4
+ %argc.addr = alloca i32, align 4
+ %x = alloca i32, align 4
+ %y = alloca i32, align 4
+ %op = alloca ptr, align 8
+ store i32 0, ptr %retval, align 4
+ store i32 %argc, ptr %argc.addr, align 4
+ store i32 5, ptr %x, align 4
+ store i32 10, ptr %y, align 4
+ %argc_val = load i32, ptr %argc.addr, align 4
+ %rem = srem i32 %argc_val, 2
+ %cmp = icmp eq i32 %rem, 0
+ %call = call noundef ptr @_Z13get_operationb(i1 noundef zeroext %cmp) [ "callee_type"(metadata !"_ZTSFPvbE.generalized") ]
+ store ptr %call, ptr %op, align 8
+ %op_val = load ptr, ptr %op, align 8
+ %x_val = load i32, ptr %x, align 4
+ %y_val = load i32, ptr %y, align 4
+ %call1 = call noundef i32 %op_val(i32 noundef %x_val, i32 noundef %y_val) [ "callee_type"(metadata !"_ZTSFiiiE.generalized") ]
+ ret i32 %call1
+ }
+
+ !0 = !{i64 0, !"_ZTSFiiiE.generalized"}
+ !1 = !{i64 0, !"_ZTSFPvbE.generalized"}
+ !2 = !{i64 0, !"_ZTSFiiE.generalized"}
+
+...
+---
+name: main
+callSites:
+ - { bb: 0, offset: 0, fwdArgRegs: [] }
+ - { bb: 0, offset: 2, fwdArgRegs: [], typeId:
+ 1234567890 }
----------------
ilovepi wrote:
nit: does this need to be on 2 lines? I know that's what the tools spit out, but it seems unnecessary. If it makes the checks harder or more confusing, then feel free to ignore.
https://github.com/llvm/llvm-project/pull/87574
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