[llvm-branch-commits] [llvm] [AMDGPU] Precommit si-fold-bitmask.mir (PR #131310)
Pierre van Houtryve via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Mar 14 04:29:58 PDT 2025
https://github.com/Pierre-vh updated https://github.com/llvm/llvm-project/pull/131310
>From fcd5623ccd18100197817f7f4d5a500ca433f8dc Mon Sep 17 00:00:00 2001
From: pvanhout <pierre.vanhoutryve at amd.com>
Date: Fri, 14 Mar 2025 10:00:21 +0100
Subject: [PATCH] [AMDGPU] Precommit si-fold-bitmask.mir
---
llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir | 429 ++++++++++++++++++
1 file changed, 429 insertions(+)
create mode 100644 llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir
diff --git a/llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir b/llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir
new file mode 100644
index 0000000000000..1edf970591179
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/si-fold-bitmasks.mir
@@ -0,0 +1,429 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -run-pass=si-fold-operands -verify-machineinstrs -o - %s | FileCheck --check-prefix=GCN %s
+
+# Test supported instructions
+
+---
+name: v_ashr_i32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_ashr_i32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_ASHR_I32_e64 %src, %shiftmask, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_ASHR_I32_e64 %src, %shiftmask, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: v_lshr_b32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_lshr_b32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_LSHR_B32_e64 %src, %shiftmask, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_LSHR_B32_e64 %src, %shiftmask, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: v_lshr_b32_e32__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_lshr_b32_e32__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e64 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_LSHR_B32_e32 %src, %shiftmask, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e64 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_LSHR_B32_e32 %src, %shiftmask, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: v_lshl_b32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_lshl_b32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e64 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_LSHL_B32_e64 %src, %shiftmask, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e64 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_LSHL_B32_e64 %src, %shiftmask, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: s_lshl_b32__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GCN-LABEL: name: s_lshl_b32__s_and_b32
+ ; GCN: liveins: $sgpr0, $sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_32 = COPY $sgpr0
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr1
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0 = COPY %ret
+ %src:sgpr_32 = COPY $sgpr0
+ %shift:sgpr_32 = COPY $sgpr1
+ %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ $sgpr0 = COPY %ret
+...
+
+---
+name: s_lshr_b32__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GCN-LABEL: name: s_lshr_b32__s_and_b32
+ ; GCN: liveins: $sgpr0, $sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_32 = COPY $sgpr0
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr1
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_32 = S_LSHR_B32 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0 = COPY %ret
+ %src:sgpr_32 = COPY $sgpr0
+ %shift:sgpr_32 = COPY $sgpr1
+ %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ %ret:sgpr_32 = S_LSHR_B32 %src, %shiftmask, implicit-def $scc
+ $sgpr0 = COPY %ret
+...
+
+---
+name: s_ashr_i32__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GCN-LABEL: name: s_ashr_i32__s_and_b32
+ ; GCN: liveins: $sgpr0, $sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_32 = COPY $sgpr0
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr1
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_32 = S_ASHR_I32 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0 = COPY %ret
+ %src:sgpr_32 = COPY $sgpr0
+ %shift:sgpr_32 = COPY $sgpr1
+ %shiftmask:sgpr_32 = S_AND_B32 65535, %shift, implicit-def $scc
+ %ret:sgpr_32 = S_ASHR_I32 %src, %shiftmask, implicit-def $scc
+ $sgpr0 = COPY %ret
+...
+
+---
+name: s_lshl_b64__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1, $sgpr2
+
+ ; GCN-LABEL: name: s_lshl_b64__s_and_b32
+ ; GCN: liveins: $sgpr0_sgpr1, $sgpr2
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr2
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_64 = S_LSHL_B64 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0_sgpr1 = COPY %ret
+ %src:sgpr_64 = COPY $sgpr0_sgpr1
+ %shift:sgpr_32 = COPY $sgpr2
+ %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ %ret:sgpr_64 = S_LSHL_B64 %src, %shiftmask, implicit-def $scc
+ $sgpr0_sgpr1 = COPY %ret
+...
+
+---
+name: s_lshr_b64__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1, $sgpr2
+
+ ; GCN-LABEL: name: s_lshr_b64__s_and_b32
+ ; GCN: liveins: $sgpr0_sgpr1, $sgpr2
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr2
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0_sgpr1 = COPY %ret
+ %src:sgpr_64 = COPY $sgpr0_sgpr1
+ %shift:sgpr_32 = COPY $sgpr2
+ %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ $sgpr0_sgpr1 = COPY %ret
+...
+
+---
+name: s_ashr_i64__s_and_b32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1, $sgpr2
+
+ ; GCN-LABEL: name: s_ashr_i64__s_and_b32
+ ; GCN: liveins: $sgpr0_sgpr1, $sgpr2
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr2
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_64 = S_ASHR_I64 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0_sgpr1 = COPY %ret
+ %src:sgpr_64 = COPY $sgpr0_sgpr1
+ %shift:sgpr_32 = COPY $sgpr2
+ %shiftmask:sgpr_32 = S_AND_B32 63, %shift, implicit-def $scc
+ %ret:sgpr_64 = S_ASHR_I64 %src, %shiftmask, implicit-def $scc
+ $sgpr0_sgpr1 = COPY %ret
+...
+
+---
+name: v_lshlrev_b32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_lshlrev_b32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_LSHLREV_B32_e64 %shiftmask, %src, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_LSHLREV_B32_e64 %shiftmask, %src, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: v_lshrrev_b32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_lshrrev_b32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_LSHRREV_B32_e64 %shiftmask, %src, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_LSHRREV_B32_e64 %shiftmask, %src, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: v_ashrrev_i32_e64__v_and_b32_e32
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: v_ashrrev_i32_e64__v_and_b32_e32
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_ASHRREV_I32_e64 %shiftmask, %src, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_ASHRREV_I32_e64 %shiftmask, %src, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+# Test interesting cases
+
+---
+name: flipped_operands
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: flipped_operands
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_ASHR_I32_e64 %shiftmask, %src, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_ASHR_I32_e64 %shiftmask, %src, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+---
+name: flipped_operands_rev
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $vgpr0, $vgpr1
+
+ ; GCN-LABEL: name: flipped_operands_rev
+ ; GCN: liveins: $vgpr0, $vgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: %shift:vgpr_32 = COPY $vgpr1
+ ; GCN-NEXT: %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ ; GCN-NEXT: %ret:vgpr_32 = V_ASHRREV_I32_e64 %src, %shiftmask, implicit $exec
+ ; GCN-NEXT: $vgpr0 = COPY %ret
+ %src:vgpr_32 = COPY $vgpr0
+ %shift:vgpr_32 = COPY $vgpr1
+ %shiftmask:vgpr_32 = V_AND_B32_e32 65535, %shift, implicit $exec
+ %ret:vgpr_32 = V_ASHRREV_I32_e64 %src, %shiftmask, implicit $exec
+ $vgpr0 = COPY %ret
+...
+
+# 30 = 11110 = doesn't cover all bits.
+---
+name: shift32_mask_too_small
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GCN-LABEL: name: shift32_mask_too_small
+ ; GCN: liveins: $sgpr0, $sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_32 = COPY $sgpr0
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr1
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 30, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0 = COPY %ret
+ %src:sgpr_32 = COPY $sgpr0
+ %shift:sgpr_32 = COPY $sgpr1
+ %shiftmask:sgpr_32 = S_AND_B32 30, %shift, implicit-def $scc
+ %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ $sgpr0 = COPY %ret
+...
+
+# 90 = 1011010 = doesn't cover all bits.
+---
+name: shift32_mask_has_holes
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0, $sgpr1
+
+ ; GCN-LABEL: name: shift32_mask_has_holes
+ ; GCN: liveins: $sgpr0, $sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_32 = COPY $sgpr0
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr1
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 90, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0 = COPY %ret
+ %src:sgpr_32 = COPY $sgpr0
+ %shift:sgpr_32 = COPY $sgpr1
+ %shiftmask:sgpr_32 = S_AND_B32 90, %shift, implicit-def $scc
+ %ret:sgpr_32 = S_LSHL_B32 %src, %shiftmask, implicit-def $scc
+ $sgpr0 = COPY %ret
+...
+
+# 30 = 11110 = doesn't cover all bits.
+---
+name: shift64_mask_too_small
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1, $sgpr2
+
+ ; GCN-LABEL: name: shift64_mask_too_small
+ ; GCN: liveins: $sgpr0_sgpr1, $sgpr2
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr2
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 30, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0_sgpr1 = COPY %ret
+ %src:sgpr_64 = COPY $sgpr0_sgpr1
+ %shift:sgpr_32 = COPY $sgpr2
+ %shiftmask:sgpr_32 = S_AND_B32 30, %shift, implicit-def $scc
+ %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ $sgpr0_sgpr1 = COPY %ret
+...
+
+
+# 90 = 1011010 = doesn't cover all bits.
+---
+name: shift64_mask_has_holes
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1, $sgpr2
+
+ ; GCN-LABEL: name: shift64_mask_has_holes
+ ; GCN: liveins: $sgpr0_sgpr1, $sgpr2
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: %src:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: %shift:sgpr_32 = COPY $sgpr2
+ ; GCN-NEXT: %shiftmask:sgpr_32 = S_AND_B32 90, %shift, implicit-def $scc
+ ; GCN-NEXT: %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ ; GCN-NEXT: $sgpr0_sgpr1 = COPY %ret
+ %src:sgpr_64 = COPY $sgpr0_sgpr1
+ %shift:sgpr_32 = COPY $sgpr2
+ %shiftmask:sgpr_32 = S_AND_B32 90, %shift, implicit-def $scc
+ %ret:sgpr_64 = S_LSHR_B64 %src, %shiftmask, implicit-def $scc
+ $sgpr0_sgpr1 = COPY %ret
+...
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