[llvm-branch-commits] [llvm] [AMDGPU] Dynamic VGPR support for llvm.amdgcn.cs.chain (PR #130094)
Diana Picus via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Mar 10 07:34:40 PDT 2025
================
@@ -116,14 +117,56 @@ static void splitBlock(MachineBasicBlock &MBB, MachineInstr &MI,
MDT->applyUpdates(DTUpdates);
}
-void SILateBranchLowering::expandChainCall(MachineInstr &MI) {
+static void addRegOrCopyOp(MachineInstrBuilder &MIB, MachineOperand &Op) {
+ if (Op.isReg())
+ MIB.addReg(Op.getReg());
+ else
+ MIB->addOperand(Op);
----------------
rovka wrote:
This is because the same register may be used twice, and if it has a killed flag then that might get copied to an "earlier" instruction. This is what `remove-register-flags.mir` is testing. For now I renamed the helper, I should probably add a comment too...
https://github.com/llvm/llvm-project/pull/130094
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