[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Add ISD::PTRADD DAG combines (PR #142739)

[Fabian Ritter via llvm-branch-commits]

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@@ -119,23 +119,17 @@ define void @msubpt1(i32 %index, i32 %elem) {
 ; CHECK-CPA-O0:       // %bb.0: // %entry
 ; CHECK-CPA-O0-NEXT:    // implicit-def: $x8
 ; CHECK-CPA-O0-NEXT:    mov w8, w0
-; CHECK-CPA-O0-NEXT:    sxtw x9, w8
-; CHECK-CPA-O0-NEXT:    mov x8, xzr
-; CHECK-CPA-O0-NEXT:    subs x8, x8, x9
-; CHECK-CPA-O0-NEXT:    lsl x8, x8, #1
-; CHECK-CPA-O0-NEXT:    subs x10, x8, x9
+; CHECK-CPA-O0-NEXT:    sxtw x8, w8
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ritter-x2a wrote:

With #105669 now landed, this new AArch64 CPA test is also affected by this PR. The changes to this test with the new combines seem reasonable to me at a glance. @rgwott, could you please have a look and check if they make sense to you?

https://github.com/llvm/llvm-project/pull/142739