[llvm-branch-commits] [llvm] [RISCV] Support memcmp expansion for vectors (PR #114517)

[Luke Lau via llvm-branch-commits]

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@@ -16172,8 +16233,6 @@ static SDValue performSETCCCombine(SDNode *N, SelectionDAG &DAG,
       N0.getConstantOperandVal(1) != UINT64_C(0xffffffff))
     return SDValue();
 
-  // Looking for an equality compare.
-  ISD::CondCode Cond = cast<CondCodeSDNode>(N->getOperand(2))->get();
   if (!isIntEqualitySetCC(Cond))
     return SDValue();
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lukel97 wrote:

Nit, you could pull up this early exit to line 16217 since both combineVectorSizedSetCCEquality and the existing combine need it

https://github.com/llvm/llvm-project/pull/114517