[llvm-branch-commits] [GISelValueTracking] Baseline test for G_PTRTOADDR (PR #143815)
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Wed Jun 11 16:51:57 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-globalisel
Author: Alexander Richardson (arichardson)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/143815.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoaddr.mir (+108)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoaddr.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoaddr.mir
new file mode 100644
index 0000000000000..3fcd24ca0d031
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/knownbits-ptrtoaddr.mir
@@ -0,0 +1,108 @@
+# NOTE: Assertions have been autogenerated by utils/update_givaluetracking_test_checks.py UTC_ARGS: --version 5
+# RUN: llc -mtriple=amdgcn -passes="print<gisel-value-tracking>" %s -filetype=null 2>&1 | FileCheck %s
+## Check that we don't incorrectly assume known zeroes for and extend of a truncated ptrtoaddr
+---
+## We should see 48 unknown bits.
+name: PtrToAddr
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @PtrToAddr
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %5:_ KnownBits:???????????????????????????????????????????????? SignBits:1
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = COPY $vgpr2
+ %3:_(s32) = COPY $vgpr3
+ %4:_(p8) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32), %3(s32)
+ %5:_(s48) = G_PTRTOADDR %4(p8)
+...
+---
+## We should see 208 high zeroes followed by 48 unknown bits for extending PtrToAddr.
+## FIXME: this is currently wrong
+name: PtrToAddrExt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @PtrToAddrExt
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %5:_ KnownBits:00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:128
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = COPY $vgpr2
+ %3:_(s32) = COPY $vgpr3
+ %4:_(p8) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32), %3(s32)
+ %5:_(s256) = G_PTRTOADDR %4(p8)
+...
+---
+## We should see 32 unknown bits for truncating PtrToAddr.
+name: PtrToAddrTrunc
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @PtrToAddrTrunc
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %5:_ KnownBits:???????????????????????????????? SignBits:1
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = COPY $vgpr2
+ %3:_(s32) = COPY $vgpr3
+ %4:_(p8) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32), %3(s32)
+ %5:_(s32) = G_PTRTOADDR %4(p8)
+...
+---
+## Cbeck that truncating and then extending the G_PTRTOADDR result fills
+## all bits above the index bitwidth with known zeroes.
+## We should see all zero high bits with 32 unknown bits.
+name: PtrToAddrTruncExplicitExt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @PtrToAddrTruncExplicitExt
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %5:_ KnownBits:???????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %6:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %7:_ KnownBits:000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000???????????????????????????????? SignBits:96
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = COPY $vgpr2
+ %3:_(s32) = COPY $vgpr3
+ %4:_(p8) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32), %3(s32)
+ %5:_(s48) = G_PTRTOADDR %4(p8)
+ %6:_(s32) = G_TRUNC %5(s48)
+ %7:_(s128) = G_ZEXT %6(s32)
+...
+---
+## Same test again but this time have the G_PTRTOADDR do the truncation.
+## We should see all zero high bits with 48 unknown bits.
+name: PtrToAddrTruncImplicitExt
+body: |
+ bb.0:
+ ; CHECK-LABEL: name: @PtrToAddrTruncImplicitExt
+ ; CHECK-NEXT: %0:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %1:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %2:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %3:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %4:_ KnownBits:???????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %5:_ KnownBits:???????????????????????????????? SignBits:1
+ ; CHECK-NEXT: %6:_ KnownBits:000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000???????????????????????????????? SignBits:96
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = COPY $vgpr1
+ %2:_(s32) = COPY $vgpr2
+ %3:_(s32) = COPY $vgpr3
+ %4:_(p8) = G_MERGE_VALUES %0(s32), %1(s32), %2(s32), %3(s32)
+ %5:_(s32) = G_PTRTOADDR %4(p8)
+ %6:_(s128) = G_ZEXT %5(s32)
+...
``````````
</details>
https://github.com/llvm/llvm-project/pull/143815
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