[llvm-branch-commits] [llvm] [AMDGPU] Use 64-bit literals in codegen on gfx1250 (PR #148727)

Stanislav Mekhanoshin via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Jul 14 14:53:25 PDT 2025


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@@ -447,14 +447,42 @@ void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) {
     return;
   }
 
+  bool IsGCN = CurDAG->getSubtarget().getTargetTriple().isAMDGCN();
+  if (IsGCN && Subtarget->has64BitLiterals() && VT.getSizeInBits() == 64 &&
+      CurDAG->isConstantValueOfAnyType(SDValue(N, 0))) {
+    uint64_t C = 0;
+    bool AllConst = true;
+    unsigned EltSize = EltVT.getSizeInBits();
+    for (unsigned I = 0; I < NumVectorElts; ++I) {
+      SDValue Op = N->getOperand(I);
+      if (Op.isUndef()) {
+        AllConst = false;
+        break;
+      }
+      uint64_t Val;
+      if (ConstantFPSDNode *CF = dyn_cast<ConstantFPSDNode>(Op)) {
+        Val = CF->getValueAPF().bitcastToAPInt().getZExtValue();
+      } else
+        Val = cast<ConstantSDNode>(Op)->getZExtValue();
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rampitec wrote:

And again, I've been asked multiple times not to use it on else in this situation ;)

https://github.com/llvm/llvm-project/pull/148727


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