[llvm-branch-commits] [flang] d7019b9 - Revert "[flang] IEEE underflow control for Arm (#124170)"

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Mon Jan 27 07:39:44 PST 2025


Author: vdonaldson
Date: 2025-01-27T10:39:39-05:00
New Revision: d7019b9950ad6dccf6f71a75cd73c4f320c623fa

URL: https://github.com/llvm/llvm-project/commit/d7019b9950ad6dccf6f71a75cd73c4f320c623fa
DIFF: https://github.com/llvm/llvm-project/commit/d7019b9950ad6dccf6f71a75cd73c4f320c623fa.diff

LOG: Revert "[flang] IEEE underflow control for Arm (#124170)"

This reverts commit 3684ec425904424fc4dc80c8661f82bc676d7197.

Added: 
    

Modified: 
    flang/include/flang/Tools/TargetSetup.h
    flang/runtime/exceptions.cpp

Removed: 
    


################################################################################
diff  --git a/flang/include/flang/Tools/TargetSetup.h b/flang/include/flang/Tools/TargetSetup.h
index 5d23df6823a948..d1b0da3a42c897 100644
--- a/flang/include/flang/Tools/TargetSetup.h
+++ b/flang/include/flang/Tools/TargetSetup.h
@@ -24,35 +24,34 @@ namespace Fortran::tools {
     const std::string &compilerVersion, const std::string &compilerOptions) {
 
   const llvm::Triple &targetTriple{targetMachine.getTargetTriple()};
-
-  targetCharacteristics.set_ieeeFeature(evaluate::IeeeFeature::Halting, true);
-
+  // FIXME: Handle real(3) ?
+  if (targetTriple.getArch() != llvm::Triple::ArchType::x86_64) {
+    targetCharacteristics.DisableType(
+        Fortran::common::TypeCategory::Real, /*kind=*/10);
+  }
   if (targetTriple.getArch() == llvm::Triple::ArchType::x86_64) {
     targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/3);
     targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/4);
     targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/8);
   }
-
   if (targetTriple.isARM() || targetTriple.isAArch64()) {
     targetCharacteristics.set_haltingSupportIsUnknownAtCompileTime();
     targetCharacteristics.set_ieeeFeature(
         evaluate::IeeeFeature::Halting, false);
-    targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/3);
-    targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/4);
-    targetCharacteristics.set_hasSubnormalFlushingControl(/*kind=*/8);
-  }
-
-  if (targetTriple.getArch() != llvm::Triple::ArchType::x86_64) {
-    targetCharacteristics.DisableType(
-        Fortran::common::TypeCategory::Real, /*kind=*/10);
+  } else {
+    targetCharacteristics.set_ieeeFeature(evaluate::IeeeFeature::Halting);
   }
 
-  // Check for kind=16 support. See flang/runtime/Float128Math/math-entries.h.
-  // TODO: Take this from TargetInfo::getLongDoubleFormat for cross compilation.
+  // Figure out if we can support F128: see
+  // flang/runtime/Float128Math/math-entries.h
+  // TODO: this should be taken from TargetInfo::getLongDoubleFormat to support
+  // cross-compilation
 #ifdef FLANG_RUNTIME_F128_MATH_LIB
-  constexpr bool f128Support = true; // use libquadmath wrappers
+  // we can use libquadmath wrappers
+  constexpr bool f128Support = true;
 #elif HAS_LDBL128
-  constexpr bool f128Support = true; // use libm wrappers
+  // we can use libm wrappers
+  constexpr bool f128Support = true;
 #else
   constexpr bool f128Support = false;
 #endif

diff  --git a/flang/runtime/exceptions.cpp b/flang/runtime/exceptions.cpp
index 7fca0c431f8cd0..f541b8e844aded 100644
--- a/flang/runtime/exceptions.cpp
+++ b/flang/runtime/exceptions.cpp
@@ -11,9 +11,7 @@
 #include "flang/Runtime/exceptions.h"
 #include "terminator.h"
 #include <cfenv>
-#if __aarch64__
-#include <fpu_control.h>
-#elif __x86_64__
+#if __x86_64__
 #include <xmmintrin.h>
 #endif
 
@@ -92,40 +90,20 @@ bool RTNAME(SupportHalting)([[maybe_unused]] uint32_t except) {
 #endif
 }
 
-// A hardware FZ (flush to zero) bit is the negation of the
-// ieee_[get|set]_underflow_mode GRADUAL argument.
-#if defined(_MM_FLUSH_ZERO_MASK)
-// The MXCSR FZ bit affects computations of real kinds 3, 4, and 8.
-#elif defined(_FPU_GETCW)
-// The FPCR FZ bit affects computations of real kinds 3, 4, and 8.
-// bit 24: FZ   -- single, double precision flush to zero bit
-// bit 19: FZ16 -- half precision flush to zero bit [not currently relevant]
-#define _FPU_FPCR_FZ_MASK_ 0x01080000
-#endif
-
 bool RTNAME(GetUnderflowMode)(void) {
-#if defined(_MM_FLUSH_ZERO_MASK)
+#if _MM_FLUSH_ZERO_MASK
+  // The MXCSR Flush to Zero flag is the negation of the ieee_get_underflow_mode
+  // GRADUAL argument. It affects real computations of kinds 3, 4, and 8.
   return _MM_GET_FLUSH_ZERO_MODE() == _MM_FLUSH_ZERO_OFF;
-#elif defined(_FPU_GETCW)
-  uint32_t fpcr;
-  _FPU_GETCW(fpcr);
-  return (fpcr & _FPU_FPCR_FZ_MASK_) != _FPU_FPCR_FZ_MASK_;
 #else
   return false;
 #endif
 }
 void RTNAME(SetUnderflowMode)(bool flag) {
-#if defined(_MM_FLUSH_ZERO_MASK)
+#if _MM_FLUSH_ZERO_MASK
+  // The MXCSR Flush to Zero flag is the negation of the ieee_set_underflow_mode
+  // GRADUAL argument. It affects real computations of kinds 3, 4, and 8.
   _MM_SET_FLUSH_ZERO_MODE(flag ? _MM_FLUSH_ZERO_OFF : _MM_FLUSH_ZERO_ON);
-#elif defined(_FPU_GETCW)
-  uint32_t fpcr;
-  _FPU_GETCW(fpcr);
-  if (flag) {
-    fpcr &= ~_FPU_FPCR_FZ_MASK_;
-  } else {
-    fpcr |= _FPU_FPCR_FZ_MASK_;
-  }
-  _FPU_SETCW(fpcr);
 #endif
 }
 


        


More information about the llvm-branch-commits mailing list